Analog Devices AD8370 Service Manual

LF to 750 MHz,

FEATURES

Programmable low and high gain (<2 dB resolution)

Low range: −11 dB to +17 dB High range: 6 dB to 34 dB

Differential input and output

200 Ω differential input

100 Ω differential output 7 dB noise figure @ maximum gain Two-tone IP3 of 35 dBm @ 70 MHz

−3 dB bandwidth of 750 MHz 40 dB precision gain range Serial 8-bit digital interface Wide input dynamic range Power-down feature Single 3 V to 5 V supply

APPLICATIONS

Differential ADC drivers IF sampling receivers RF/IF gain stages Cable and video applications SAW filter interfacing Single-ended-to-differential conversion

GENERAL DESCRIPTION

The AD8370 is a low cost, digitally controlled, variable gain amplifier (VGA) that provides precision gain control, high IP3, and low noise figure. The excellent distortion performance and wide bandwidth make the AD8370 a suitable gain control device for modern receiver designs.

Digitally Controlled VGA

FUNCTIONAL BLOCK DIAGRAM

VCCI

3

ICOM

INHI

INLO

ICOM

4

2

1

PRE AMP

16

15

BIAS CELL

TRANSCONDUCTANCE

SHIFT REGISTER

AND LATCHES

14

13

DATA CLCK LTCH

Figure 1.

70

CODE = LAST 7 BITS OF GAIN CODE (NO MSB)

60

HIGH GAIN MODE

50

40

30

VOLTAGE GAIN (V/V)

20

10

0

LOW GAIN MODE

HIGH GAIN MODE

LOW GAIN MODE

0 10203040 60 10050 70 80 90 110 120 130

GAIN CODE

Figure 2. Gain vs. Gain Code at 70 MHz

VCCO

12

Δ GAIN

Δ CODE

Δ GAIN

Δ CODE

AD8370

VCCO

11 6

OUTPUT AMP

AD8370

≅ 0.409

≅ 0.059

5

VOCMPWUP

OCOM

7

8

OPHI

9

OPLO

OCOM

10

03692-001

40

30

20

10

0

VOLTAGE GAIN (dB)

–10

–20

03692-002

–30

For wide input, dynamic range applications, the AD8370 provides two input ranges: high gain mode and low gain mode. A vernier, 7-bit, transconductance (g

) stage provides 28 dB of

m

gain range at better than 2 dB resolution and 22 dB of gain range at better than 1 dB resolution. A second gain range, 17 dB higher than the first, can be selected to provide improved noise performance.

The AD8370 is powered on by applying the appropriate logic level to the PWUP pin. When powered down, the AD8370 consumes less than 4 mA and offers excellent input to output isolation. The gain setting is preserved when operating in a power-down mode.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

Gain control of the AD8370 is through a serial 8-bit gain control word. The MSB selects between the two gain ranges, and the remaining 7 bits adjust the overall gain in precise linear gain steps.

Fabricated on the ADI high speed XFCB process, the high bandwidth of the AD8370 provides high frequency and low distortion. The quiescent current of the AD8370 is 78 mA typically. The AD8370 amplifier comes in a compact, thermally enhanced 16-lead TSSOP package and operates over the temperature range of −40°C to +85°C.

AD8370

REVISION HISTORY

7/05—Rev. 0 to Rev. A

Changes to Features.......................................................................... 1

Changes to Table 1............................................................................ 3

Changes to Figure 11 and Figure 15............................................... 8

Added Figure 12; Renumbered Sequentially ................................ 8

Added Figure 16; Renumbered Sequentially ................................ 9

Changes to Evaluation Board and Software Section.................. 22

Changes to Figure 60...................................................................... 23

Updated Outline Dimensions....................................................... 28

Changes to Ordering Guide.......................................................... 28

1/04—Revision 0: Initial Version

Ordering Guide .......................................................................... 28

Rev. A | Page 2 of 28

AD8370

SPECIFICATIONS

VS = 5 V, T = 25°C, ZS = 200 Ω, ZL = 100 Ω at gain code HG127, 70 MHz, 1 V p-p differential output, unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth V Slew Rate Gain Code HG127, RL = 1 kΩ, AD8370 in compression 5750 V/ns Gain Code LG127, RL = 1 kΩ, V

INPUT STAGE Pins INHI and IHLO

Maximum Input Gain Code LG2, 1 dB compression 3.2 V p-p Input Resistance Differential 200 Ω Common-Mode Input Range 3.2 V p-p CMRR Differential, f = 10 MHz, Gain Code LG127 77 dB Input Noise Spectral Density 1.9 nV/√Hz

GAIN

Maximum Voltage Gain High Gain Mode Gain Code = HG127 34 dB 52 V/V Low Gain Mode Gain Code = LG127 17 dB

7.4 V/V Minimum Voltage Gain High Gain Mode Gain Code = HG1 −8 dB

0.4 V/V Low Gain Mode Gain Code = LG1 −25 dB

0.06 V/V Gain Step Size High Gain Mode 0.408 (V/V)/Code Low Gain Mode 0.056 (V/V)/Code Gain Temperature Sensitivity Gain Code = HG127 –2 mdB/°C Step Response For 6 dB gain step, settled to 10% of final value 20 ns

OUTPUT INTERFACE Pins OPHI and OPLO

Output Voltage Swing RL ≥ 1 kΩ (1 dB compression) 8.4 V p-p Output Resistance Differential 95 Ω Output Differential Offset V

NOISE/HARMONIC PERFORMANCE

10 MHz

Gain Flatness Within ±10 MHz of 10 MHz ±0.01 dB Noise Figure 7.2 dB Second Harmonic Third Harmonic

1

Output IP3 35 dBm Output 1 dB Compression Point 17 dBm

70 MHz

Gain Flatness Within ±10 MHz of 70 MHz ±0.02 dB Noise Figure 7.2 dB Second Harmonic Third Harmonic

1

Output IP3 35 dBm Output 1 dB Compression Point 17 dBm

< 1 V p-p 750 MHz

OUT

= 2 V p-p 3500 V/ns

OUT

= V

INHI

V

OUT

V

OUT

V

OUT

V

OUT

, over all gain codes ±60 mV

INLO

= 2 V p-p −77 dBc = 2 V p-p −77 dBc

= 2 V p-p −65 dBc = 2 V p-p −62 dBc

Rev. A | Page 3 of 28

AD8370

Parameter Conditions Min Typ Max Unit

140 MHz

Gain Flatness Within ±10 MHz of 140 MHz ±0.03 dB Noise Figure 7.2 dB Second Harmonic Third Harmonic Output IP3 33 dBm Output 1 dB Compression Point 17 dBm

190 MHz

Gain Flatness Within ±10 MHz of 240 MHz ±0.03 dB Noise Figure 7.2 dB Second Harmonic Third Harmonic Output IP3 33 dBm Output 1 dB Compression Point 17 dBm

240 MHz

Gain Flatness Within ±10 MHz of 240 MHz ±0.04 dB Noise Figure 7.4 dB Second Harmonic Third Harmonic Output IP3 32 dBm Output 1 dB Compression Point 17 dBm

380 MHz

Gain Flatness Within ±10 MHz of 240 MHz ±0.04 dB Noise Figure 8.1 dB Output IP3 27 dBm Output 1 dB Compression Point 14 dBm

POWER-INTERFACE

Supply Voltage 3.02 5.5 V Quiescent Current

vs. Temperature Total Supply Current

Power-Down Current PWUP low 3.7 mA vs. Temperature

POWER-UP INTERFACE Pin PWUP

Power-Up Threshold Power-Down Threshold PWUP Input Bias Current PWUP = 0 V 400 nA

GAIN CONTROL INTERFACE Pins CLCK, DATA, and LTCH

4

V

IH

4

V

IL

Input Bias Current 900 nA

1

Refer to Figure 22 for performance into a lighter load.

2

See the 3 V Operation section for more information.

3

Minimum and maximum specified limits for this parameter are guaranteed by production test.

4

Minimum or maximum specified limit for this parameter is a 6-sigma value and not guaranteed by production test.

1

3

V

= 2 V p-p −54 dBc

OUT

V

= 2 V p-p −50 dBc

OUT

V

= 2 V p-p −43 dBc

OUT

V

= 2 V p-p −43 dBc

OUT

V

= 2 V p-p –28 dBc

OUT

V

= 2 V p-p –33 dBc

OUT

PWUP High, GC = LG127, RL = ∞, 4 seconds after

72.5 79 85.5 mA power-on, thermal connection made to exposed paddle under device

4

−40°C ≤ TA ≤ +85°C 105 mA PWUP High, V

= 1 V p-p, ZL = 100 Ω reactive,

OUT

82 mA

GC = LG127 (includes load current)

4

−40°C ≤TA ≤ +85°C 5 mA

Voltage to enable the device 1.8 V Voltage to disable the device 0.8 V

Voltage for a logic high 1.8 V Voltage for a logic low 0.8 V

Rev. A | Page 4 of 28

AD8370

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage, VS 5.5 V PWUP, DATA, CLCK, LTCH VS + 500 mV Differential Input Voltage,

V

– V

INHI

INLO

Common-Mode Input Voltage,

or V

V

INHI

with Respect to

INLO,

ICOM or OCOM

2 V

V

+ 500 mV (max),

S

– 500 mV,

V

ICOM

V

– 500 mV (min)

OCOM

Internal Power Dissipation 575 mW θJA (Exposed Paddle Soldered Down) 30°C/W θJA (Exposed Paddle Not Soldered Down) 95°C/W θJC (At Exposed Paddle) 9°C/W Maximum Junction Temperature 150°C Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Lead Temperature Range

235°C

(Soldering 60 sec)

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. A | Page 5 of 28

AD8370

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

116

INHI

2

ICOM

3

VCCI PWUP VOCM VCCO

OCOM

OPHI OPLO

AD8370

4

TOP VIEW

(Not to Scale)

5 6 7 8

Figure 3.16-Lead TSSOP

Table 3. Pin Function Descriptions

Pin No. Mnemonic Description

1 INHI Balanced Differential Input. Internally biased. 2, 15, PADDLE ICOM

Input Common. Connect to a low impedance ground. This node is also connected to the exposed pad

on the bottom of the device. 3 VCCI Input Positive Supply. 3.0 V to 5.5 V. Should be properly bypassed. 4 PWUP Power Enable Pin. Device is operational when PWUP is pulled high. 5 VOCM

Common-Mode Output Voltage Pin. The midsupply ((V

to this pin for external bypassing for additional common-mode supply decoupling. This can be achieved

with a bypass capacitor to ground. This pin is an output only and is not to be driven externally. 6, 11 VCCO Output Positive Supply. 3.0 V to 5.5 V. Should be properly bypassed. 7, 10 OCOM Output Common. Connect to a low impedance ground. 8 OPHI Balanced Differential Output. Biased to midsupply. 9 OPLO Balanced Differential Output. Biased to midsupply. 12 LTCH

Serial Data Latch Pin. Serial data is clocked into the shift register via the DATA pin when LTCH is low. Data

in shift register is latched on the next high-going edge. 13 CLCK Serial Clock Input Pin. 14 DATA Serial Data Input Pin. 16 INLO Balanced Differential Input. Internally biased.

15 14 13 12 11 10

9

INLO ICOM DATA CLCK LTCH VCCO OCOM

03692-003

VCCO

− V

)/2) common-mode voltage is delivered

OCOM

Rev. A | Page 6 of 28

AD8370

TYPICAL PERFORMANCE CHARACTERISTICS

VS = 5 V, ZS = 200 Ω, ZL = 100 Ω, T = 25°C, unless otherwise noted.

70

CODE = LAST 7 BITS OF GAIN CODE (NO MSB)

60

HIGH GAIN MODE

50

40

30

VOLTAGE GAIN (V/V)

20

10

0

LOW GAIN MODE

Δ GAIN

HIGH GAIN MODE

LOW GAIN MODE

0 10203040 60 10050 70 80 90 110 120 130

GAIN CODE

Δ CODE

Δ GAIN

Δ CODE

≅ 0.409

≅ 0.059

40

30

20

10

0

VOLTAGE GAIN (dB)

–10

–20

03692-004

–30

40

HIGH GAIN CODES SHOWN WITH DASHED LINES

35

30

25

20

15

10

VOLTAGE GAIN (dB)

5

0

–5

LOW GAIN CODES SHOWN WITH SOLID LINES

–10

10 100 1000

FREQUENCY (MHz)

HG127 HG77

HG51

HG25

LG90 HG9

LG36 HG3

LG9

HG102

LG127

HG18

LG18

03692-007

Figure 4. Gain vs. Gain Code at 70 MHz

40

HIGH GAIN MODE

35

30

LOW GAIN MODE

25

20

OUTPUT IP3 (dBm)

15

10

5

0 20 40 60 80 100 120 140

SHADING INDICATES ±3σ FROM THE MEAN. DATA BASED ON 30 PARTS FROM TWO BATCH LOTS.

GAIN CODE

Figure 5. Output Third-Order Intercept vs. Gain Code at 70 MHz

45

40

35

30

380MHz

25

20

NOISE FIGURE (dB)

15

10

5

0 20 40 60 80 100 120 140

70MHz

380MHz

70MHz

LOW GAIN MODE

HIGH GAIN MODE

GAIN CODE

Figure 6. Noise Figure vs. Gain Code at 70 MHz

30

25

20

15

10

5

0

–5

03692-006

OUTPUT IP3 (dBV rms)

03692-068

Figure 7. Frequency Response vs. Gain Code

40

35

30

25

20

OUTPUT IP3 (dBm) +25°C

15

SHADING INDICATES ±3σ FROM THE MEAN. DATA BASED ON 30 PARTS FROM TWO BATCH LOTS.

10

–40°C

+25°C

UNIT CONVERSION NOTE FOR

100Ω LOAD: dBVrms = dBm–10dB

+85°C

20015050 1000 250 300 350 400

FREQUENCY (MHz)

50

45

40

35

30

25

20

Figure 8. Output Third-Order Intercept vs. Frequency at Maximum Gain

25

20

LG127

15

10

NOISE FIGURE (dB)

5

0

HG18

HG127

03692-009

200 3000 100 400 500 600

FREQUENCY (MHz)

Figure 9. Noise Figure vs. Frequency at Various Gains

OUTPUT IP3 (dBm) –40°C, +85°C

03692-069

Rev. A | Page 7 of 28

AD8370

20

16

12

8

4

OUTPUT P1dB (dB)

0

–4

–8

0 20 40 60 80 100 120 140

LOW GAIN MODE

HIGH GAIN MODE LOW GAIN MODE

HIGH GAIN MODE

UNIT CONVERSION NOTE: FOR 100Ω LOAD: dBV rms = dBm–10dB FOR 1kΩ LOAD: dBV rms = dBm

SHADING INDICATES ±3σ FROM THE MEAN. DATA BASED ON 30 PARTS FROM TWO BATCH LOTS.

GAIN CODE

100Ω LOAD

1kΩ LOAD

Figure 10. Output P1dB vs. Gain Code at 70 MHz

0

–10

LOW GAIN MODE OUTPUT IMD (dBc)

–20

–30

–40

–50

–60

–70

–80

–90

0 14012010080604020

HIGH GAIN MODE

LOW GAIN MODE

GAIN CODE

Figure 11. Two-Tone Output IMD3 vs. Gain Code at 70 MHz,

= 2 V p-p Composite Differential

OUT

HIGH GAIN

MODE

GAIN CODE

35

30

25

20

15

10

OUTPUT IP3 (dBm)

–5

RL = 1 kΩ, V

LOW GAIN

5

0

0 14012010080604020

–50

–60

–70

–80

–90

–100

–110

–120

–130

–140

25

20

15

10

5

0

–5

–10

–15

03692-010

HIGH GAIN MODE OUTPUT IMD (dBc)

03692-011

OUTPUT IP3 (dBV rms)

03692-005

2.0

1.5

1.0

0.5

0

–0.5

GAIN ERROR (dB)

–1.0

ERROR AT –40°C AND +85°C WITH RESPECT TO +25°C.

–1.5

SHADING INDICATES ±3σ FROM THE MEAN. DATA BASED ON 30 PARTS FROM ONE BATCH LOT.

–2.0

10 100 1000

FREQUENCY (MHz)

–40°C

+85°C

Figure 13. Gain Error over Temperature vs. Frequency, R

20

18

16

14

12

10

OUTPUT P1dB (dBm) –40°C, +85°C

8

SHADING INDICATES ±3σ FROM THE MEAN. DATA BASED ON 30 PARTS FROM TWO BATCH LOTS.

6

+85°C, 100Ω LOAD

UNIT CONVERSION NOTE: RE 100Ω LOAD: dBV rms = dBm – 10dB RE 1kΩ LOAD: dBV rms = dBm

+25°C, 1kΩ LOAD

+85°C, 1kΩ LOAD

FREQUENCY (MHz)

+25°C, 100Ω LOAD

–40°C, 100Ω LOAD

–40°C, 1kΩ LOAD

20015050 1000 250 300 350 400

Figure 14. Output P1dB vs. Frequency

–50 –52 –54 –56 –58 –60 –62 –64 –66

OUTPUT IMD (dBc)

–68 –70 –72 –74 –76 –78 –80 –82 –84

0 40035030025020015010050

–40°C

+25°C

+85°C

FREQUENCY (MHz)

= 100 Ω

L

03692-012

18

16

14

12

10

8

6

4

03692-014

OUTPUT P1dB (dBm) +25°C

03692-013

Figure 12. Output Third-Order Intercept vs. Gain Code at 70 MHz,

= 1 kΩ, V

R

L

= 2 V p-p Composite Differential

OUT

Rev. A | Page 8 of 28

Figure 15. Two-Tone Output IMD3 vs. Frequency at Maximum Gain,

R

= 1 kΩ, V

L

= 2 V p-p Composite Differential

OUT

AD8370

90

5MHz

S

11

270

= 100 Ω Differential

Z

O

60

30

0

330

300

16 DIFFERENT GAIN CODES REPRESENTED R+jX FORMAT

03692-017

100

50

OUTPUT IP3 (dBm)

34

32

30

28

26

24

22

20

18

16

14

0 40035030025020015010050

+85°C

–40°C

+25°C

FREQUENCY (MHz)

24

22

20

18

16

14

12

10

8

6

4

Figure 16. Output Third-Order Intercept vs. Frequency at Maximum Gain,

2.0

1.5

1.0

= 1 kΩ, V

R

L

= 2 V p-p Composite Differential

OUT

OUTPUT IP3 (dBV rms)

03692-008

120

1GHz

150

S

180

210

22

240

Figure 19. Input and Output Reflection Coefficients, S11 and S22,

250

200

0.5

0

–0.5

GAIN ERROR (dB)

–1.0

ERROR AT –40°C AND +85°C WITH RESPECT TO +25°C.

–1.5

SHADING INDICATES ±3σ FROM THE MEAN. DATA BASED ON 30 PARTS FROM ONE BATCH LOT.

–2.0

10 100 1000

FREQUENCY (MHz)

–40°C

+85°C

03692-015

Figure 17. Gain Error over Temperature vs. Frequency, RL = 1 kΩ

0

–10

–20

–30

LOW GAIN, RL = 1k

–40

–50

–60

–70

HARMONIC DISTORTION (dBc)

–80

–90

LOW GAIN, RL = 100

HIGH GAIN, RL = 1k

0 20 40 60 80 100 120 140

Ω

GAIN CODE

Ω

HIGH GAIN, RL = 100

Ω

03692-016

Figure 18. Second-Order Harmonic Distortion vs. Gain Code at 70 MHz,

V

= 2 V p-p Differential

OUT

150

100

RESISTANCE (Ω)

50

0

0 100 200 300 400 500 600 700

FREQUENCY (MHz)

0

–50

–100

–150

REACTANCE (j Ω)

03692-018

Figure 20. Input Resistance and Reactance vs. Frequency

0

LOW GAIN RL = 1k

–10

–20

–30

–40

–50

–60

–70

HARMONIC DISTORTION (dBc)

–80

–90

0 20 40 60 80 100 120 140

Ω

HIGH GAIN RL = 1k

HIGH GAIN RL = 100

GAIN CODE

Ω

LOW GAIN RL = 100

Ω

03692-019

Figure 21. Third-Order Harmonic Distortion vs. Gain Code at 70 MHz,

= 2 V p-p Differential

V

OUT

Rev. A | Page 9 of 28

Analog Devices AD8370 Service Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

FUNCTIONAL BLOCK DIAGRAM

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS