Analog Devices AD8368 Service Manual

800 MHz, Linear-in-dB

V

P

V

FEATURES

Analog variable gain range: −12 db to +22 dB Linear-in-dB scaling: 37.5 dB/V 3 dB bandwidth: 800 MHz @ V Integrated rms detector P1 dB: 16 dBm @ 140 MHz Output IP3: 33 dBm @ 140 MHz Noise figure at maximum gain: 9.5 dB @ 140 MHz Input and output impedances: 50 Ω Single-supply voltages from 4.5 V to 5.5 V RoHS-compliant, 24-lead LFCSP

APPLICATIONS

Complete IF AGC amplifiers Gain trimming and leveling Cellular base station Point-to-point radio links RF instrumentation

GAIN

= 0.5 V

VGA with AGC Detector

AD8368

FUNCTIONAL BLOCK DIAGRAM

PSO

PSI

23

OUTPUT BUFFER

REF

2

X

PSI

13

24

ENBL

8

OUT

3

HPFL

4

DECL

14

–

+

DECL

15

DECL

05907-001

ICOM

OCOM

GAIN

OCOM

INPT

ICOM

PSO

10

16

6

1

7

19

17

DECL

18

20

MODE

GAIN INTERPOLATOR

gmSTAGES

0dB –2dB –4d B –36dB

50Ω

ATTENUATO R LADDER

9

21

11

12

AD8368

FIXED-GAIN

AMPLIFIER

2

DETO5DETI

22

Figure 1.

GENERAL DESCRIPTION

The AD8368 is a variable gain amplifier with analog linearin-dB gain control that can be used from low frequencies to 800 MHz. Its excellent gain range, conformance, and flatness are attributed to Analog Devices’ X-AMP® architecture, an innovative technique for implementing high performance variable gain control.

The gain range of −12 dB to +22 dB is scaled accurately to

37.5 dB/V with excellent conformance error. The AD8368 has a 3 dB bandwidth of 800 MHz that is nominally independent of gain setting. At 140 MHz, the OIP3 is 33 dBm at maximum gain. The output noise floor is –143 dBm/Hz, which corresponds to a 9.5 dB noise figure at maximum gain. The single-ended input and output impedances are nominally 50 Ω.

The gain of the AD8368 can be configured to be an increasing or decreasing function of the gain control voltage depending on whether the MODE pin is pulled to the positive supply or to ground, respectively. When MODE is pulled high, the AD8368

operates as a typical VGA with increasing gain. By connecting MODE to ground and using the on-board rms detector, the AD8368 can be configured as a complete AGC system with RSSI. The output power is accurately leveled to the internal default setpoint of 63 mV rms (−11 dBm referenced to 50 Ω), independent of the waveform crest factor. Because the uncommitted detector input is available at DETI, the AGC loop can level the signal at the AD8368 output or at any other point in the signal chain over a maximum input power range of 34 dB. Furthermore, the setpoint level can be raised by dividing down the output signal before applying it to the detector.

The AD8368 operates from a supply voltage of 4.5 V to 5.5 V and consumes 60 mA of current. It can be fully powered down to <3 mA by grounding the ENBL pin. The AD8368 is fabricated using Analog Devices’ proprietary SiGe SOI complementary bipolar IC process. It is available in a 24-lead CSP and operates over the industrial temperature range of

−40°C to +85°C. Application boards are available upon request.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

AD8368

SPECIFICATIONS

VS = 5 V, T = 25°C, system impedance Z0 = 50 Ω, V

Table 1.

Parameter Min Typ Max Unit Conditions

OVERALL FUNCTION

Frequency Range LF 800 MHz 3 dB bandwidth Maximum Input 3 V p To avoid input overload Maximum Output1 2 V p To avoid clipping AC Input Impedance 50 Ω From INPT to ICOM AC Output Impedance 50 Ω From OUTP to OCOM

GAIN CONTROL INTERFACE (GAIN)

Gain Span 34 dB Gain Scaling 37.5 dB/V

−38 dB/V Gain Accuracy

±0.4 Maximum Gain 22 dB V Minimum Gain −12 dB V V

Range 0 1 V

GAIN

Gain Step Response 100 ns For 6 dB gain step GAIN Input Impedance 10 kΩ From GAIN to ICOM GAIN Input Bias Current −2 μA

f = 70 MHz

Noise Figure 9.5 dB Maximum gain Output IP3 34 dBm f1 = 70 MHz, f2 = 71 MHz, V Output P1dB

1

16 dBm V

f = 140 MHz

Noise Figure 9.5 dB Maximum gain Output IP3 33 dBm f1 = 140 MHz, f2 = 141 MHz, V Output P1dB1 16 dBm V

f = 240 MHz

Noise Figure 9.7 dB Maximum gain Output IP3 33 dBm f1 = 240 MHz, f2 = 241 MHz, V Output P1dB

1

15 dBm V

f = 380 MHz

Noise Figure 10 dB Maximum gain Output IP3 29 dBm f1 = 380 MHz, f2 = 381 MHz, V Output P1dB1 13 dBm V

1

Operation at compression is not recommended due to adverse distortion components.

= 5 V, RF input = 140 MHz, unless otherwise noted.

MODE

dB

= 5 V, 50 mV ≤ V

V

MODE

= 0 V, 50 mV ≤ V

V

MODE

100 mV ≤ V

= 1 V

GAIN

= 0 V

GAIN

= 0 V, V

GAIN

= 0 V, V

GAIN

= 0 V, V

GAIN

= 0 V, V

GAIN

≤ 900 mV

GAIN

= 0 V

MODE

= 0 V

MODE

= 0 V

MODE

= 0 V

MODE

≤ 950 mV

GAIN

≤ 950 mV

GAIN

= 1 V, 0 dBm per output tone

Rev. 0 | Page 3 of 20

AD8368

VS = 5 V, T = 25°C, system impedance Z0 = 50 Ω, V

Table 2.

Parameter Min Typ Max Unit Conditions

SQUARE LAW DETECTOR (DETI, DETO)

Output Setpoint −11 dBm OUTP connected to DETI DETI DC Bias Level to ICOM VS/2 V DETI Impedance 710 Ω

0.6 pF DETO Output Range

1

0.1 VS/2 V

AGC Step Response 30 μs For −6 dB input power step (C

MODE CONTROL INTERFACE (MODE)

Mode Threshold 3.5 V MODE Input Bias Current 50 μA

POWER INTERFACE (VPSI, VPSO)

Supply Voltage 4.5 5 5.5 V Total Supply Current 60 mA ENBL HIGH Disable Current 2 mA ENBL LOW

ENABLE INTERFACE (ENBL)

Enable Threshold 2.5 V Enable Response Time 1.5 μs

3 μs

ENBL Input Bias Current 150 μA V

1

Refer to AGC operation in the Applications section.

= 5 V, RF input = 140 MHz, unless otherwise noted.

MODE

Time delay following off to on transition until output reaches 90% of final value.

Time delay following on to off transition until supply current is less than 5 mA.

= 5 V

ENBL

DETO

= 1 nF)

Rev. 0 | Page 4 of 20

AD8368

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage, VPSO, VPSI 5.5 V ENBL and MODE Select Voltage 5.5 V RF Input Level 20 dBm Internal Power Dissipation 440 mW θJA 52°C/W Maximum Junction Temperature 125°C Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering 60 sec) 300°C

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Rev. 0 | Page 5 of 20

AD8368

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

GAIN

DETO

HPFL

DECL

DETI

OCOM

ENBL23VPSI22VPSI21MODE20ICOM

24

1

2

3

4

5

6

AD8368

TOP VIEW

(Not to Scale)

7 8 9 101112

OUTP

VPSO

OCOM

INPT

19

18

ICOM

17

ICOM

16

ICOM

15

DECL

14

DECL

13

VPSI

VPSO

05907-002

Figure 2. AD8368 24-Lead LFCSP Pin Out

Table 4. Pin Function Descriptions

Pin No. Name Function

1 GAIN Gain Control. 2 DETO Detector Output. Provides an output error current for the AGC function. 3 HPFL

High-Pass Filter Connection. A capacitor to ground sets the corner frequency of the internal output offset control loop which controls the minimum usable input frequency.

4, 14, 15 DECL

Decoupling Pin. Nominally ~V

Applications section).

the

/2. Decoupling capacitance may need to be adjusted for AGC operation (see

S

5 DETI Detector Input. DC level referenced to DECL pin. 6, 7 OCOM Connect OCOM to low impedance ground. 16, 17, 18, 20 ICOM Connect ICOM to low impedance ground. 8 OUTP Signal Output. Must be ac-coupled. 9, 10 VPSO

Positive Supply Voltage, 4.5 V to 5.5 V. VPSO and VPSI must be connected together externally and properly bypassed.

11, 12, 13, 22, 23

VPSI

Positive Supply Voltage, 4.5 V to 5.5 V. VPSO and VPSI must be connected together externally and properly

bypassed. 19 INPT Signal Input. Must be ac-coupled. 21 MODE Gain Direction Control. HIGH for positive slope. LOW for negative slope. 24 ENBL

Apply a positive voltage (2.5V ≤ V

≤ VPSI ) to activate device.

ENBL

Rev. 0 | Page 6 of 20

Analog Devices AD8368 Service Manual

FEATURES

APPLICATIONS

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS