Broad-range analog variable gain: −2.5 dB to +42.5 dB
3 dB cutoff frequency of 500 MHz
Gain up and gain down modes
Linear-in-dB, scaled 20 mV/dB
Resistive ground referenced input
Nominal Z
On-chip, square-law detector
Single-supply operation: 2.7 V to 5.5 V
APPLICATIONS
Cellular base stations
Broadband access
Power amplifier control loops
Complete, linear IF AGC amplifiers
High speed data I/O
GENERAL DESCRIPTION
= 200 Ω
IN
ICOM
INPT
ICOM
with AGC Detector
FUNCTIONAL BLOCK DIAGRAM
PSI
4
MODE
12
5
Figure 1.
1
3
CELLS
7
AD8367
9-STAGE ATTENUATOR BY 5dB
g
m
GAUSSIAN INTERPOLATOR
PSO
11
GAIN
AD8367
ENBL
2
BIAS
SQUARE
LAW
DETECTOR
6
DETO
14
13
10
9
8
ICOM
DECL
HPFL
VOUT
OCOM
02710-001
The AD8367 is a high performance 45 dB variable gain
amplifier with linear-in-dB gain control for use from low
frequencies up to several hundred megahertz. The range,
flatness, and accuracy of the gain response are achieved using
Analog Devices’ X-AMP® architecture, the most recent in a
series of powerful proprietary concepts for variable gain
applications, which far surpasses what can be achieved using
competing techniques.
The input is applied to a 9-stage, 200 Ω resistive ladder network.
Each stage has 5 dB of loss, giving a total attenuation of 45 dB.
At maximum gain, the first tap is selected; at progressively
lower gains, the tap moves smoothly and continuously toward
higher attenuation values. The attenuator is followed by a
42.5 dB fixed gain feedback amplifier—essentially an
operational amplifier with a gain bandwidth product of
100 GHz—and is very linear, even at high frequencies. The
output third order intercept is +20 dBV at 100 MHz (+27 dBm,
re 200 Ω), measured at an output level of 1 V p-p with V
= 5 V.
S
The analog gain-control input is scaled at 20 mV/dB and runs
from 50 mV to 950 mV. This corresponds to a gain of −2.5 dB
to +42.5 dB, respectively, when the gain up mode is selected and
+42.5 dB to −2.5 dB, respectively, when gain down mode is
selected. The gain down, or inverse, mode must be selected
when operating in AGC in which an integrated square-law
detector with an internal setpoint is used to level the output to
354 mV rms, regardless of the crest factor of the output signal.
A single external capacitor sets up the loop averaging time.
The AD8367 can be powered on or off by a voltage applied to
the ENBL pin. When this voltage is at a logic LO, the total
power dissipation drops to the milliwatt range. For a logic HI,
the chip powers up rapidly to its normal quiescent current of
26 mA at 25°C. The AD8367 is available in a 14-lead TSSOP
package for the industrial temperature range of −40°C to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VS = 5 V, TA = 25°C, system impedance ZO = 200 Ω, V
Table 1.
Parameter Conditions Min Typ Max Unit
OVERALL FUNCTION
Frequency Range LF 500 MHz
GAIN Range 45 dB
INPUT STAGE Pins INPT and ICOM
Maximum Input To avoid input overload 700 mV p-p
Input Resistance From INPT to ICOM 175 200 225 Ω
GAIN CONTROL INTERFACE Pin GAIN
Scaling Factor V
V
= 5 V, 50 mV ≤ V
MODE
= 0 V, 50 mV ≤ V
MODE
Gain Law Conformance 100 mV ≤ V
Maximum Gain V
Minimum Gain V
V
Step Response From 0 dB to 30 dB 300 ns
GAIN
= 0.95 V +42.5 dB
GAIN
= 0.05 V −2.5 dB
GAIN
From 30 dB to 0 dB 300 ns
Small Signal Bandwidth V
= 0.5 V 5 MHz
GAIN
OUTPUT STAGE Pin VOUT
Maximum Output Voltage Swing RL = 1 kΩ 4.3 V p-p
R
= 200 Ω 3.5 V p-p
L
Output Source Resistance Series resistance of output buffer 50 Ω
Output Centering Voltage
1
V
SQUARE LAW DETECTOR Pin DETO
Output Set Point 354 mV rms
AGC Small Signal Response Time C
= 100 pF, 6 dB gain step 1 μs
AGC
POWER INTERFACE Pins VPSI, VPSO, ICOM, and OCOM
Supply Voltage 2.7 5.5 V
Total Supply Current
ENBL high, maximum gain, R
(includes load current)
Disable Current vs. Temperature ENBL low 1.3 1.6 mA
−40°C ≤ TA ≤ +85°C 1.8 mA
MODE CONTROL INTERFACE Pin MODE
Mode LO Threshold Device in negative slope mode of operation 1.2 V
Mode HI Threshold Device in positive slope mode of operation 1.4 V
ENABLE INTERFACE Pin ENBL
Enable Threshold 2.5 V
Enable Response Time
Time delay following LO to HI transition until
device meets full specifications.
Enable Input Bias Current ENBL at 5 V 27 μA
ENBL at 0 V 32 nA
f = 70 MHz
Gain Maximum gain +42.5 dB
Minimum gain −3.7 dB
Gain Scaling Factor 19.9 mV/dB
Gain Intercept −5.6 dB
Noise Figure Maximum gain 6.2 dB
Output IP3 f1 = 70 MHz, f2 = 71 MHz, V
29.5 dBV rms
Output 1 dB Compression Point V
= 0.5 V 8.5 dBm
GAIN
1.5 dBV rms
= 5 V, f = 10 MHz, unless otherwise noted.
MODE
≤ 950 mV +20 mV/dB
GAIN
≤ 950 mV −20 mV/dB
GAIN
≤ 900 mV ±0.2 dB
GAIN
/2 V
S
= 200 Ω
L
26 30 mA
1.5 μs
= 0.5 V 36.5 dBm
GAIN
Rev. A | Page 3 of 24
AD8367
Parameter Conditions Min Typ Max Unit
f = 140 MHz
Gain Maximum gain +43.5 dB
Minimum gain −3.6 dB
Gain Scaling Factor 19.7 mV/dB
Gain Intercept −5.3 dB
Noise Figure Maximum gain 7.4 dB
Output IP3 f1 = 140 MHz, f2 = 141 MHz, V
25.7 dBV rms
Output 1 dB Compression Point V
= 0.5 V 8.4 dBm
GAIN
1.4 dBV rms
f = 190 MHz
Gain Maximum gain +43.5 dB
Minimum gain −3.8 dB
Gain Scaling Factor 19.6 mV/dB
Gain Intercept −5.3 dB
Noise Figure Maximum gain 7.5 dB
Output IP3 f1 = 190 MHz, f2 = 191 MHz, V
23.9 dBV rms
Output 1 dB Compression Point V
= 0.5 V 8.4 dBm
GAIN
1.4 dBV rms
f = 240 MHz
Gain Maximum gain +43 dB
Minimum gain −4.1 dB
Gain Scaling Factor 19.7 mV/dB
Gain Intercept −5.2 dB
Noise Figure Maximum gain 7.6 dB
Output IP3 f1 = 240 MHz, f2 = 241 MHz, V
22.2 dBV rms
Output 1 dB Compression Point V
= 0.5 V 8.1 dBm
GAIN
1.1 dBV rms
1
The output dc centering voltage is normally set at VS/2 and can be adjusted by applying a voltage to DECL.
= 0.5 V 32.7 dBm
GAIN
= 0.5 V 30.9 dBm
GAIN
= 0.5 V 29.2 dBm
GAIN
Rev. A | Page 4 of 24
AD8367
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage VPSO, VPSI 5.5 V
ENBL Voltage VS + 200 mV
MODE Select Voltage VS + 200 mV
V
Control Voltage 1.2 V
GAIN
Input Voltage ±600 mV
Internal Power Dissipation 250 mW
θ
JA
Maximum Junction Temperature 125°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature Range
(Soldering 60 sec)
150°C/W
300°C
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. A | Page 5 of 24
AD8367
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ICOM
ENBL
INPT
MODE
GAIN
DETO
ICOM
1
2
3
AD8367
4
TOP VIEW
(Not to Scale)
5
6
7
14
13
12
11
10
9
8
ICOM
HPFL
VPSI
VPSO
VOUT
DECL
OCOM
02710-002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1, 7, 14 ICOM Signal Common. Connect to low impedance ground.
2 ENBL A HI Activates the Device.
3 INPT Signal Input. 200 Ω to ground.
4 MODE Gain Direction Control. HI for positive slope; LO for negative slope.
5 GAIN Gain Control Voltage Input.
6 DETO Detector Output. Provides output current for RSSI function and AGC control.
8 OCOM Power Common. Connect to low impedance ground.
9 DECL Output Centering Loop Decoupling Pin.
10 VOUT Signal Output. To be externally ac-coupled to load.
11 VPSO
Positive Supply Voltage. 2.7 V to 5.5 V. VPSI and VPSO are tied together internally with back-to-back
PN junctions. They should be tied together externally and properly bypassed.
12 VPSI Positive Supply Voltage. 2.7 V to 5.5 V.
13 HPFL High-Pass Filter Connection. A capacitor to ground sets the corner frequency of the output offset control loop.
Rev. A | Page 6 of 24
AD8367
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, TA = 25°C, system impedance ZO = 200 Ω, V
50
1V
40
30
20
GAIN (dB)
10
0
0.9V
0.8V
0.7V
0.6V
0.5V
0.4V
0.3V
0.2V
0.1V
= 5 V, unless otherwise noted.
MODE
NOISE FIGURE (dB)
10
+85°C
9
+25°C
8
–40°C
7
6
5
–10
101001000
FREQUENCY (MHz)
Figure 3. Gain vs. Frequency for Values of V
45
40
35
30
MODE = 0V
10MHz
70MHz
140MHz
240MHz
–40°C
+25°C
+85°C
GAIN (dB)
25
20
GAIN (dB)
15
10
–5
45
40
35
30
25
20
15
10
5
0
–5
01.00.90.80.70.60.50.40.30.20.1
5
0
01.00.90.80.70.60.50.40.30.20.1
MODE = 5V
10MHz
70MHz
140MHz
240MHz
Figure 4. Gain vs. V
V
(V)
GAIN
(Mode LO and Mode HI)
GAIN
V
(V)
GAIN
GAIN
02710-003
02710-004
2.0
1.6
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
–1.6
–2.0
Figure 5. Gain Conformance at 70 MHz for T = −40°C, +25°C, and +85°C
LINEARITY ERROR (dB)
02710-005
4
7025023021019017015013011090
FREQUENCY (MHz)
Figure 6. NF (re 200 Ω) vs. Frequency at Maximum Gain
60
50
40
30
20
NOISE FIGURE (dB)
10
0
OIP3 (dBm)
01.00.90.80.70.60.50.40.30.20.1
Figure 7. NF (re 200 Ω) vs. V
40
35
30
25
20
15
10
5
0
01.00.90.80.70.60.50.40.30.20.1
V
(V)
GAIN
140MHz
V
(V)
GAIN
Figure 8. OIP3 vs. V
at 70 MHz
GAIN
70MHz
240MHz
GAIN
02710-006
`
02710-007
10MHz
02710-008
Rev. A | Page 7 of 24
AD8367
40
33
0
35
30
25
20
OIP3 (dBm re 200Ω)
15
10
101000100
Figure 9. OIP3 vs. Frequency for V
4
2
0
–2
–4
FREQUENCY (MHz)
= 500 mV
GAIN
140MHz
10MHz
200MHz
70MHz
28
23
18
OIP3 (dBV rms)
13
8
02710-009
3
11
)
Ω
9
7
5
3
–10
–20
–30
–40
–50
OUTPUT IMD3 (dBc)
–60
–70
–80
10MHz
01.00.90.80.70.60.50.40.30.20.1
Figure 12. IMD3 vs. Gain (V
4
2
0
–2
–4
140MHz
V
(V)
GAIN
= 1 V p-p Composite)
OUT
240MHz
70MHz
02710-012
11
)
Ω
9
7
5
3
–6
OUTPUT 1dB COMPRESSION (dBV rms)
–8
00.1 0.2 0.30.4 0.5 0.60.7 0.8 0.91.0
Figure 10. Output P1dB vs. V
5
4
3
2
1
0
–1
–2
–3
OUTPUT 1dB COMPRESSION (dBV rms)
–4
–5
101001000
Figure 11. Output P1dB vs. Frequency at V
V
(V)
GAIN
FREQUENCY (MHz)
GAIN
GAIN
= 500 mV
1
OUTPUT 1dB COMPRESSION (dBm re 200
02710-010
–1
–6
OUTPUT 1dB COMPRESSION (dBV rms)
–8
2.55.55.04.54.03.53.0
VS (V)
1
OUTPUT 1dB COMPRESSION (dBm re 200
02710-013
–1
Figure 13. Output Compression Point vs. Supply Voltage at 70 MHz,
= 500 mV
V
GAIN
12
)
Ω
11
10
9
8
7
6
5
4
3
OUTPUT 1dB COMPRESSION (dBm re 200
02710-011
2
40
35
)
30
Ω
25
20
15
10
OUTPUT IP3 (dBm re 200
5
0
2.55.55.04.54.03.53.0
VS (V)
33
28
23
18
13
8
OUTPUT IP3 (dBV rms)
3
–2
02710-014
–7
Figure 14. Output Third-Order Intercept vs. Supply Voltage at 70 MHz,
= 500 mV
V
GAIN
Rev. A | Page 8 of 24
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