Analog Devices AD8364 Service Manual

LF to 2.7 GHz

M

A

C

FEATURES

RMS measurement of high crest-factor signals Dual-channel and channel difference outputs ports Integrated accurately scaled temperature sensor Wide dynamic range ±1 dB over 60 dB ±0.5 dB temperature-stable linear-in-dB response Low log conformance ripple +5 V operation at 70 mA, –40°C to +85°C Small footprint, 5 mm x 5 mm, LFCSP

APPLICATIONS

Wireless infrastructure power amplifier linearization/control Antenna VSWR monitor Gain and power control and measurement Transmitter signal strength indication (TSSI) Dual-channel wireless infrastructure radios

GENERAL DESCRIPTION

The AD8364 is a true rms, responding, dual-channel RF power measurement subsystem for the precise measurement and control of signal power. The flexibility of the AD8364 allows communications systems, such as RF power amplifiers and radio transceiver AGC circuits, to be monitored and controlled with ease. Operating on a single 5 V supply, each channel is fully specified for operation up to 2.7 GHz over a dynamic range of 60 dB. The AD8364 provides accurately scaled, independent, rms outputs of both RF measurement channels. Difference output ports, which measure the difference between the two channels, are also available. The on-chip channel matching makes the rms channel difference outputs extremely stable with temperature and process variations. The device also includes a useful temperature sensor with an accurately scaled voltage proportional to temperature, specified over the device operating temperature range. The AD8364 can be used with input signals having rms values from −55 dBm to +5 dBm referred to 50 Ω and large crest factors with no accuracy degradation.

Dual 60 dB TruPwr™ Detector

AD8364

FUNCTIONAL BLOCK DIAGRAM

VPSA

INHA

INLA

PWDN

OMR

INLB

INHB

VPSB

CHPA

DECA

24 23 22 21 20 19 18 17

TEMP

25

26

27

28

29

30

31

32

CHANNEL A

TruPwr™

OUTA OUTB

CHANNEL B

TruPwr™

BIAS

1 2 3 4 5 6 7 8

DECB

CHPB

COM

I

SIG

I

TGT

I

SIG

I

TGT

VGA CONTROL

COMB

VPSR

VGA CONTROL

2

ADJB

ACO

ADJA

TEMP

VREF

Figure 1. Functional Block Diagram

Integrated in the AD8364 are two matched AD8362 channels

AD8362 data sheet for more information) with improved

(see the temperature performance and reduced log conformance ripple. Enhancements include improved temperature performance and reduced log-conformance ripple compared to the chip wide bandwidth output op amps are connected to accommodate flexible configurations that support many system solutions.

The device can easily be configured to provide four rms measurements simultaneously. Linear-in-dB rms measurements are supplied at OUTA and OUTB, with conveniently scaled slopes of 50 mV/dB. The rms difference between OUTA and OUTB is available as differential or single-ended signals at OUTP and OUTN. An optional voltage applied to VLVL provides a common mode reference level to offset OUTP and OUTN above ground.

The AD8364 is supplied in a 32-lead, 5 mm × 5 mm LFCSP, for the operating temperature of –40°C to +85°C.

ACO

VLVL

CLPA

16

15

14

13

12

11

10

9

CLPB

AD8362. On-

VSTA

OUTA

FBKA

OUTP

OUTN

FBKB

OUTB

VSTB

05334-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

www.analog.com

AD8364

TABLE OF CONTENTS

Specifications..................................................................................... 3

Gain-Stable Transmitter/Receiver............................................ 29

Absolute Maximum Ratings............................................................ 7

ESD Caution.................................................................................. 7

Pin Configuration and Function Descriptions............................. 8

Typical Performance Characteristics............................................. 9

General Description and Theory.................................................. 18

Square Law Detector and Amplitude Target .......................... 19

RF Input Interface ...................................................................... 19

Offset Compensation................................................................. 19

Temperature Sensor Interface................................................... 20

VREF Interface ...........................................................................20

Power-Down Interface............................................................... 20

VST[A, B] Interface.................................................................... 20

OUT[A, B, P, N] Outputs.......................................................... 21

Measurement Channel Difference Output

Using OUT[P, N]........................................................................ 22

Temperature Compensation Adjustment................................ 31

Device Calibration and Error Calculation.............................. 31

Selecting Calibration Points to Improve Accuracy

over a Reduced Range................................................................ 32

Altering the Slope....................................................................... 34

Channel Isolation....................................................................... 35

Choosing the Right Value for CHP[A, B] and CLP[A, B].... 36

RF Burst Response Time........................................................... 36

Single-Ended Input Operation................................................. 36

Printed Circuit Board Considerations..................................... 37

Package Considerations............................................................. 37

Description of Characterization............................................... 38

Basis for Error Calculations...................................................... 38

Evaluation and Characterization Circuit Board Layouts...... 40

Evaluation Boards........................................................................... 44

Controller Mode......................................................................... 22

RF Measurement Mode Basic Connections............................ 23

Controller Mode Basic Connections .......................................24

Constant Output Power Operation.......................................... 27

REVISION HISTORY

4/05—Revision 0: Initial Version

Assembly Drawings.................................................................... 46

Outline Dimensions....................................................................... 47

Ordering Guide .......................................................................... 47

Rev. 0 | Page 2 of 48

AD8364

SPECIFICATIONS

VS = VPSA = VPSB = VPSR = 5 V, TA = 25°C, Channel A frequency = Channel B frequency, VLVL = VREF, VST[A, B] = OUT[A, B], OUT[P, N] = FBK[A, B], differential input via Balun, CW input f ≤ 2.7 GHz, unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

OVERALL FUNCTION Channel A and Channel B, CW sine wave input

Signal Input Interface INH[A, B] (Pins 26, 31) INL[A, B] (Pins 27, 30)

Specified Frequency Range LF 2.7 GHz DC Common-Mode Voltage 2.5 V

Signal Output Interface OUT[A, B] (Pins 15, 10)

Wideband Noise CLP[A, B] = 0.1µF, f

RF input = 2140 MHz, ≥−40 dBm

MEASUREMENT MODE,

450 MHz OPERATION

ADJA = ADJB = 0 V, error referred to best fit line using linear regression @ P T

= 25°C, balun = M/A-Com ETK4-2T

A

±1 dB Dynamic Range1 Pins OUT[A, B] 69 dB

−40°C < TA < +85°C 65 dB ±0.5 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 62/59 dB

−40°C < TA < +85°C, (Channel A/Channel B) 50/52 dB Maximum Input Level ±1 dB error 12 dBm Minimum Input Level ±1 dB error −58 dBm Slope 51.6 mV/dB Intercept −59 dBm Output Voltage—High Power In Pins OUT[A, B] @ P Output Voltage—Low Power In Pins OUT[A, B] @ P Temperature Sensitivity Deviation from OUT[A, B] @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Deviation from OUTP to OUTN @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Input A to Input B Isolation Baluns = Macom ETC1.6-4-2-3 (both channels) 71 dB Input A to OUTB Isolation Freq separation = 1 kHz Input B to OUTA Isolation2 P P

= −50 dBm, OUTB = OUTB

INHB

= −50 dBm, OUTA = OUTA

INHA

Input Impedance INHA/INLA, INHB/INLB differential drive 210||0.1 Ω||pF Input Return Loss With recommended balun −12 dB

MEASUREMENT MODE,

880 MHz OPERATION

ADJA = ADJB = 0 V, error referred to best fit line using linear regression @ P

= 25°C, balun = Mini-Circuits® JTX-4-10T

T

A

±1 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 66/57 dB

−40°C < TA < +85°C 58/40 dB ±0.5 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 62/54 dB

−40°C < TA < +85°C 20/20 dB Maximum Input Level ±1 dB error, (Channel A/Channel B) 8/0 dBm Minimum Input Level ±1 dB error, (Channel A/Channel B) −58/−57 dBm Slope 51.6 mV/dB Intercept −59.2 dBm Output Voltage—High Power In Pins OUT[A, B] @ P Output Voltage—Low Power In Pins OUT[A, B] @ P

= 100 kHz,

SPOT

40 nV/√Hz

= −40 dBm and −20 dBm,

INH[A, B]

= −10 dBm 2.53 V

INH[A, B]

= −40 dBm 0.99 V

INH[A, B]

= −10 dBm −0.1, +0.2 dB

INH[A, B]

= −25 dBm −0.2, +0.3 dB

INH[A, B]

= −40 dBm −0.3, +0.4 dB

INH[A, B]

= −10 dBm, −25 dBm ±0.25 dB

INH[A, B]

= −25 dBm, −25 dBm ±0.2 dB

INH[A, B]

= −40 dBm, −25 dBm ±0.2 dB

INH[A, B]

± 1 dB 54 dB

PINHB

± 1 dB 54 dB

PINHA

= −40 dBm and −20 dBm,

INH[A, B]

= −10 dBm 2.54 V

INH[A, B]

= −40 dBm 0.99 V

INH[A, B]

Rev. 0 | Page 3 of 48

AD8364

Parameter Conditions Min Typ Max Unit

Temperature Sensitivity Deviation from OUT[A, B] @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Deviation from OUTP to OUTN @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Input A to Input B Isolation Baluns = Macom ETC1.6-4-2-3 (both channels) 64 dB Input A to OUTB Isolation P Input B to OUTA Isolation2 P

= −50 dBm, OUTB = OUTB

INHB

= −50 dBm, OUTA = OUTA

INHA

Input Impedance INHA/INLA, INHB/INLB differential drive 200||0.3 Ω||pF Input Return Loss With recommended balun −9 dB

MEASUREMENT MODE,

1880 MHz OPERATION

ADJA = ADJB = 0.75 V, error referred to best fit line using linear regression @ P T

= 25°C, balun = Murata LDB181G8820C-110

A

±1 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 69/61 dB

−40°C < TA < +85°C 60/50 dB ±0.5 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 62/51 dB

−40°C < TA < +85°C 58/51 dB Maximum Input Level ±1 dB error, (Channel A/Channel B) 11/3 dBm Minimum Input Level ±1 dB error −58 dBm Slope 50 mV/dB Intercept −62 dBm Output Voltage—High Power In Pins OUT[A, B] @ P Output Voltage—Low Power In Pins OUT[A, B] @ P Temperature Sensitivity Deviation from OUT[A, B] @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Deviation from OUTP to OUTN @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Input A to Input B Isolation Baluns = Macom ETC1.6-4-2-3 (both channels) 61 dB Input A to OUTB Isolation P Input B to OUTA Isolation2 P

= −50 dBm, OUTB = OUTB

INHB

= −50 dBm, OUTA = OUTA

INHA

Input Impedance INHA/INLA, INHB/INLB differential drive 167||0.14 Ω||pF Input Return Loss With recommended balun −8 dB

MEASUREMENT MODE,

2.14 GHz OPERATION

ADJA = ADJB = 1.02 V, error referred to best fit line using linear regression @ P T

= 25°C, balun = Murata LDB212G1020C-001

A

±1 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 66/57 dB

−40°C < TA < +85°C 58/40 dB ±0.5 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 62/54 dB

−40°C < TA < +85°C 30/30 dB Maximum Input Level ±1 dB Error, (Channel A/Channel B) −2/−4 dBm Minimum Input Level ±1 dB Error, (Channel A/Channel B) −57−51 dBm Slope Channel A/Channel B 49.5/52.1 mV/dB Intercept Channel A/Channel B −58.3/−57.1 dBm Output Voltage—High Power In Pins OUT[A, B] @ P

= −10 dBm +0.5 dB

INH[A, B]

= −25 dBm +0.5 dB

INH[A, B]

= −40 dBm +0.5 dB

INH[A, B]

= −10 dBm, −25 dBm +0.1, −0.2 dB

INH[A, B]

= −25 dBm, −25 dBm +0.1, −0.2 dB

INH[A, B]

= −40 dBm, −25 dBm +0.1, −0.2 dB

INH[A, B]

± 1 dB 35 dB

PINHB

± 1 dB 35 dB

PINHA

= −40 dBm and −20 dBm,

INH[A, B]

= −10 dBm 2.49 V

INH[A,B]

= −40 dBm 0.98 V

INH[A,B]

= −10 dBm +0.5, −0.2 dB

INH[A, B]

= −25 dBm +0.5, −0.2 dB

INH[A, B]

= −40 dBm +0.5, −0.2 dB

INH[A, B]

= −10 dBm, −25 dBm ±0.3 dB

INH[A, B]

= −25 dBm, −25 dBm ±0.3 dB

INH[A, B]

= −40 dBm, −25 dBm ±0.3 dB

INH[A, B]

± 1 dB 33 dB

PINHB

± 1 dB 33 dB

PINHA

= −40 dBm and −20 dBm,

INH[A, B]

= −10 dBm 2.42 V

INH[A, B]

Rev. 0 | Page 4 of 48

AD8364

Parameter Conditions Min Typ Max Unit

Output Voltage—Low Power In Pins OUT[A, B] @ P Temperature Sensitivity Deviation from OUT[A, B] @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Deviation from OUTP to OUTN @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Deviation from CW Response 5.5 dB peak-to-rms ratio (WCDMA one channel) 0.2 dB 12 dB peak-to-rms ratio (WCDMA three channels) 0.3 dB 18 dB peak-to-rms ratio (WCDMA four channels) 0.3 dB Input A to Input B Isolation Baluns = Macom ETC1.6-4-2-3 (both channels) 58 dB Input A to OUTB Isolation P Input B to OUTA Isolation2 P

= −50 dBm, OUTB = OUTB

INHB

= −50 dBm, OUTA = OUTA

INHA

Input Impedance INHA/INLA, INHB/INLB differential drive 150||1.9 Ω||pF Input Return Loss With recommended balun −10 dB

MEASUREMENT MODE,

2.5 GHz OPERATION

ADJA = ADJB = 1.14 V, error referred to best fit line using linear regression @ P T

= 25°C, balun = Murata LDB182G4520C-110

A

± 1 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 69/63 dB

−40°C < TA < +85°C 58 dB ±0.5 dB Dynamic Range1 Pins OUT[A, B], (Channel A/Channel B) 55/50 dB

−40°C < TA < +85°C 25 dB Maximum Input Level ±1 dB error, (Channel A/Channel B) 17/11 dBm Minimum Input Level ±1 dB error −52 dBm Slope 50 mV/dB Intercept −52.7 dBm Output Voltage—High Power In Pins OUT[A, B] @ P Output Voltage—Low Power In Pins OUT[A, B] @ P Temperature Sensitivity Deviation from OUT[A, B] @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Deviation from OUTP to OUTN @ 25°C

−40°C < TA < 85°C; P

−40°C < TA < 85°C; P Input A to Input B Isolation Baluns = Macom ETC1.6-4-2-3 (both channels) 54 dB Input A to OUTB Isolation P Input B to OUTA Isolation2 P

= −50 dBm, OUTB = OUTB

INHB

= −50 dBm, OUTA = OUTA

INHA

Input Impedance INHA/INLA, INHB/INLB differential drive 150||1.7 Ω||pF Input Return Loss With recommended balun −11.5 dB

OUTPUT INTERFACE Pin OUTA and OUTB

Voltage Range Min RL ≥ 200 Ω to ground 0.09 V Voltage Range Max RL ≥ 200 Ω to ground VS − 0.15 V Source/Sink Current OUTA and OUTB held at VS/2, to 1% change 70 mA

= −40 dBm 0.90 V

INH[A, B]

= −10 dBm +0.1, −0.4 dB

INH[A, B]

= −25 dBm +0.1, −0.4 dB

INH[A, B]

= −40 dBm +0.1, −0.4 dB

INH[A, B]

= −10 dBm, −25 dBm +0.1, −0.4 dB

INH[A, B]

= −25 dBm, −25 dBm +0.2, −0.2 dB

INH[A, B]

= −40 dBm, −25 dBm +0.1, −0.2 dB

INH[A, B]

± 1 dB 33 dB

PINHB

± 1 dB 33 dB

PINHA

= −40 dBm and −20 dBm,

INH[A, B]

= −10 dBm 2.14 V

INH[A, B]

= −40 dBm 0.65 V

INH[A, B]

= −10 dBm ±0.5 dB

INH[A, B]

= −25 dBm ±0.5 dB

INH[A, B]

= −40 dBm ±0.5 dB

INH[A, B]

= −10 dBm, −25 dBm ±0.3 dB

INH[A, B]

= −25 dBm, −25 dBm ±0.3 dB

INH[A, B]

= −40 dBm, −25 dBm ±0.3 dB

INH[A, B]

± 1 dB 31 dB

PINHB

± 1 dB 31

PINHA

Rev. 0 | Page 5 of 48

AD8364

Parameter Conditions Min Typ Max Unit

SETPOINT INPUT Pin VSTA and VSTB

Voltage Range Law conformance error ≤1 dB 0.5 3.75 V Input Resistance 68 kΩ Logarithmic Scale Factor f = 450 MHz, −40°C ≤ TA ≤ +85°C 50 mV/dB Logarithmic Intercept f = 450 MHz, −40°C ≤ TA ≤ +85°C, referred to 50 Ω −55 dBm

CHANNEL DIFFERENCE OUTPUT Pin OUTP and OUTN

Voltage Range Min RL ≥ 200 Ω to ground 0.1 V Voltage Range Max RL ≥ 200 Ω to ground VS − 0.15 V Source/Sink Current OUTP and OUTN held at VS/2, to 1% change 70 mA

DIFFERENCE LEVEL ADJUST Pin VLVL

Voltage Range3 OUT[P, N] = FBK[A, B] 0 5 V OUT[P,N] Voltage Range OUT[P, N] = FBK[A, B] 0

V

S

0.15

Input Resistance 1 kΩ

TEMPERATURE COMPENSATION Pin ADJA and ADJB

Input Voltage Range 0 2.5 V Input Resistance >1 MΩ

VOLTAGE REFERENCE Pin VREF

Output Voltage RF in = −55 dBm 2.5 V Temperature Sensitivity −40°C ≤ TA ≤ +85°C 0.4 mV/°C Current Limit Source/Sink 1% change 10/3 mA

TEMPERATURE REFERENCE Pin TEMP

Output Voltage TA = 25°C, RL ≥ 10 kΩ 0.62 V Temperature Coefficient −40°C ≤ TA ≤ +85°C, RL ≥ 10 kΩ 2 mV/°C Current Source/Sink TA = 25°C to 1% change 1.6/2 mA

POWER-DOWN INTERFACE Pin PWDN

Logic Level to Enable Logic LO enables 1 V Logic Level to Disable Logic HI disables 3 V Input Current Logic HI PWDN = 5 V 95 µA Logic LO PWDN = 0 V <100 µA Enable Time

Disable Time

PWDN LO to OUTA/OUTB at 100% final value, C

LPA/B

= Open, C

= 10 nF, RF in = 0 dBm

HPA/B

PWDN HI to OUTA/OUTB at 10% final value, C

LPA/B

= Open, C

= 10nF, RF in = 0 dBm

HPA/B

2 µs

1.6 µs

POWER INTERFACE Pin VPS[A, B], VPSR

Supply Voltage 4.5 5.5 V Quiescent Current RF in = −55 dBm, VS = 5 V 70 mA

−40°C ≤ TA ≤ +85°C 90 mA Supply Current PWDN enabled, VS = 5 V 500 µA

−40°C ≤ TA ≤ +85°C 900 µA

1

Best fit line, linear regression.

2

See for a plot of isolation vs. frequency for a ±1 dB error. Figure 75

3

VLVL + OUTA/2 should not exceed VPSA − 1.31 V. Likewise, VLVL + OUTB/2 should not exceed VPSB − 1.31 V.

−

V

Rev. 0 | Page 6 of 48

AD8364

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage VPSA, VPSB, VPSR 5.5 V PWDN, VSTA, VSTB, ADJA, ADJB,

0 V, 5.5 V

FBKA, FBKB Input Power (Referred to 50 Ω) 23 dBm Internal Power Dissipation 600 mW θJA 39.8°C/W

1, 2

θJC 3.9°C/W2 θJB 22.8°C/W2 ΨJT 0.4°C/W

1, 2

Maximum Junction Temperature 125°C Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C

1

Still air.

2

All values are modeled using a standard 4-layer JEDEC test board with the

pad soldered to the board and thermal vias in the board.

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. 0 | Page 7 of 48

AD8364

M

A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VPSA

INHA

INLA PWDN COMR

INLB

INHB

VPSB

25 26 27 28 29 30 31 32

CHPA

COM

DECA

24

23222120191817

AD8364

TOP VIEW

PIN 1 INDICATOR

12345

DECB

CHPB

COMB

ACO

VPSR

ADJA

ADJB

ACO

TEMP

678

VLVL

VREF

CLPA

VSTA

16

OUTA

15

FBKA

14

OUTP

13

OUTN

12

FBKB

11

OUTB

10

VSTB

9

CLPB

05334-002

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No. Mnemonic Description Equiv. Circuit

1 CHPB Connect to common via a capacitor to determine 3 dB point of Channel B input signal high-

pass filter.

2, 23 DECB, DECA Decoupling Terminals for INHA/INLA and INHB/INLB. Connect to common via a large

capacitance to complete input circuit. 3, 22, 29 COMB, COMA, COMR Input System Common Connection. Connect via low impedance to system common. 4, 5 ADJB, ADJA Temperature Compensation for Channel B and Channel A. An external voltage is connected

to these pins to improve temperature drift. This voltage can be derived from VREF, that is,

connect a resistor from VREF to ADJ[A, B] and another resistor from ADJ[A, B] to ground. The

value of these resistors change as the frequency changes. 6 VREF General-Purpose Reference Voltage Output of 2.5 V. 7 VLVL Reference Level Input for OUTP and OUTN. (Usually connected to VREF through a voltage

divider or left open). 8, 17 CLPB, CLPA Channel B and Channel A Connection for Loop Filter Integration (Averaging) Capacitor.

Connect a ground-referenced capacitor to this pin. A resistor can be connected in series with

this capacitor to improve loop stability and response time. 9 VSTB The voltage applied to this pin sets the decibel value of the required RF input voltage to

Channel B that results in zero current flow in the loop integrating capacitor pin, CLPB. 10 OUTB Channel B Output of Error Amplifier. In measurement mode, normally connected directly to

VSTB. 11 FBKB Feedback Through 1 kΩ to the Negative Terminal of the Integrated Op Amp Driving OUTN. 12 OUTN Channel Differencing Op Amp Output. In measurement mode, normally connected directly to

FBKB and follows the equation OUTN = OUTA − OUTB + VLVL. 13 OUTP Channel Differencing Op Amp Output. In measurement mode, normally connected directly to

FBKA and follows the equation OUTP = OUTA − OUTB + VLVL. 14 FBKA Feedback Through 1kΩ to the Negative Terminal of the Integrated Op Amp Driving OUTP. 15 OUTA Channel A Output of Error Amplifier. In measurement mode, normally connected directly to

VSTA. 16 VSTA The voltage applied to this pin sets the decibel value of the required RF input voltage to

Channel A that results in zero current flow in the loop integrating capacitor pin, CLPA. 18, 20 ACOM Analog Common for Channels A and B. Connect via low impedance to common. 21, 25, 32 VPSR, VPSA, VPSB Supply for the Input System of Channels A and B. Supply for the internal references. Connect

to +5 V power supply. 19 TEMP Temperature Sensor Output. 24 CHPA Connect to common via a capacitor to determine 3 dB point of Channel A input signal high-

pass filter. 26, 27 INHA, INLA Channel A High and Low RF Signal Input Terminal. 28 PWDN Disable/Enable Control Input. Apply logic high voltage to shut down the AD8364. 30, 31 INLB, INHB Channel B Low and High RF Signal Input Terminal. Under

Package

Exposed Paddle The exposed paddle on the under side of the package should be soldered to a ground plane

with low thermal and electrical characteristics.

Figure 52

Figure 68

Figure 54 Figure 58

Figure 56

Figure 57

Figure 58

Figure 57

Figure 56

Figure 53

Figure 52 Figure 55 Figure 52

Rev. 0 | Page 8 of 48

AD8364

TYPICAL PERFORMANCE CHARACTERISTICS

VP = 5 V; TA = +25°C, –40°C, +85°C; CLPA/B = OPEN. Colors: +25°C black, –40°C blue, +85°C red.

5

4

3

2

OUT[A, B] (V)

1

0

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

A

B

Figure 3. OUT[A, B] Volt age and Log Conformance vs. Input Amplitude at

450 MHz, Typical Device, ADJ[A, B] = 0 V, Sine Wave, Differential Drive,

Balun = Macom ETK4-2T

5

4

3

2

OUT[A, B] (V)

1

0 –60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

Figure 4. Distribution of OUT[A, B] Voltage and Error over Temperature After

Ambient Normalization vs. Input Amplitude for at Least 30 Devices from

Multiple Lots, Frequency = 450 MHz, ADJ[A, B] = 0 V, Sine Wave, Differential

Drive, Balun = Macom ETK4-2T

0.20

0.15

0.10

0.05

0

–0.05

OUTA–OUTB (V)

–0.10

–0.15

–0.20

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

Figure 5. Distribution of [OUTA – OUTB] Voltage vs. Input Amplitude over

Temperature for at Least 30 Devices from Multiple Lots, Frequency = 450 MHz,

ADJ[A, B] = 0 V, Sine Wave, Differential Drive, Balun = Macom ETK4-2T

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-060

ERROR (dB)

05334-075

05334-070

5

4

3

2

OUT [P, N] (V)

1

0

–60

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

OUTPOUTN

2.5

2.0

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

–2.5

20

05334-065

Figure 6. OUT[P, N] Volt age and Log Conformance vs. Input Amplitude at

450 MHz, with B Input Held at −25 dBm and A Input Swept, Typical Device,

ADJ[A, B] = 0 V, Sine Wave, Differential Drive, Balun = Macom ETK4-2T

(Note that the OUTP and OUTN Error Curves Overlap)

5

4

3 2

1

0

–1

OUTP–OUTN (V)

–2 –3

–4

–5

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-079

Figure 7. Distribution of [OUTP − OUTN] Voltage and Error over Temperature

After Ambient Normalization vs. Input Amplitude for at Least 30 Devices

from Multiple Lots, Frequency = 450 MHz, ADJ[A, B] = 0 V, Sine Wave,

Differential Drive, P

4

2

0

–2

–4

ERROR (dB)

–6

SERIES NAME INDICATES THE POLARITY AND MAGNITUDE OF THE

–8

DEVIATION APPLIED TO THE INHA INPUT, RELATIVE TO THE INLA INPUT, AS REFERENCED TO THE REF SIGNAL.

–10

Ch. B = −25 dBm, Channel A Swept

IN

+2DB

+1DB

+15DEG

+10DEG

REF

–15DEG

–10DEG

–1DB

–2DB

RF INPUT AT INLA (dBm)

10–40 –35 –30 –25 –20 –15 –10 –5 0 5

05334-003

Figure 8. Log Conformance vs. Input Amplitude at various Amplitude and

Phase Balance points, 450 MHz, Typical Device, ADJ[A, B] = 0 V, Sine Wave,

Differential Drive

Rev. 0 | Page 9 of 48

AD8364

5

4

3

2

OUT[A, B] (V)

1

0

–50 –40 –30 –20 –10 0 10

–60 20

INPUT AMPLITUDE (dBm)

B

Figure 9. OUT[A, B] Voltage and Log Conformance vs. Input Amplitude at

880 MHz, Typical Device, ADJ[A, B] = 0.5 V, Sine Wave, Differential Drive,

Balun = Mini-Circuits JTX-4-10T

2.5

2.0

1.5

1.0

A

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-061

5

4

3

2

OUT[P, N] (V)

1

0

–60 20

OUTN OUTP

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

Figure 12. OUT[P, N] Voltage and Log Conformance vs. Input Amplitude at

880 MHz, with B Input Held at −25 dBm and A Input Swept, Typical Device,

ADJ[A, B] = 0.5 V, Sine Wave, Differential Drive, Balun = JTX-4-10T

(Note that the OUTP and OUTN Error Curves Overlap)

ERROR (dB)

05334-066

5

4

3

2

OUT[A, B] (V)

1

0

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

B

2.5

2.0

1.5

1.0

A

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

–2.5

05334-076

Figure 10. Distribution of OUT[A, B] Voltage and Error over Temperature After

Ambient Normalization vs. Input Amplitude for at Least 15 Devices from

Multiple Lots, Frequency = 880 MHz, ADJ[A, B] = 0.5 V, Sine Wave, Differential

Drive, Balun =JTX-4-10T

0.20

0.15

0.10

0.05

0

–0.05

OUTA–OUTB (V)

–0.10

–0.15

–0.20

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

05334-071

Figure 11. Distribution of [OUTA – OUTB] Voltage vs. Input Amplitude over

Temperature for at Least 15 Devices from Multiple Lots, Frequency =

880 MHz, ADJ[A, B] = 0.5 V, Sine Wave, Differential Drive, Balun =JTX-4-10T

5

4 3

2 1 0

–1

OUTP–OUTN (V)

–2

–3

–4 –5

–60

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

2.5

2.0

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0 –2.5

20

05334-084

Figure 13. Distribution of [OUTP − OUTN] Voltage and Error over Temperature After Ambient Normalization vs. Input Amplitude for at Least 15 Devices from Multiple Lots, Frequency = 880 MHz, ADJ[A, B] =0.5 V, Sine

Wave, Differential Drive, P

4 2

0 –2 –4 –6 –8

–10

ERROR (dB)

–12 –14

SERIES NAME INDICATES THE POLARITY

–16

AND MAGNITUDE OF THE DEVIATION APPLIED TO THE INHA INPUT, RELATIVE

–18

TO THE INLA INPUT, AS REFERENCED TO THE REF SIGNAL.

–20

Ch. B = −25 dBm, Channel A Swept

IN

+30DEG

-15DEG

+1dB

+10DEG

+2dB

RF INPUT AT INLA (dBm)

+20DEG

REF

-2dB

-1dB

-10DEG 10–40 –35 –30 –25 –20 –15 –10 –5 0 5

05334-004

Figure 14. Log Conformance vs. Input Amplitude at Various Amplitude and

Phase Balance points, 880 MHz, Typical Device, ADJ[A, B] = 0.5 V, Sine Wave,

Differential Drive

Rev. 0 | Page 10 of 48

AD8364

5

4

3

2

OUT[A, B] (V)

1

0 –60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

A

B

Figure 15. OUT[A, B] Voltage and Log Conformance vs. Input Amplitude at

1.88 GHz, Typical Device, TADJ[A, B]= 0.65 V, Sine Wave, Differential Drive, Balun = Murata LDB181G8820C-110

5

4

3

2

OUT[A ,B] (V)

1

0 –60

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

Figure 16. Distribution of OUT[A, B] Voltage and Error over Temperature After

Ambient Normalization vs. Input Amplitude for at Least 20 Devices from

Multiple Lots, Frequency = 1.88 GHz, ADJ[A, B] = 0.65 V, Sine Wave,

Differential Drive, Balun = Murata LDB181G8820C-110

0.20

0.15

0.10

0.05

0

–0.05

OUTA–OUTB (V)

–0.10

–0.15

–0.20

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

Figure 17. Distribution of [OUTA – OUTB] Voltage vs. Input Amplitude over

Temperature for at Least 20 Devices from Multiple Lots, Frequency =

1.88 GHz, ADJ[A, B] = 0.65 V, Sine Wave, Differential Drive, Balun = Murata LDB181G8820C-110

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-062

5

4

3

2

OUT[P, N] (V)

1

0 –60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

OUTPOUTN

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-067

Figure 18. OUT[P, N] Voltage and Log Conformance vs. Input Amplitude at

1.88 GHz, with B Input Held at −25 dBm and A Input Swept, Typical Device, ADJ[A, B] = 0.65 V, Sine Wave, Differential Drive, Balun = Murata

LDB181G8820C-110 (Note that the OUTP and OUTN Error Curves Overlap)

2.5

2.0

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0 –2.5

20

05334-083

5

4

3 2

1

0

–1

OUTP–OUTN (V)

–2 –3

–4

–5

–6020–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-080

Figure 19. Distribution of [OUTP − OUTN] Voltage and Error over

Temperature After Ambient Normalization vs. Input Amplitude for at Least

20 Devices from Multiple Lots, Frequency = 1.88 GHz, ADJ[A, B] =0.65 V,

Ch. B = −25 dBm, Channel A Swept

IN

–2dB

REF

–1dB

+10deg

–10deg

–30deg

–20deg

+1dB

+20DEG

+30deg

+2dB

10–40 –30 –25 –20–35 –15 –10 –5 0 5

05334-005

05334-072

Sine Wave, Differential Drive, P

2

0

–2

–4

–6

–8

–10

ERROR (dB)

–12

–14

SERIES NAME INDICATES THE POLARITY AND MAGNITUDE OF THE DEVIATION APPLIED TO THE INHA INPUT, RELATIVE

–16

TO THE INLA INPUT, AS REFERENCED TO THE REF SIGNAL.

–18

RF INPUT AT INLA (dBm)

Figure 20. Log Conformance vs. Input Amplitude at Various Amplitude and

Phase Balance Points, 1.880 GHz, Typical Device, ADJ[A, B] = 0.65 V,

Sine Wave, Differential Drive

Rev. 0 | Page 11 of 48

AD8364

5

4

3

2

OUT[A, B] (V)

1

0 –60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

B

A

Figure 21. OUT[A, B] Voltage and Log Conformance vs. Input Amplitude at

2.14 GHz, Typical Device, ADJ[A, B] = 0.85 V, Sine Wave, Differential Drive, Balun = Murata LDB212G1020C-001

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-063

5

4

3

2

OUT[P, N] (V)

1

0

–60 20

OUTN OUTP

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

Figure 24. OUT[P, N] Voltage and Log Conformance vs. Input Amplitude at

2.14 GHz, with B Input Held at −25 dBm and A Input Swept, Typical Device, ADJ[A, B] = 0.85 V, Sine Wave, Differential Drive, Balun = Murata

LDB212G1020C-001 (Note that the OUTP and OUTN Error Curves Overlap)

ERROR (dB)

05334-068

5

4

3

2

OUT[A, B] (V)

1

0

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

B

A

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-077

Figure 22. Distribution of OUT[A, B] Voltage and Error over Temperature After

Ambient Normalization vs. Input Amplitude for at Least 3 Devices from

Multiple Lots, Frequency = 2.14 GHz, ADJ[A, B] = 0.85 V, Sine Wave,

Differential Drive, Balun = Murata LDB212G1020C-001

0.20

0.15

0.10

0.05

0

–0.05

OUTA–OUTB (V)

–0.10

–0.15

–0.20

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

05334-073

Figure 23. Distribution of [OUTA – OUTB] Voltage vs. Input Amplitude over

Temperature for 3 Devices from Multiple Lots, Frequency = 2.14 GHz,

ADJ[A, B] = 0.85 V, Sine Wave, Differential Drive, Balun = Murata

LDB212G1020C-001

5

4

3 2

1

0

–1

OUTP–OUTN (V)

–2 –3

–4

–5

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

ERROR (dB)

05334-081

Figure 25. Distribution of [OUTP − OUTN] Voltage and Error over

Temperature After Ambient Normalization vs. Input Amplitude for at Least

3 Devices from Multiple Lots, Frequency = 2.14 GHz, ADJ[A, B] = 0.85 V,

Sine Wave, Differential Drive, P

4 2

0 –2 –4 –6 –8

–10 –12

ERROR (dB)

–14 –16 –18

SERIES NAME INDICATES THE POLARITY AND MAGNITUDE OF THE DEVIATION

–20

APPLIED TO THE INHA INPUT, RELATIVE TO THE INLA INPUT, AS REFERENCED TO

–22

THE REF SIGNAL.

–24

RF INPUT AT INLA (dBm)

Ch. B = −25 dBm, Channel A Swept

IN

+30DEG

–20DEG –30DEG

10–40 –35 –30 –25 –20 –15 –10 –5 0 5

+2dB

REF

–10DEG

–2dB

–1dB

+1dB

+20DEG

+10DEG

05334-006

Figure 26. Log Conformance vs. Input Amplitude at Various Amplitude and

Phase Balance Points, 2.140 GHz, Typical Device, ADJ[A, B] = 0.85 V, Sine

Wave, Differential Drive

Rev. 0 | Page 12 of 48

AD8364

5

4

3

2

OUT[A, B] (V)

1

0 –60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

B

2.5

2.0

1.5

1.0

0.5

A

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

–2.5

05334-064

Figure 27. OUT[A, B] Voltage and Log Conformance vs. Input Amplitude at

2.5 GHz, Typical Device, ADJ[A, B] = 1.1 V, Sine Wave, Differential Drive, Balun = Murata LDB182G4520C-110

5

4

3

2

OUT[A, B] (V)

1

0

–60

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

2.5

2.0

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

–2.5

20

05334-078

Figure 28. Distribution of OUT[A, B] Voltage and Error over Temperature After

Ambient Normalization vs. Input Amplitude for at Least 15 Devices from

Multiple Lots, Frequency = 2.5 GHz, ADJ[A, B] = 1.1 V, Sine Wave, Differential

Drive, Balun = Murata LDB182G4520C-110

0.20

0.15

0.10

0.05

0

–0.05

OUTA–OUTB (V)

–0.10

–0.15

–0.20

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

05334-074

Figure 29. Distribution of [OUTA – OUTB] Voltage vs. Input Amplitude over

Temperature for at Least 15 Devices from Multiple Lots, Frequency = 2.5 GHz,

ADJ[A, B] = 1.1 V, Sine Wave, Differential Drive, Balun = Murata

LDB182G4520C-110

5

4

OUTN

3

2

OUT[P, N] (V)

1

0

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

OUTP

Figure 30. OUT[P, N] Voltage and Log Conformance vs. Input Amplitude at

2.5 GHz, with B Input Held at −25 dBm and A Input Swept, Typical Device, ADJ[A, B] = 1.1 V, Sine Wave, Differential Drive, Balun = Murata

LDB182G4520C-110 (Note that the OUTP and OUTN Error Curves Overlap)

5

4

3 2

1

0

–1

OUTP–OUTN (V)

–2 –3

–4

–5

–60 20

–50 –40 –30 –20 –10 0 10

INPUT AMPLITUDE (dBm)

Figure 31. Distribution of [OUTP − OUTN] Voltage and Error over

Temperature After Ambient Normalization vs. Input Amplitude for at Least

15 Devices from Multiple Lots, Frequency = 2.5 GHz, ADJ[A, B] =1.1 V, Sine

Wave, Differential Drive, P

4 2

0 –2 –4

+20DEG

–6 –8

–10 –12

ERROR (dB)

–14 –16 –18

SERIES NAME INDICATES THE POLARITY AND

–20

MAGNITUDE OF THE DEVIATION APPLIED TO THE INHA INPUT, RELATIVE TO THE INLA INPUT,

–22

AS REFERENCED TO THE REF SIGNAL.

–24

Ch. B = −25 dBm, Channel A Swept

IN

–1dB

+30DEG

RF INPUT AT INLA (dBm)

REF

–10DEG

+10DEG

–20DEG

+1dB

+2dB

–30DEG

–2dB

Figure 32. Log Conformance vs. Input Amplitude at Various Amplitude and

Phase Balance Points, 2.500 GHz, Typical Device, ADJ[A, B] = 1.1 V, Sine Wave,

Differential Drive

2.5

2.0

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

–2.5

05334-069

2.5

2.0

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

–2.5

05334-082

10–40 –35 –30 –25 –20 –15 –10 –5 0 5

05334-007

Rev. 0 | Page 13 of 48

AD8364

2.0

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

ERROR CW

ERROR 256 QAM 8dB CF

ERROR 16C CDMA2K 9CH SR1 14dB CF

ERROR 1C TM1-32 DPCH 13dB CF

PIN MEAS (dBm)

ERROR QPSK 4dB CF

20–60 –55 –50 –45 –40–35 –30 –25 –20 –15 –10 –5 0 5 10 15

05334-008

Figure 33. Output Error from CW Linear Reference vs. Input Amplitude with

Different Waveforms, CW, QPSK, 256QAM, WCDMA 1-Carrier Test Model 1

with 32 DPCH, CDMA2000, 16-Carrier, 9-Channel SR1 Frequency 2.140 GHz,

CLP[A, B] = 1 µF, Balun = Murata LDB212G1020C-001

2

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

CARRIER TM1-64

ERROR 2

CARRIER TM1-64

ERROR CW

ERROR 3

CARRIER TM1-64

ERROR 1

ERROR 4 CARRIER TM1-64

PIN MEAS (dBm)

20–60 –55 –50 –45 –35 –30 –25 –20 –15 –5–10 0 5 10 15–40

05334-009

Figure 34. Error from CW Linear Reference vs. Input Amplitude with Different Waveforms, CW, WCDMA1, 2-, 3-, and 4-Carrier, Test Model 1 with 64 DPCH,

Frequency 2.14 GHz, Balun = Murata LDB212G1020C-001

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

ERROR 3 CARRIER CDMA2K SR1

PIN MEAS (dBm)

ERROR 4 CARRIER WCDMA TM 1-64

ERROR CW

20–60 –55 –50 –45 –40–35 –30 –25 –20 –15 –10 –5 0 5 10 15

05334-010

Figure 35. Output Voltage and Error from CW Linear Reference vs. Input

Amplitude with Different Waveforms, CW, 3-Carrier CDMA2000 SR1,

4-Carrier WCDMA, Test Model 1 with 64 DPCH, Frequency 2.140 GHz,

Balun = Murata LDB212G1020C-001

2.0

1.5

1.0

0.5

0

–0.5

ERROR (dB)

–1.0

–1.5

–2.0

ERROR FWD 1 CARRIER CDMA2K PILOTSR1

ERROR CW

ERROR FWD 4 CARRIER CDMA2K 9CH SR1

ERROR FWD 4

CARRIER CDMA2K

9CH SR1

ERROR FWD 16

CARRIER CDMA2K

9CH SR1

ERROR FWD 3

CARRIER CDMA2K

PIN MEAS (dBm)

ERROR FWD 1 CARRIER CDMA2K 9CH SR1

9CH SR1

20–60 –55 –50 –45 –40–35 –30 –25 –20 –15 –10 –5 0 5 10 15

05334-011

Figure 36. Error from CW Linear Reference vs. Input Amplitude with Different

Waveforms, CW, 1-Carrier CDMA2000 Pilot CH SR1, 1-Carrier CDMA2000

9CH SR1, 3-Carrier CDMA2000 9CH SR1, 4-Carrier CDMA2000 9CH SR1

Frequency 16-Carrier CDMA2000 9CH SR1, Frequency 2.140 GHz, Balun =

Murata LDB212G1020C-001

Rev. 0 | Page 14 of 48

AD8364

90

120

150

210

240

270

60

300

Figure 37. Differential Input Impedance (S11) vs. Frequency; Z

14

12

10

8

TOTAL = 40 DEVICES RF INPUT = –60dBm

30

0180

330

= 50 Ω

O

05334-053

20

15

10

5

(mV)

REF

0

–5

CHANGE IN V

–10

–15

–20

TEMPERATURE (°C)

Figure 40. Change in VREF vs. Temperature for 11 Devices

10000

1000

450MHz, 0dB

450MHz, –20dB

2140MHz, 0dB

450MHz, –40dB

2140MHz, –20dB

2140MHz, –40dB

90–40 –20 –10 0 10–30 203040 60708050

05334-014

6

COUNT

4

2

0

V

(V)

REF

Figure 38. Distribution of VREF for 40 Devices

14

12

10

8

6

COUNT

4

2

0

0.617 0.619 0.6250.6230.621 0.627 V

REF

TOTAL = 40 DEVICES RF INPUT = –60dBm

(V)

Figure 39. Distribution of TEMP Voltage for 40 Devices

100

OUTPUT NOISE (nV/ Hz)

450MHz, RF OFF

2.5062.486 2.490 2.494 2.5022.488 2.492 2.4982.496 2.5042.500

05334-012

10

100 1k 10k 100k 1M 10M

450MHz

FREQUENCY (Hz)

05334-057

Figure 41. Noise Spectral Density of OUT[A, B]; CLP[A, B] = Open

10000

0dB

05334-013

1000

100

OUTPUT NOISE (nV/ Hz)

10

100 1k 10k 100k 1M 10M

–20dB

–40dB

FREQUENCY (Hz)

RF OFF

05334-059

Figure 42. Noise Spectral Density of OUT[P, N]; CLP[A, B] = 0.1 µF,

Frequency = 2140 MHz

Rev. 0 | Page 15 of 48