Analog Devices AD8353 Datasheet

100 MHz–2.7 GHz

FEATURES Fixed Gain of 20 dB Operational Frequency of 100 MHz to 2.7 GHz Linear Output Power Up to 9 dBm Input/Output Internally Matched to 50 ⍀ Temperature and Power Supply Stable Noise Figure 5.3 dB Power Supply 3 V or 5 V

APPLICATIONS VCO Buffers General Tx/Rx Amplification Power Amplifier Predriver Low Power Antenna Driver

PRODUCT DESCRIPTION

The AD8353 is a broadband, fixed-gain linear amplifier that operates at frequencies from 100 MHz up to 2.7 GHz. It is intended for use in a wide variety of wireless devices including cellular, broadband, CATV, and LMDS/MMDS applications.

By taking advantage of Analog Devices’ high-performance complementary Si bipolar process, these gain blocks provide excellent stability over process, temperature, and power supply. This amplifier is single-ended and internally matched to 50 Ω with a return loss of greater than 10 dB over the full operating frequency range.

The AD8353 provides linear output power of 9 dBm of gain at 900 MHz when biased at 3 V and an choke is connected between the power supply and the output pin. The dc supply current is 42 mA. At 900 MHz, order intercept (OIP3) is greater than 23 dBm, at 2.7 GHz.

with 20 dB

external RF

the outpu t third

and is 19 dBm

RF Gain Block

AD8353

FUNCTIONAL BLOCK DIAGRAM

BIAS AND VREF

INPT VOUT

COM1

The noise figure is 5.3 dB at 900 MHz. The reverse isolation

) is –36 dB at 900 MHz and –30 dB at 2.7 GHz.

The AD8353 can also operate with a 5 V power supply, in which case no external inductor is required. Under these conditions, the AD8353 delivers 8 dBm with 20 dB of gain at 900 MHz. The dc supply current is 42 mA. At 900 MHz, the OIP3 is greater than 22 dBm and is 19 dBm at 2.7 GHz. The noise figure is 5.6 dB at 900 MHz. The reverse isolation (S

The AD8353 is fabricated on Analog Devices’ proprietary, highperformance 25 GHz Si complementary bipolar IC process. The AD8353 is available in a chip scale package that utilizes an exposed paddle for excellent thermal impedance and low impedance electrical connection to ground. It operates over a –40°C to +85°C temperature range.

An evaluation board is available.

AD8353

VPOS

COM2

) is –35 dB.

REV. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002

(VS = 3 V, TA = 25ⴗC, 100 nH external inductor between VOUT and VPOS, ZO = 50 ⍀,

AD8353–SPECIFICATIONS

unless otherwise noted.)

Parameters Conditions Min Typ Max Unit

OVERALL FUNCTION

Frequency Range 0.1 2.7 GHz Gain f = 900 MHz 19.8 dB

f = 1.9 GHz 17.7 dB f = 2.7 GHz 15.6 dB

Delta Gain f = 900 MHz, –40°C ⱕ T

f = 1.9 GHz, –40°C ⱕ T f = 2.7 GHz, –40°C ⱕ T

ⱕ +85°C –0.97 dB

ⱕ +85°C –1.15 dB

ⱕ +85°C –1.34 dB

Gain Supply Sensitivity VPOS ± 10%, f = 900 MHz 0.04 dB/V

f = 1.9 GHz –0.004 dB/V f = 2.7 GHz –0.04 dB/V

Reverse Isolation (S

) f = 900 MHz –35.6 dB

f = 1.9 GHz –34.9 dB f = 2.7 GHz –30.3 dB

RF INPUT INTERFACE Pin RFIN

Input Return Loss f = 900 MHz 22.3 dB

f = 1.9 GHz 20.9 dB f = 2.7 GHz 11.2 dB

RF OUTPUT INTERFACE Pin VOUT

Output Compression Point f = 900 MHz, 1 dB compression 9.1 dBm

f = 1.9 GHz 8.4 dBm f = 2.7 GHz 7.6 dBm

Delta Compression Point f = 900 MHz, –40°C ⱕ T

f = 1.9 GHz, –40°C ⱕ T f = 2.7 GHz, –40°C ⱕ T

ⱕ +85°C –1.46 dB

ⱕ +85°C –1.17 dB

ⱕ +85°C–1dB

Output Return Loss f = 900 MHz 26.3 dB

f = 1.9 GHz 16.9 dB f = 2.7 GHz 13.3 dB

DISTORTION/NOISE

Output Third Order Intercept f = 900 MHz, ⌬f = 1 MHz, P

f = 1.9 GHz, ⌬f = 1 MHz, P f = 2.7 GHz, ⌬f = 1 MHz, P

Output Second Order Intercept f = 900 MHz, ⌬f = 1 MHz, P

= –28 dBm 23.6 dBm

= –28 dBm 20.8 dBm

= –28 dBm 19.5 dBm

= –28 dBm 31.6 dBm

Noise Figure f = 900 MHz 5.3 dB

f = 1.9 GHz 6 dB f = 2.7 GHz 6.8 dB

POWER INTERFACE Pin VPOS

Supply Voltage 2.7 3 3.3 V Total Supply Current 35 41 48 mA Supply Voltage Sensitivity 15.3 mA/V Temperature Sensitivity –40°C ⱕ TA ⱕ +85°C60␮A/°C

Specifications subject to change without notice.

–2–

REV. 0

AD8353

SPECIFICATIONS

(VS = 5 V, TA = 25ⴗC, no external inductor between VOUT and VPOS, ZO = 50 ⍀, unless otherwise noted.)

Parameters Conditions Min Typ Max Unit

OVERALL FUNCTION

Frequency Range 0.1 2.7 GHz Gain f = 900 MHz 19.5 dB

f = 1.9 GHz 17.6 dB f = 2.7 GHz 15.7 dB

Delta Gain f = 900 MHz, –40°C ⱕ T

f = 1.9 GHz, –40°C ⱕ T f = 2.7 GHz, –40°C ⱕ T

ⱕ +85°C –0.96 dB

ⱕ +85°C –1.18 dB

ⱕ +85°C –1.38 dB

Gain Supply Sensitivity VPOS ± 10%, f = 900 MHz 0.09 dB/V

f = 1.9 GHz –0.01 dB/V f = 2.7 GHz –0.09 dB/V

Reverse Isolation (S

) f = 900 MHz –35.4 dB

f = 1.9 GHz –34.6 dB f = 2.7 GHz –30.2 dB

RF INPUT INTERFACE Pin RFIN

Input Return Loss f = 900 MHz 22.9 dB

f = 1.9 GHz 21.7 dB f = 2.7 GHz 11.5 dB

RF OUTPUT INTERFACE Pin VOUT

Output Compression Point f = 900 MHz 8.3 dBm

f = 1.9 GHz 8.1 dBm f = 2.7 GHz 7.5 dBm

Delta Compression Point f = 900 MHz, –40°C ⱕ T

f = 1.9 GHz, –40°C ⱕ T f = 2.7 GHz, –40°C ⱕ T

ⱕ +85°C –1.05 dB

ⱕ +85°C –1.49 dB

ⱕ +85°C –1.33 dB

Output Return Loss f = 900 MHz 27 dB

f = 1.9 GHz 22 dB f = 2.7 GHz 14.3 dB

DISTORTION/NOISE

Output Third Order Intercept f = 900 MHz, ⌬f = 1 MHz, P

f = 1.9 GHz, ⌬f = 1 MHz, P f = 2.7 GHz, ⌬f = 1 MHz, P

Output Second Order Intercept f = 900 MHz, ⌬f = 1 MHz, P

= –28 dBm 22.8 dBm

= –28 dBm 20.6 dBm

= –28 dBm 19.5 dBm

= –28 dBm 30.3 dBm

Noise Figure f = 900 MHz 5.6 dB

f = 1.9 GHz 6.3 dB f = 2.7 GHz 7.1 dB

POWER INTERFACE Pin VPOS

Supply Voltage 4.5 5 5.5 V Total Supply Current 35 42 52 mA Supply Voltage Sensitivity 4.3 mA/V Temperature Sensitivity –40°C ⱕ TA ⱕ +85°C45.7␮A/°C

Specifications subject to change without notice.

REV. 0

–3–

AD8353

WARNING!

ESD SENSITIVE DEVICE

TOP VIEW

(Not to Scale)

NC = NO CONNECT

COM1

INPT

COM1

VOUT

VPOS

COM2COM2

AD8353

ABSOLUTE MAXIMUM RATINGS*

Supply Voltage VPOS . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V

Input Power (re: 50 Ω) . . . . . . . . . . . . . . . . . . . . . . . 10 dBm

Equivalent Voltage . . . . . . . . . . . . . . . . . . . . . . 700 mV rms

Internal Power Dissipation

Paddle Not Soldered . . . . . . . . . . . . . . . . . . . . . . . 325 mW

Paddle Soldered . . . . . . . . . . . . . . . . . . . . . . . . . . . 812 mW

(Paddle Soldered) . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W

␪

(Paddle Not Soldered) . . . . . . . . . . . . . . . . . . . . 200°C/W

Maximum Junction Temperature . . . . . . . . . . . . . . . . 150°C

Operating Temperature Range . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering 60 sec) . . . . . . . . 240°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ORDERING GUIDE

Temperature Package Package

Model Range Description Option

AD8353ACP–REEL7 –40°C to +85°C 7" Tape and Reel CP-8 AD8353–EVAL Evaluation Board

PIN CONFIGURATION

PIN FUNCTION DESCRIPTIONS

Pin Mnemonic Description

1, 8 COM1 Device Common.

Connect to low impedance ground.

3 INPT RF Input Connection.

Must be ac-coupled.

4, 5 COM2 Device Common.

Connect to low

impedance ground. 6 VPOS Positive Supply Voltage 2 NC No Connection 7 VOUT RF Output Connection.

Must be ac-coupled.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8353 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

–4–

REV. 0

FREQUENCY – MHz

500 1000 1500 2000 2500

GAIN – dB

3000

GAIN AT –40ⴗC

GAIN AT +85ⴗC

GAIN AT +25ⴗC

FREQUENCY – MHz

500 1000 1500 3000

REVERSE ISOLATION – dB

–20

–30

–10

–15

–25

–5

S12 AT –40ⴗC

S12 AT +85ⴗC

250020000

S12 AT +25ⴗC

–35

–40

Typical Performance Characteristics–

AD8353

120

150

180

210

240

270

330

300

TPC 1. S11 vs. Frequency, VS = 3 V, TA = 25ⴗC, 100 MHz

≤

f ≤ 3 GHz

GAIN AT 3.3V

120

150

180

210

240

270

330

300

TPC 4. S22 vs. Frequency, VS = 3 V, TA = 25ⴗC, 100 MHz

≤

f ≤ 3 GHz

GAIN AT 2.7V

GAIN – dB

500 1000 1500 2000 3000

FREQUENCY – MHz

TPC 2. Gain vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V,

= 25ⴗC

–5

–10

–15

–20

–25

–30

REVERSE ISOLATION – dB

–35

–40

TPC 3. Reverse Isolation vs. Frequency,

and 3.3 V, T

REV. 0

S12 AT 3.0V

S12 AT 3.3V

= 25ⴗC

S12 AT 2.7V

500 1000 1500 3000

FREQUENCY – MHz

GAIN AT 3.0V

VS = 2.7 V, 3 V,

2500

250020000

TPC 5. Gain vs. Frequency, VS = 3 V, TA = –40ⴗC, +25ⴗC,

ⴗ

and +85

TPC 6. Reverse Isolation vs. Frequency,

VS = 3 V,

= –40ⴗC, +25ⴗC, and +85ⴗC

–5–

AD8353

– dBm

dB 1

TPC 7. P

= 25ⴗC

PERCENTAGE – %

7.0 7.2

P1 dB AT 3.3V

P1 dB AT 3.0V

1000 1500 2000 2500

500

vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V,

1 dB

7.4 7.6 7.8 8.0 8.2 8.4 8.6 8.8 9.0

OUTPUT 1 dB COMPRESSION POINT – dBm

FREQUENCY – MHz

P1 dB AT 2.7V

3000

– dBm

dB 1

TPC 10. P and +85

PERCENTAGE – %

P1 dB AT –40ⴗC

P1 dB AT +25ⴗC

500 1000 1500 2000 2500 3000

vs. Frequency, VS = 3 V, TA = –40ⴗC, +25ⴗC,

1 dB

ⴗ

19.5 19.9 20.3 20.7 21.1 21.5 21.9

19.1

FREQUENCY – MHz

OIP3 – dBm

P1 dB AT +85ⴗC

TPC 8. Distribution of P

= 3 V, TA = 25ⴗC,

1 dB VS

f = 2.2 GHz

OIP3 – dBm

500 1000 1500 2000 2500

OIP3 AT 3.0V

FREQUENCY – MHz

OIP3 AT 3.3V

OIP3 AT 2.7V

3000

TPC 9. OIP3 vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V,

= 25ⴗC

TPC 11. Distribution of OIP3, VS = 3 V,

TA = 25ⴗC,

f = 2.2 GHz

OIP3 – dBm

OIP3 AT +85ⴗC

500 1000 1500 2000 2500

OIP3 AT –40ⴗC

OIP3 AT +25ⴗC

3000

FREQUENCY – MHz

TPC 12. OIP3 vs. Frequency, VS = 3 V, TA = –40ⴗC, +25ⴗC,

ⴗ

and +85

–6–

REV. 0

8.0

FREQUENCY – MHz

500 1000 1500 2000 2500

NOISE FIGURE – dB

5.5

5.0

4.5

3000

8.5

6.5

4.0

7.0

6.0

7.5

8.0

NF AT –40ⴗC

NF AT +25ⴗC

NF AT +85ⴗC

7.5

7.0

AD8353

6.5

6.0

5.5

NOISE FIGURE – dB

5.0

4.5

4.0 0

TPC 13. Noise Figure vs. Frequency,

and 3.3 V, T

PERCENTAGE – %

5.90 5.95

NF AT 3.3V

NF AT 2.7V

NF AT 3.0V

500 1000 1500 2000 2500

FREQUENCY – MHz

VS = 2.7 V, 3 V,

= 25ⴗC

6.00 6.10 6.15 6.30 6.35 6.45 6.50 6.556.20 6.25 6.40 6.606.05 NOISE FIGURE – dB

TPC 14. Distribution of Noise Figure, VS = 3 V,

= 25ⴗC, f = 2.2 GHz

3000

TPC 16. Noise Figure vs. Frequency, VS = 3 V, T

= –40°C, +25°C, and +85°C

SUPPLY CURRENT – mA

–60

–40 20 60 80–20 100

TPC 17. Supply Current vs. Temperature,

IS AT 3.3V

IS AT 3.0V

IS AT 2.7V

040

TEMPERATURE – ⴗC

VS = 2.7 V,

3 V, and 3.3 V

150

180

210

TPC 15.

100 MHz

REV. 0

≤

f ≤ 3 GHz

120

240

270

300

vs. Frequency, VS = 5 V, TA = 25°C,

330

120

150

180

210

TPC 18.

100 MHz

240

270

vs. Frequency, VS = 5 V, TA = 25°C,

≤

f ≤ 3 GHz

330

300

–7–

AD8353

GAIN AT 5.5V

GAIN AT 5.0V

GAIN – dB

500 1000 1500

GAIN AT 4.5V

2000 300025000

FREQUENCY – MHz

TPC 19. Gain vs. Frequency, VS = 4.5 V, 5 V, and

5.5 V, T

–10

–15

= 25ⴗC

–5

GAIN AT –40ⴗC

GAIN AT +25ⴗC

2000 2500 3000

FREQUENCY – MHz

GAIN – dB

GAIN AT +85ⴗC

500 1000 1500

TPC 22. Gain vs. Frequency, VS = 5 V, TA = –40°C,

+25

ⴗ

C, and +85ⴗC

–5

–10

–15

–20

–25

S12 AT 5V

–30

REVERSE ISOLATION – dB

–35

–40

TPC 20.

500 1000 1500 2000 2500

Reverse Isolation vs. Frequency,

5 V, and 5.5 V, T

– dBm

dB 1

TPC 21. and 5.5 V, T

500 1000 1500 2000 2500

1 dB

S12 AT 5.5V

S12 AT 4.5V

FREQUENCY – MHz

VS = 4.5 V,

= 25ⴗC

P1 dB AT 5.5V

P1 dB AT 4.5V

P1 dB AT 5.0V

FREQUENCY – MHz

vs. Frequency, VS = 4.5 V,

= 25ⴗC

5 V,

3000

–20

REVERSE ISOLATION – dB

–25

–30

–35

–40

S12 AT +85ⴗC

500 1000 1500

FREQUENCY – MHz

S12 AT +25ⴗC

2000

S12 AT –40ⴗC

2500 30000

TPC 23. Reverse Isolation vs. Frequency, VS = 5 V,

= –40ⴗC, +25ⴗC, and +85ⴗC

P1 dB AT +85ⴗC

– dBm

dB 1

TPC 24. +25

ⴗ

C, and +85ⴗC

500 1000 1500 2000 2500

1 dB

FREQUENCY – MHz

vs. Frequency, VS = 5 V,

P1 dB AT +25ⴗC

P1 dB AT –40ⴗC

3000

TA = –40ⴗC,

–8–

REV. 0

AD8353

FREQUENCY – MHz

500 1000 1500 2000 2500

OIP3 – dBm

3000

OIP3 AT –40ⴗC

OIP3 AT +25ⴗC

OIP3 AT +85ⴗC

FREQUENCY – MHz

500 1000 1500 2000 2500

NOISE FIGURE – dB

3000

NF AT –40ⴗC

NF AT +85ⴗC

NF AT +25ⴗC

PERCENTAGE – %

7.0 7.2

7.4 7.8 8.2 8.4 8.68.0 8.87.6

OUTPUT 1 dB COMPRESSION POINT – dBm

TPC 25. Distribution of P f = 2.2 GHz

, VS = 3 V, TA = 25°C,

1 dB

OIP3 AT 5.5V

PERCENTAGE – %

18.8 20.0

19.619.2

20.4 21.2 21.620.8

OIP3 – dBm

TPC 28. Distribution of OIP3, VS = 5 V,

f = 2.2 GHz

TA = 25ⴗC,

OIP3 – dBm

500

TPC 26.

5.5 V, T

9.0

8.5

8.0

7.5

7.0

6.5

6.0

NOISE FIGURE – dB

5.5

5.0

4.5

4.0

TPC 27.

and 5.5 V, T

REV. 0

OIP3 vs. Frequency, VS = 4.5 V,

= 27ⴗC

NF AT 5.0V

500 1000 1500 2000 2500

Noise Figure vs. Frequency, VS = 4.5 V, 5 V,

= 25ⴗC

OIP3 AT 5.0V

1000 1500 2000 2500

FREQUENCY – MHz

NF AT 5.5V

FREQUENCY – MHz

OIP3 AT 4.5V

5 V, and

NF AT 4.5V

3000

TPC 29. +25

OIP3 vs. Frequency, VS = 5 V,

ⴗ

C, and +85ⴗC

TA = –40ⴗC,

TPC 30. Noise Figure vs. Frequency, VS = 5 V, TA = –40ⴗC,

ⴗ

C, and +85ⴗC

+25

–9–

AD8353

PERCENTAGE – %

6.20 6.25 6.30 6.35 6.45 6.55 6.60 6.65 6.706.40 6.50

6.10 6.15 NOISE FIGURE – dB

TPC 31. Distribution of Noise Figure, VS = 5 V,

= 25ⴗC, f = 2.2 GHz

IS AT 5.0V

IS AT 5.5V

TEMPERATURE – ⴗC

IS AT 4.5V

604020–20–40

100

SUPPLY CURRENT – mA

0 –60 0 80

– dBm

OUT

–5

–10

–15

–30

–20 –15 –10 –50

PIN – dBm

5–25

TPC 33. Output Power and Gain vs. Input Power, V

= 3 V, TA = 25ºC, f = 900 MHz

– dBm

OUT

–5

–10

–15

–30

–20 –15 –10 –50

PIN – dBm

5–25

GAIN – dB

TPC 32. Supply Current vs. Temperature,

5 V, and 5.5 V

VS = 4.5 V,

TPC 34. Output Power and Gain vs. Input Power,

= 5 V, TA = 25ºC, f = 900 MHz

–10–

REV. 0

AD8353

THEORY OF OPERATION

The AD8353 is a two-stage feedback amplifier employing both shunt-series and shunt-shunt feedback. The first stage is degenerated and resistively loaded, and provides approximately 10 dB of gain. The second stage is a PNP-NPN Darlington output stage, which provides another 10 dB of gain. Series-shunt feedback from the emitter of the output transistor sets the input

APPLICATIONS

The AD8353 RF Gain Block may be used as a general purpose fixed-gain amplifier in a wide variety of applications, such as a driver for a transmitter power amplifier (Figure 1). Its excellent reverse isolation also makes this amplifier suitable for use as a local oscillator buffer amplifier that would drive the local oscilla-

tor port of an up or down converter mixer (Figure 2). impedance to 50 Ω over a broad frequency range. Shunt-shunt feedback from the amplifier output to the input of the Darlington stage helps to set the output impedance to 50 Ω. The amplifier can be operated from a 3 V supply by adding a choke inductor from the amplifier output to VPOS. Without

this choke induc-

tor, operation from a 5 V supply is also possible.

BASIC CONNECTIONS

The AD8353 RF Gain Block is a fixed-gain amplifier with single-ended input and output ports whose impedances are nominally equal to 50 Ω over the frequency range 100 MHz to

2.7 GHz. Consequently, it can be directly inserted into a 50 Ω system with no impedance-matching circuitry required. The input and output impedances are sufficiently stable versus variations in temperature and supply voltage that no impedance matching compensation is required. A complete set of scattering parameters is available at the Analog Devices website (www.analog.com).

The input pin (INPT) is connected directly to the base of the first amplifier stage, which is internally biased to approximately 1 V, so a dc-blocking capacitor should be connected between the source that drives the AD8353 and the input pin, INPT.

INPUT

It is critical to supply very low inductance ground connections to the ground pins (pins 1, 4, 5, and 8) as well as to the backside exposed paddle. This will ensure stable operation.

The AD8353 is designed to operate over a wide supply voltage range, from 2.7 V to 5.5 V. The output of the part, VOUT, is taken directly from the collector of the output amplifier stage. This node is internally biased to approximately 2.2 V when the supply voltage is 5 V. Consequently, a dc-blocking capacitor should be connected between the output pin, VOUT, and the load that it drives. The value of this capacitor is not critical, but it should be 100 pF or larger.

When the supply voltage is 3 V, it is recommended that an external RF choke be connected between the supply voltage and

EVALUATION BOARD

Figure 3 shows the schematic of the AD8353 evaluation board.

Note that L1 is shown as an optional component that is used to

obtain maximum gain only when VP = 3 V. The board is powered

by a single supply in the range 2.7 V to 5.5 V. The power supply

is decoupled by a 0.47 µF and a 100 pF capacitor.

the output pin, VOUT. This will increase the dc voltage applied to the collector of the output amplifier stage, which will improve performance of the AD8353 to be very similar to the performance produced when 5 V is used for the supply voltage. The inductance of the RF choke should be approximately 100 nH, and care should be taken to ensure that the lowest series self-resonant frequency

Component Function Default Value

C1, C2 AC-Coupling Capacitors 1000 pF, 0603

C3 High-Frequency Bypass of this choke is well above the maximum frequency of operation

for the AD8353.

The supply voltage input, VPOS, should be bypassed using a large value capacitance (approximately 0.47 µF or larger) and a

C4 Low-Frequency Bypass

L1 Optional RF Choke,

smaller, high-frequency bypass capacitor (approximately 100 pF) physically located close to the VPOS pin.

The recommended connections and components are shown in the schematic of the AD8353 evaluation board.

AD8353

HIGH POWER

AMPLIFIER

Figure 1. AD8353 as a Driver Amplifier

MIXER

AD8353

LOCAL OSCILLATOR

Figure 2. AD8353 as a LO Driver Amplifier

AD8353

1000pF

COM1

INPT

NC = NO CONNECT

COM1

VOUT

VPOS

COM2COM2

1000pF

C3 100pFC40.47␮F

OUTPUT

Figure 3. Evaluation Board Schematic

Table I. Evaluation Board Configuration Options

Capacitor 100 pF, 0603

Capacitor 0.47 µF, 0603

used to increase current through when V

output stage

= 3 V.

Not recommended for use when VP = 5 V. 100 nH, 0603

REV. 0

–11–

AD8353

C02721–0–2/02(0)

Figure 4. Silkscreen Top

1.95

1.75

1.55

PIN 1

INDICATOR

3.25

3.00

2.75

2.95

2.75

2.55

SEATING

PLANE

OUTLINE DIMENSIONS

Dimensions shown in millimeters.

8-Lead LFCSP

(CP-8)

1.89

1.74

1.59

BOTTOM VIEW

0.30

0.23

0.18

12ⴗ

0ⴗ

2.25

2.00

1.75

0.25 REF

0.05

0.02

0.00

0.60

0.45

0.30

0.50 BSC

1.00

0.90

0.80

NOTES

1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS.

2. PADDLE IS COPPER PLATED WITH LEAD FINISH.

Figure 5. Component Side

0.55

0.40

0.30

0.15

0.10

0.05

0.25

0.20

0.15

–12–

PRINTED IN U.S.A.

REV. 0

Analog Devices AD8353 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual