Analog Devices AD8353 Service Manual

1 MHz to 2.7 GHz

FEATURES

Fixed gain of 20 dB
Operational frequency of 1 MHz to 2.7 GHz
Linear output power up to 9 dBm
Input/output internally matched to 50 Ω
Temperature and power supply stable
Noise figure: 5.3 dB
Power supply: 3 V or 5 V

APPLICATIONS

VCO buffers
General Tx/Rx amplification
Power amplifier predrivers
Low power antenna drivers

GENERAL DESCRIPTION

The AD8353 is a broadband, fixed-gain, linear amplifier that
operates at frequencies from 1 MHz up to 2.7 GHz. It is
intended for use in a wide variety of wireless devices, including
cellular, broadband, CATV, and LMDS/MMDS applications.

By taking advantage of ADI’s high performance, complementary Si
bipolar process, these gain blocks provide excellent stability
over process, temperature, and power supply. This amplifier is
single-ended and internally matched to 50 Ω with a return loss
of greater than 10 dB over the full operating frequency range.

The AD8353 provides linear output power of 9 dBm with 20 dB
of gain at 900 MHz when biased at 3 V and an external RF
choke is connected between the power supply and the output
pin. The dc supply current is 42 mA. At 900 MHz, the output
third-order intercept (OIP3) is greater than 23 dBm and is
19 dBm at 2.7 GHz.

RF Gain Block

AD8353

FUNCTIONAL BLOCK DIAGRAM

BIAS AND VREF

RFIN

AD8353

Figure 1.

The noise figure is 5.3 dB at 900 MHz. The reverse isolation
(S

) is −36 dB at 900 MHz and −30 dB at 2.7 GHz.

12

The AD8353 can also operate with a 5 V power supply; in
which case, no external inductor is required. Under these
conditions, the AD8353 delivers 8 dBm with 20 dB of gain at
900 MHz. The dc supply current is 42 mA. At 900 MHz, the
OIP3 is greater than 22 dBm and is 19 dBm at 2.7 GHz. The noise
figure is 5.6 dB at 900 MHz. The reverse isolation (S

The AD8353 is fabricated on ADI’s proprietary, high performance,
25 GHz, Si complementary, bipolar IC process. The AD8353 is
available in a chip scale package that uses an exposed paddle for
excellent thermal impedance and low impedance electrical
connection to ground. It operates over a −40°C to +85°C
temperature range, and an evaluation board is also available.

VPOS

RFOUT

COM2COM1

02721-001

) is −35 dB.

12

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

AD8353

TABLE OF CONTENTS

Features .............................................................................................. 1

Typical Perf or m an c e Charac t e r istics ..............................................7

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

REVISION HISTORY

12/05—Rev. A to Rev. B

Changes to Table 1............................................................................ 3

Changes to Table 2............................................................................ 4

Changes to Figure 16........................................................................ 9

Changes to Figure 32...................................................................... 11

Moved Figure 39 to Page 15; Renumbered Sequentially........... 15

Changes to Ordering Guide.......................................................... 16

Theory of Operation ...................................................................... 13

Basic Connections...................................................................... 13

Applications..................................................................................... 14

Low Frequency Applications Below 100 MHz........................... 14

Evaluation Board ............................................................................ 15

Outline Dimensions ....................................................................... 16

Ordering Guide .......................................................................... 16

8/05—Rev. 0 to Rev. A

Updated Format..................................................................Universal

Changes to Product Title................................................................. 1

Changes to Features, Figure 1, and General Description............ 1

Changes to Table 1............................................................................ 3

Changes to Table 2............................................................................ 4

Changes to Figure 2 and Table 4..................................................... 6

Changes to Figure 3 caption and Figure 6 caption....................... 7

Changes to Figure 17 caption and Figure 20 caption .................. 9

Changes to Basic Connections Section........................................ 13

Added Low Frequency Applications Below 100 MHz Section. 14

Changes to Table 5.......................................................................... 15

Changes to Ordering Guide.......................................................... 16

Updated Outline Dimensions....................................................... 16

2/02—Revision 0: Initial Version

Rev. B | Page 2 of 16

AD8353

SPECIFICATIONS

VS = 3 V, TA = 25°C, 100 nH external inductor between RFOUT and VPOS, ZO = 50 Ω, unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

OVERALL FUNCTION

Frequency Range 1 2700 MHz
Gain f = 900 MHz 19.8 dB
f = 1.9 GHz 17.7 dB
f = 2.7 GHz 15.6 dB
Delta Gain f = 900 MHz, −40°C ≤ TA ≤ +85°C −0.97 dB
f = 1.9 GHz, −40°C ≤ TA ≤ +85°C −1.15 dB
f = 2.7 GHz, −40°C ≤ TA ≤ +85°C −1.34 dB
Gain Supply Sensitivity VPOS ± 10%, f = 900 MHz 0.04 dB/V
f = 1.9 GHz −0.004 dB/V
f = 2.7 GHz −0.04 dB/V
Reverse Isolation (S12) f = 900 MHz −35.6 dB
f = 1.9 GHz −34.9 dB
f = 2.7 GHz −30.3 dB

RF INPUT INTERFACE Pin RFIN

Input Return Loss f = 900 MHz 22.3 dB
f = 1.9 GHz 20.9 dB
f = 2.7 GHz 11.2 dB
RF OUTPUT INTERFACE Pin RFOUT

Output Compression Point f = 900 MHz, 1 dB compression 9.1 dBm

f = 1.9 GHz 8.4 dBm

f = 2.7 GHz 7.6 dBm

Delta Compression Point f = 900 MHz, −40°C ≤ TA ≤ +85°C −1.46 dB

f = 1.9 GHz, −40°C ≤ TA ≤ +85°C −1.17 dB

f = 2.7 GHz, −40°C ≤ TA ≤ +85°C −1 dB

Output Return Loss f = 900 MHz 26.3 dB
f = 1.9 GHz 16.9 dB
f = 2.7 GHz 13.3 dB
DISTORTION/NOISE

Output Third-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 23.6 dBm

f = 1.9 GHz, ∆f = 1 MHz, PIN = −28 dBm 20.8 dBm

f = 2.7 GHz, ∆f = 1 MHz, PIN = −28 dBm 19.5 dBm

Output Second-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 31.6 dBm

Noise Figure f = 900 MHz 5.3 dB
f = 1.9 GHz 6 dB
f = 2.7 GHz 6.8 dB
POWER INTERFACE Pin VPOS

Supply Voltage 2.7 3 3.3 V

Total Supply Current 35 41 48 mA

Supply Voltage Sensitivity 15.3 mA/V

Temperature Sensitivity −40°C ≤ TA ≤ +85°C 60 μA/°C

Rev. B | Page 3 of 16

AD8353

VS = 5 V, TA = 25°C, no external inductor between RFOUT and VPOS, ZO = 50 Ω, unless otherwise noted.

Table 2.

Parameter Conditions Min Typ Max Unit

OVERALL FUNCTION

Frequency Range 1 2700 MHz
Gain f = 900 MHz 19.5 dB
f = 1.9 GHz 17.6 dB
f = 2.7 GHz 15.7 dB
Delta Gain f = 900 MHz, −40°C ≤ TA ≤ +85°C −0.96 dB
f = 1.9 GHz, −40°C ≤ TA ≤ +85°C −1.18 dB
f = 2.7 GHz, −40°C ≤ TA ≤ +85°C −1.38 dB
Gain Supply Sensitivity VPOS ± 10%, f = 900 MHz 0.09 dB/V
f = 1.9 GHz −0.01 dB/V
f = 2.7 GHz −0.09 dB/V

Reverse Isolation (S12) f = 900 MHz −35.4 dB
f = 1.9 GHz −34.6 dB
f = 2.7 GHz −30.2 dB
RF INPUT INTERFACE Pin RFIN

Input Return Loss f = 900 MHz 22.9 dB
f = 1.9 GHz 21.7 dB
f = 2.7 GHz 11.5 dB
RF OUTPUT INTERFACE Pin RFOUT

Output Compression Point f = 900 MHz 8.3 dBm

f = 1.9 GHz 8.1 dBm

f = 2.7 GHz 7.5 dBm

Delta Compression Point f = 900 MHz, −40°C ≤ TA ≤ +85°C −1.05 dB

f = 1.9 GHz, −40°C ≤ TA ≤ +85°C −1.49 dB

f = 2.7 GHz, −40°C ≤ TA ≤ +85°C −1.33 dB

Output Return Loss f = 900 MHz 27 dB

f = 1.9 GHz 22 dB
f = 2.7 GHz 14.3 dB
DISTORTION/NOISE

Output Third-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 22.8 dBm

f = 1.9 GHz, ∆f = 1 MHz, PIN = −28 dBm 20.6 dBm

f = 2.7 GHz, ∆f = 1 MHz, PIN = −28 dBm 19.5 dBm

Output Second-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 30.3 dBm

Noise Figure f = 900 MHz 5.6 dB
f = 1.9 GHz 6.3 dB
f = 2.7 GHz 7.1 dB
POWER INTERFACE Pin VPOS

Supply Voltage 4.5 5 5.5 V

Total Supply Current 35 42 52 mA

Supply Voltage Sensitivity 4.3 mA/V

Temperature Sensitivity −40°C ≤ TA ≤ +85°C 45.7 μA/°C

Rev. B | Page 4 of 16

AD8353

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage, VPOS 5.5 V
Input Power (re: 50 Ω) 10 dBm

Equivalent Voltage 700 mV rms

Internal Power Dissipation

Paddle Not Soldered 325 mW
Paddle Soldered 812 mW

θ

(Paddle Soldered) 80°C/W

JA

θ

(Paddle Not Soldered) 200°C/W

JA

Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering 60 sec) 240°C

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Rev. B | Page 5 of 16

AD8353

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

COM1

NC

RFIN

COM2

1

AD8353

2

TOP VIEW

3

(Not to Scale)

4

8
7
6
5

COM1
RFOUT
VPOS
COM2

NC = NO CONNECT

Figure 2. Pin Configuration

04862-002

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1, 8 COM1 Device Common. Connect to low impedance ground.
2 NC No Connection.
3 RFIN RF Input Connection. Must be ac-coupled.
4, 5 COM2 Device Common. Connect to low impedance ground.
6 VPOS Positive Supply Voltage.
7 RFOUT RF Output Connection. Must be ac-coupled.

Rev. B | Page 6 of 16

AD8353

TYPICAL PERFORMANCE CHARACTERISTICS

90

60

120

90

60

120

180

25

20

15

GAIN (dB)

10

150

210

Figure 3. S

240

270

vs. Frequency, VS = 3 V, TA = 25°C, dc ≤ f ≤ 3 GHz

11

GAIN AT 3.0V

300

GAIN AT 3.3V

GAIN AT 2.7V

330

30

02721-003

180

25

20

15

GAIN (dB)

10

150

210

Figure 6. S

240

270

vs. Frequency, VS = 3 V, TA = 25°C, dc ≤ f ≤ 3 GHz

22

GAIN AT –40°C

GAIN AT +25°C

300

GAIN AT +85°C

330

30

02721-006

5

0

Figure 4. Gain vs. Frequency, V

–10

–15

–20

–25

–30

REVERSE ISOLATION (dB)

–35

–40

500 1000 1500 2000 3000

0

0

–5

S12 AT 3.0V

S

12

FREQUENCY (MHz)

= 2.7 V, 3 V, and 3.3 V, TA = 25°C

S

S

AT 2.7V

12

AT 3.3V

500 1000 1500 2000 3000

FREQUENCY (MHz)

Figure 5. Reverse Isolation vs. Frequency, V

2500

25000

= 2.7 V, 3 V, and 3.3 V, TA = 25°C

S

02721-004

02721-005

5

0

Figure 7. Gain vs. Frequency, V

–10

–15

–20

–25

–30

REVERSE ISOLATION (dB)

–35

–40

500 1000 1500 2000 3000

0

–5

FREQUENCY (MHz)

= 3 V, TA = −40°C, +25°C, and +85°C

S

S12 AT +25°C

S12 AT –40°C

S12 AT +85°C

500 1000 1500 2000 3000

FREQUENCY (MHz)

25000

02721-007

25000

02721-008

Figure 8. Reverse Isolation vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C

Rev. B | Page 7 of 16

AD8353

12

10

8

(dBm)

6

1dB

P

4

P

1dB

AT 3.0V

P

P

1dB

1dB

AT 3.3V

AT 2.7V

12

10

8

6

(dBm)

1dB

P

4

P

1dB

AT –40°C

P

AT +25°C

1dB

P

1dB

AT +85°C

2

0

500 1000 1500 2000 300025000

Figure 9. P

1dB

45

40

35

30

25

20

15

PERCENTAGE (%)

10

5

0

7.0 7.2

7.4 7.6 7.8 8.0 8.2 8.4 8.6 8.8 9.0

OUTPUT 1dB COMPRESSION POINT (dBm)

Figure 10. Distribution of P

28

FREQUENCY (MHz)

vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C

, VS = 3 V, TA = 25°C, f = 2.2 GHz

1dB

02721-009

02721-010

2

0

Figure 12. P

30

25

20

15

10

PERCENTAGE (%)

5

0

500 1000 1500 2000 300025000

vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C

1dB

19.1

19.5 19.9 20.3 20.7 21.1 21.5 21.9

Figure 13. Distribution of OIP3, V

28

FREQUENCY (MHz)

OIP3 (dBm)

= 3 V, TA = 25°C, f = 2.2 GHz

S

02721-012

02721-013

26

24

22

20

18

OIP3 (dBm)

16

14

12

10

5000 1000 1500 2000 2500

Figure 11. OIP3 vs. Frequency, V

OIP3 AT 3.0V

FREQUENCY (MHz)

= 2.7 V, 3 V, and 3.3 V, TA = 25°C

S

OIP3 AT 3.3V

OIP3 AT 2.7V

3000

02721-011

Rev. B | Page 8 of 16

26

24

22

20

OIP3 AT +85°C

18

OIP3 (dBm)

16

14

12

10

5000 1000 1500 2000 2500

FREQUENCY (MHz)

Figure 14. OIP3 vs. Frequency, V

OIP3 AT –40°C

OIP3 AT +25°C

= 3 V, TA = −40°C, +25°C, and +85°C

S

3000

02721-014

AD8353

8.0

8.5

7.5

7.0

NOISE FIGURE (dBm)

6.5

6.0

5.5

5.0

4.5

4.0

NF AT 2.7V

0

NF AT 3.3V

NF AT 3.0V

500 1000 1500 2000 2500

FREQUENCY (MHz)

Figure 15. Noise Figure vs. Frequency, V

35

30

25

20

15

PERCENTAGE (%)

10

5

0

5.905.95

6.00 6.10 6.15 6.30 6.35 6.45 6.50 6.556.20 6.25 6.40 6.606.05
NOISE FIGURE (dB)

Figure 16. Distribution of Noise Figure, V

90

120

3000

= 2.7 V, 3 V, and 3.3 V, TA = 25°C

S

= 3 V, TA = 25°C, f = 2.2 GHz

S

60

02721-015

02721-016

8.0

7.5

7.0

6.5

6.0

5.5

NOISE FIGURE (dB)

5.0

4.5

4.0
0

NF AT +85°C

NF AT +25°C

NF AT –40°C

500 1000 1500 2000 2500



Ð



FREQUENCY (MHz)

Figure 18. Noise Figure vs. Frequency, V

50

45

40

35

30

25

20

15

SUPPLY CURRENT (mA)

10

5

0
–60

–40 20 60 80–20 100

IS AT 3.3V

IS AT 3.0V

IS AT 2.7V

040

TEMPERATURE (°C)

Figure 19. Supply Current vs. Temperature, V

90

120

3000

= 3 V, TA = −40°C, +25°C, and +85°C

S

= 2.7 V, 3 V, and 3.3 V

S

60

02721-018

02721-019

180

150

210

Figure 17. S

240

270

vs. Frequency, VS = 5 V, TA = 25°C, dc ≤ f ≤ 3 GHz

11

300

30

0

330

02721-017

Rev. B | Page 9 of 16

150

180

210

240

Figure 20. S

vs. Frequency, VS = 5 V, TA = 25°C, dc ≤ f ≤ 3 GHz

22

270

300

30

0

330

02721-020

AD8353

25

GAIN AT 5.5V

20

25

20

GAIN AT –40°C

GAIN AT +85°C

15

GAIN AT 5.0V

GAIN AT 4.5V

GAIN (dB)

10

5

0

0

500 1000 1500 2000 3000

FREQUENCY (MHz)

Figure 21. Gain vs. Frequency, V

0

–5

–10

–15

–20

–25

–30

REVERSE ISOLATION (dB)

–35

–40

0

S12AT 5V

500 1000 1500 2000 2500

FREQUENCY (MHz)

= 4.5 V, 5 V, and 5.5 V, TA = 25°C

S

S12AT 5.5V

Figure 22. Reverse Isolation vs. Frequency, V

10

P

P

1dB

AT 5.5V

1dB

AT 5.0V

(dBm)

1dB

P

9

8

7

6

5

4

3

2

1

0

500 1000 1500 2000 2500

0

FREQUENCY (MHz)

2500

S12AT 4.5V

3000

= 4.5 V, 5 V, and 5.5 V, TA = 25°C

S

P

AT 4.5V

1dB

3000

02721-021

02721-022

02721-023

15

GAIN (dB)

10

GAIN AT +25°C

5

0

0

500 1000 1500 2000 3000

FREQUENCY (MHz)

Figure 24. Gain vs. Frequency, V

0

–5

–10

–15

–20

–25

–30

REVERSE ISOLATION (dB)

–35

–40

0

500 1000 1500 2000 2500

= 5 V, TA = −40°C, +25°C, and +85°C

S

S12AT +85°C

FREQUENCY (MHz)

Figure 25. Reverse Isolation vs. Frequency, V

12

P

AT +85°C

1dB

10

8

(dBm)

6

1dB

P

4

2

0

500 1000 1500 2000 300025000

FREQUENCY (MHz)

2500

S12AT +25°C

S12AT –40°C

3000

= 5 V, TA = −40°C, +25°C, and +85°C

S

P

AT +25°C

1dB

P

AT –40°C

1dB

02721-024

02721-025

02721-026

Figure 23. P

vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C

1dB

Rev. B | Page 10 of 16

Figure 26. P

vs. Frequency, VS = 5 V, TA = –40°C, +25°C, and +85°C

1dB

AD8353

45

30

40

35

30

25

20

15

PERCENTAGE (%)

10

5

0

7.0 7.2 7.4 7.8 8.2 8.4 8.68.0 8.87.6
OUTPUT 1dB COMPRESSION POINT (dBm)

Figure 27. Distribution of P

26

24

22

20

18

OIP3 (dBm)

16

, VS = 3 V, TA = 25°C, f = 2.2 GHz

1dB

OIP3 AT 5.5V

OIP3 AT 5.0V

OIP3 AT 4.5V

02721-027

25

20

15

10

PERCENTAGE (%)

5

0

18.8 20.0

19.619.2

Figure 30. Distribution of OIP3, V

26

24

22

20

18

OIP3 (dBm)

16

OIP3 AT +25°C

20.4 21.2 21.620.8

OIP3 (dBm)

S

OIP3 AT –40°C

OIP3 AT +85°C

= 5 V, TA = 25°C, f = 2.2 GHz

02721-030

14

12

10

0

500

1000 1500 2000 2500

FREQUENCY (MHz)

Figure 28. OIP3 vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 27°C

9.0

8.5

8.0

7.5

7.0

6.5

6.0

NOISE FIGURE (dB)

5.5

5.0
NF AT 5.0V

4.5

4.0

500 1000 1500 2000 2500

0

Figure 29. Noise Figure vs. Frequency, V

NF AT 5.5V

FREQUENCY (MHz)

= 4.5 V, 5 V, and 5.5 V, TA = 25°C

S

NF AT 4.5V

3000

3000

02721-028

02721-029

14

12

10

0

500

Figure 31. OIP3 vs. Frequency, V

10

9

8

7

6

NOISE FIGURE (dBm)

5

4

0

1000 1500 2000 2500

FREQUENCY (MHz)

= 5 V, TA = –40°C, +25°C, and +85°C

S

NF AT +85°C

NF AT +25°C

NF AT –40°C

500 1000 1500 2000 2500

FREQUENCY (MHz)

Figure 32. Noise Figure vs. Frequency, V

3000

3000

= 5 V, TA = –40°C, +25°C, and +85°C

S

02721-031

02721-032

Rev. B | Page 11 of 16

AD8353

30

15

20

25

20

15

10

PERCENTAGE (%)

5

0

6.10 6.15

6.20 6.25 6.30 6.35 6.45 6.55 6.60 6.65 6.706.40 6.50
NOISE FIGURE (dB)

Figure 33. Distribution of Noise Figure, V

50

45

IS AT 5.5V
40

35

IS AT 5.0V

30

25

20

15

SUPPLY CURRENT (mA)

10

5

0

–60

–40 20 60 80–20 100

040

TEMPERATURE (°C)

Figure 34. Supply Current vs. Temperature, V

= 5 V, TA = 25°C, f = 2.2 GHz

S

IS AT 4.5V

= 4.5 V, 5 V, and 5.5 V

S

02721-033

02721-034

10

5

(dBm)

0

OUT

P

–5

–10

–15

–30

PIN (dBm)

Figure 35. Output Power and Gain vs. Input Power, V

15

10

5

(dBm)

0

OUT

P

–5

–10

–15

–30

PIN (dBm)

Figure 36. Output Power and Gain vs. Input Power, V

19

18

17

16

15

14

50–25 –20 –15 –10 –5

= 3 V, TA = 25°C, f = 900 MHz

S

20

19

18

17

16

15

14

50–25–20–15–10 –5

= 5 V, TA = 25°C, f = 900 MHz

S

GAIN (dB)

02721-035

GAIN (dB)

02721-036

Rev. B | Page 12 of 16

AD8353

THEORY OF OPERATION

The AD8353 is a 2-stage, feedback amplifier employing both
shunt-series and shunt-shunt feedback. The first stage is
degenerated and resistively loaded and provides approximately
10 dB of gain. The second stage is a PNP-NPN Darlington
output stage, which provides another 10 dB of gain. Series­shunt feedback from the emitter of the output transistor sets the
input impedance to 50 Ω over a broad frequency range. Shunt­shunt feedback from the amplifier output to the input of the
Darlington stage helps to set the output impedance to 50 Ω. The
amplifier can be operated from a 3 V supply by adding a choke
inductor from the amplifier output to VPOS. Without this
choke inductor, operation from a 5 V supply is also possible.

BASIC CONNECTIONS

The AD8353 RF gain block is a fixed gain amplifier with
single-ended input and output ports whose impedances are
nominally equal to 50 Ω over the frequency range 1 MHz to

2.7 GHz. Consequently, it can be directly inserted into a 50 Ω
system with no impedance matching circuitry required.
The input and output impedances are sufficiently stable vs.
variations in temperature and supply voltage that no impedance
matching compensation is required. A complete set of
scattering parameters is available at

The input pin (RFIN) is connected directly to the base of the first
amplifier stage, which is internally biased to approximately 1 V;
therefore, a dc blocking capacitor should be connected between the
source that drives the AD8353 and the input pin, RFIN.

www.analog.com.

It is critical to supply very low inductance ground connections
to the ground pins (Pin 1, Pin 4, Pin 5, and Pin 8) as well as to
the backside exposed paddle. This ensures stable operation.

The AD8353 is designed to operate over a wide supply voltage
range, from 2.7 V to 5.5 V. The output of the part, RFOUT, is
taken directly from the collector of the output amplifier stage.
This node is internally biased to approximately 2.2 V when the
supply voltage is 5 V. Consequently, a dc blocking capacitor
should be connected between the output pin, RFOUT, and the
load that it drives. The value of this capacitor is not critical, but
it should be 100 pF or larger.

When the supply voltage is 3 V, it is recommended that an
external RF choke be connected between the supply voltage
and the output pin, RFOUT. This increases the dc voltage
applied to the collector of the output amplifier stage, which
improves performance of the AD8353 to be very similar to the
performance produced when 5 V is used for the supply voltage.
The inductance of the RF choke should be approximately
100 nH, and care should be taken to ensure that the lowest
series self-resonant frequency of this choke is well above the
maximum frequency of operation for the AD8353. For lower
frequency operation, use a higher value inductor.

Bypass the supply voltage input, VPOS, using a large value
capacitance (approximately 0.47 μF or larger) and a smaller,
high frequency bypass capacitor (approximately 100 pF)
physically located close to the VPOS pin.

The recommended connections and components are shown in
Figure 40.

Rev. B | Page 13 of 16

AD8353

APPLICATIONS

The AD8353 RF gain block can be used as a general-purpose,
fixed gain amplifier in a wide variety of applications, such as a
driver for a transmitter power amplifier (see

Figure 37). Its
excellent reverse isolation also makes this amplifier suitable for
use as a local oscillator buffer amplifier that would drive the
local oscillator port of an upconverter or downconverter mixer
(see

Figure 38).

AD8353

Figure 37. AD8353 as a Driver Amplifier

MIXER

AD8353

LOCAL OSCILLATOR

Figure 38. AD8353 as a LO Driver Amplifier

HIGH POWER
AMPLIFIER

02721-037

04862-038

LOW FREQUENCY APPLICATIONS BELOW 100 MHz

The AD8353 RF gain block can be used below 100 MHz. To
accomplish this, the series dc blocking capacitors, C1 and C2,
need to be changed to a higher value that is appropriate for the
desired frequency. C1 and C2 were changed to 0.1 μF to
accomplish the sweep in

21.0
dB-S21

20.5

20.0

19.5

19.0

18.5

18.0

17.5

17.0

16.5

16.0

CH 1: START 300.000kHz STOP 100.000MHz

Figure 39. Low Frequency Application from

300 kHz to 100 MHz at 5 V VPOS, −12 dBm Input Power

Figure 39.

02721-042

Rev. B | Page 14 of 16

AD8353

T

EVALUATION BOARD

Figure 40 shows the schematic of the AD8353 evaluation board.
Note that L1 is shown as an optional component that is used to
obtain maximum gain only when V
by a single supply in the 2.7 V to 5.5 V range. The power supply
is decoupled by a 0.47 μF and a 100 pF capacitor.

AD8353

COM1

1

NC

2

C1

1000pF

INPU

RFIN

3

4

NC = NO CONNECT

Figure 40. Evaluation Board Schematic

Table 5. Evaluation Board Configuration Options

Component Function

C1, C2 AC coupling capacitors.

C3 High frequency bypass capacitor.

C4 Low frequency bypass capacitor.

L1

Optional RF choke, used to increase
current through output stage when

= 3 V. Not recommended for use

V

P

when V

= 5 V.

P

= 3 V. The board is powered

P

COM1

8

RFOUT

VPOS

COM2COM2

7

6

5

1000pF

L1

C3
100pFC40.47μF

C2

OUTPUT

Default
Value

1000 pF,
0603

100 pF
0603

0.47 μF,
0603

100 nH,
0603

04862-040

Figure 41. Silkscreen Top

02721-039

04862-041

Figure 42. Component Side

Rev. B | Page 15 of 16

AD8353

R

OUTLINE DIMENSIONS

1.89

1.74

1.59

58

BOTTOM VIEW

EXPOSED PAD

4 1

*

0.55

0.40

0.30

0.15

0.10

0.05

0.25

0.20

0.15

PIN 1

INDICATO

1.00

0.85

0.80

SEATING

1.95

1.75

1.55

PLANE

3.25

3.00

2.75

0.60

0.45

0.30

0.50 BSC

0.05 MAX

0.02 NOM

12° MAX

TOP VIEW

2.95

2.75

2.55

0.30

0.23

0.18

2.25

2.00

1.75

0.80 MAX

0.65 TYP

0.20 REF

Figure 43. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]

2 mm × 3 mm Body, Very Thin, Dual Lead

CP-8-1

Dimensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding

AD8353ACP-R2 −40°C to +85°C 8-Lead LFCSP_VD CP-8-1 JB
AD8353ACP-REEL7 −40°C to +85°C 8-Lead LFCSP_VD, 7" Tape and Reel CP-8-1 JB
AD8353ACPZ-REEL7
AD8353-EVAL Evaluation Board

1

Z = Pb-free part.

1

−40°C to +85°C 8-Lead LFCSP_VD, 7" Tape and Reel CP-8-1 0E

© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02721–0–12/05(B)

T

Rev. B | Page 16 of 16

TTT