ANALOG DEVICES AD835 Service Manual

250 MHz, Voltage Output

Z INPUT

Y = Y1

– Y2

X = X1 – X2

XY + Z

W OUTPUT

AD835

∑

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4-Quadrant Multiplier

AD835

FEATURES Simple: Basic Function is W = XY + Z Complete: Minimal External Components Required Very Fast: Settles to 0.1% of FS in 20 ns DC-Coupled Voltage Output Simplies Use High Differential Input Impedance X, Y, and Z Inputs Low Multiplier Noise: 50 nV/

APPLICATIONS Very Fast Multiplication, Division, Squaring Wideband Modulation and Demodulation Phase Detection and Measurement Sinusoidal Frequency Doubling Video Gain Control and Keying Voltage Controlled Ampliers and Filters

PRODUCT DESCRIPTION

The AD835 is a complete four-quadrant voltage output analog multiplier, fabricated on an advanced dielectrically isolated complementary bipolar process. It generates the linear product of its X and Y voltage inputs with a –3 dB output bandwidth of 250 MHz (a small signal rise time of 1 ns). Full scale (–1 V to +1 V) rise to fall times are 2.5 ns (with the standard R settling time to 0.1% under the same conditions is typically 20 ns.

Its differential multiplication inputs (X, Y) and its summing input (Z) are at high impedance. The low impedance output voltage (W) can provide up to ±2.5 V and drive loads as low as 25 . Normal operation is from ±5 V supplies.

Though providing state-of-the-art speed, the AD835 is simple to use and versatile. For example, as well as permitting the addition of a signal at the output, the Z input provides the means to operate the AD835 with voltage gains up to about 10. In this capacity, the very low product noise of this multiplier (50 nV/Hz) makes it much more useful than earlier products.

The AD835 is available in an 8-lead PDIP package (N) and an 8-lead SOIC package (R) and is specied to operate over the –40°C to +85°C industrial temperature range.



of 150 ), and the

FUNCTIONAL BLOCK DIAGRAM

PRODUCT HIGHLIGHTS

1. The AD835 is the rst monolithic 250 MHz four quadrant voltage output multiplier.

2. Minimal external components are required to apply the AD835 to a variety of signal processing applications.

3. High input impedances (100 k2 pF) make signal source loading negligible.

4. High output current capability allows low impedance loads to be driven.

5. State of the art noise levels achieved through careful device optimization and the use of a special low noise band gap voltage reference.

6. Designed to be easy to use and cost effective in applications which formerly required the use of hybrid or board level solutions.

REV. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.

AD835–SPECIFICATIONS

X X Y Y

−

( )−( )

1 2 1 2

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Model AD835AN/AR835

TRANSFER FUNCTION

Parameter Conditions Min Typ Max Unit

INPUT CHARACTERISTICS (X, Y) Differential Voltage Range V Differential Clipping Level 1.2 ±1.4 V Low Frequency Nonlinearity X = ±1 V, Y = 1 V 0.3 0.5 % FS Y = ±1 V, X = 1 V 0.1 0.3 % FS vs. Temperature T X = ±1 V, Y = 1 V 0.7 % FS Y = ±1 V, X = 1 V 0.5 % FS Common-Mode Voltage Range –2.5 +3 V Offset Voltage ±3 20 mV vs. Temperature T CMRR f Bias Current 10 20 µA vs. Temperature T Offset Bias Current 2 µA Differential Resistance 100 k Single-Sided Capacitance 2 pF Feedthrough, X X = ±1 V, Y = 0 V Feedthrough, Y Y = ±1 V, X = 0 V –60 dB

DYNAMIC CHARACTERISTICS –3 dB Small-Signal Bandwidth 150 250 MHz –0.1 dB Gain Flatness Frequency 15 MHz Slew Rate W = –2.5 V to +2.5 V 1000 V/µs Differential Gain Error, X f = 3.58 MHz 0.3 % Differential Phase Error, X f = 3.58 MHz 0.2 Degrees Differential Gain Error, Y f = 3.58 MHz 0.1 % Differential Phase Error, Y f = 3.58 MHz 0.1 Degrees Harmonic Distortion X or Y = 10 dBm, Second and Third Harmonic Fund = 10 MHz –70 dB Fund = 50 MHz –40 dB Settling Time, X or Y To 0.1%, W = 2 V p-p 20 ns

SUMMING INPUT (Z) Gain From Z to W, f –3 dB Small-Signal Bandwidth 250 MHz Differential Input Resistance 60 k Single Sided Capacitance 2 pF Maximum Gain X, Y to W, Z Shorted to W, f = 1 kHz 50 dB Bias Current 50 µA

OUTPUT CHARACTERISTICS Voltage Swing ±2.2 ±2.5 V vs. Temperature T Voltage Noise Spectral Density X = Y = 0, f < 10 MHz 50 nV/ Offset Voltage ±25 75 mV vs. Temperature Short Circuit Current 75 mA Scale Factor Error ±5 8 % FS vs. Temperature T Linearity (Relative Error)

vs. Temperature T

= 0 ±1 V

MIN



100 kHz; ±1 V p-p 70 dB

MIN

(TA = 25C, VS = 5 V, RL = 150 , CL  5 pF, unless otherwise noted.)

to T

MAX

to T

±25 mV

MAX

27 µA

MAX

–46 dB



10 MHz 0.990 0.995

±2.0 V

MAX

±10 mV

MAX

±9 % FS

MAX

±1.25 % FS

MAX

±0.5

1.0 % FS





–2–

REV. B REV. B

AD835

TOP VIEW

(Not to Scale)

AD835

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Parameter Conditions Min Typ Max Unit

POWER SUPPLIES Supply Voltage For Specied Performance ±4.5 ±5 ±5.5 V

Quiescent Supply Current 16 25 mA

vs. Temperature T

MIN

PSRR at Output vs. VP +4.5 V to +5.5 V

PSRR at Output vs. VN –4.5 V to –5.5 V 0.5 %/V

NOTES

= –40°C, T

MIN

Normalized to zero at 25°C.

Linearity is dened as residual error after compensating for input offset, output voltage offset, and scale factor errors.

All min and max specications are guaranteed. Specications in boldface are tested on all production units at nal electrical test. Specications subject to change without notice.

MAX

= 85°C.

to T

26 mA

MAX

0.5 %/V

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6 V

Internal Power Dissipation

. . . . . . . . . . . . . . . . . . . . 300 mW

Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C

PIN CONNECTIONS

8-Lead PDIP (N) 8-Lead SOIC (R)

Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature, Soldering 60 sec . . . . . . . . . . . . . . . . 300°C

ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1500 V

NOTES

Stresses above those listed under Absolute Maximum Ratings may cause permanent

damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specication is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability.

Thermal Characteristics:

8-Lead PDIP (N): JC = 35°C/W; JA = 90°C/W 8-Lead SOIC (R): JC = 45°C/W; JA = 115°C/W.

Temperature Package

ORDERING GUIDE

Model Range Options

AD835AN –40°C to +85°C N-8 AD835AR –40°C to +85°C R-8 AD835AR-REEL –40°C to +85°C R-8 AD835AR-REEL7 –40°C to +85°C R-8 AD835ARZ

N = PDIP; R = Small Outline IC Plastic Package (SOIC).

The Z stands for a lead-free product.

–40°C to +85°C R-8

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD835 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

–3–

AD835–Typical Performance Characteristics AD835

1M 10M 1G100M

–2

–4

–6

–8

–10

MAGNITUDE (dB)

FREQUENCY (Hz)

PHASE (Degrees)

–90

–180

180

PHASE

X, Y, Z CH = 0dBm R

= 150

≤ 5pF

GAIN

FREQUENCY (Hz)

–0.2

–

0.3

–

0.4

–

0.5

–

0.6

–

0.1

MAGNITUDE (dB)

X, Y CH = 0dBm R

= 150

≤ 5pF

1M 10M 100M300k

–30

–40

–50

–60

–20

–10

MAGNITUDE (dB)

FREQUENCY (Hz)

1M 10M 1G100M

X FEEDTHROUGH

Y FEEDTHROUGH

X FEEDTHROUGH

Y FEEDTHROUGH

X, Y C

H = 5dBm RL = 150 C

< 5pF

100mV

0.200V

GND

–0.200V

10ns

0.4

–0.4

–

0.2

0.0

.020.00 0.060.030.030.02

0.060.00 0.200.190.160.11

DIFFERENTIAL

PHASE (Degrees)

DIFFERENTIAL

GAIN (%)

2ND1ST 6TH5TH4TH3RD

2ND1

ST 6TH5TH4TH3RD

–0.3

0.0

–0.2

–0.1

0.2

MIN = 0.00 MAX = 0.20 p-p/MAX = 0.20

MIN = 0.00 MAX = 0.06 p-p = 0.06

DG DP (NTSC) FIELD = 1 LINE = 18 Wfm FCC COMPOSITE

0.20

–0.20

–0.10

0.10

0.00

0.030.00 0.160.100.070.04

0.010.00 –0.20–0.010.00–0.00

DIFFERENTIAL

PHASE (Degrees)

IFFERENTIAL

GAIN (%)

2ND1ST 6TH5TH4TH3RD

2ND1

ST 6TH5TH4TH3RD

–0.3

–

0.2

–

0.1

MIN = –0.02 MAX = 0.01 p-p/MAX = 0.03

MIN = 0.00 MAX = 0.16 p-p = 0.16

DG DP (NTSC) FIELD = 1 LINE = 18 Wfm FCC COMPOSITE

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TPC 1. Typical Composite Output Differential Gain and Phase, NTSC for X Channel; f = 3.58 MHz, R

= 150



TPC 2. Typical Composite Output Differential Gain and Phase, NTSC for Y Channel; f = 3.58 MHz, R

= 150



TPC 4. Gain Flatness to 0.1 dB

TPC 5. X and Y Feedthrough vs. Frequency

TPC 3. Gain and Phase vs. Frequency of X, Y, Z Inputs

TPC 6. Small Signal Pulse Response at W Output, RL = 150



, CL  5 pF, X Channel = ±0.2 V, Y Channel = ±1.0 V

–4–

REV. B REV. B

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