Analog Devices AD8347 Service Manual

0.8 GHz to 2.7 GHz Direct Conversion Quadrature Demodulator

AD8347

FEATURES FUNCTIONAL BLOCK DIAGRAM

Integrated RF and baseband AGC amplifiers Quadrature phase accuracy 1° typ I/Q amplitude balance 0.3 dB typ Third-order intercept (IIP3) +11.5 dBm @ min gain Noise figure 11 dB @ max gain AGC range 69.5 dB Baseband level control circuit Low LO drive −8 dBm ADC-compatible I/Q outputs Single supply 2.7 V to 5.5 V Power-down mode 28-lead TSSOP package

APPLICATIONS

Cellular base stations Radio links Wireless local loop IF broadband demodulators RF instrumentation Satellite modems

LOIN VPS1 IOPN

IOPP

VCMO

IAIN

COM3

IMXO

COM2

RFIN

RFIP VPS2

IOFS

VREF

1 2 3 4 5 6 7 8

9 10 11 12 13 14

AD8347

SPLITTER

BIAS

PHASE

CONTROL

Figure 1.

GAIN

DET

LOIP

28

COM1

27 26

QOPN

25

QOPP

24

QAIN

23

COM3

22

QMXO

21

VPS3

20

VDT1

19

VAGC

18

VDT2

17

GIN

V

16

QOFS

15

ENBL

02675-001

GENERAL DESCRIPTION

The AD83471 is a broadband direct quadrature demodulator with RF and baseband automatic gain control (AGC) amplifiers. It is suitable for use in many communications receivers, performing quadrature demodulation directly to baseband frequencies. The input frequency range is 800 MHz to 2.7 GHz. The outputs can be connected directly to popular A-to-D converters such as the

AD9201 and AD9283.

The RF input signal goes through two stages of variable gain amplifiers prior to two Gilbert-cell mixers. The LO quadrature phase splitter employs polyphase filters to achieve high quadrature accuracy and amplitude balance over the entire operating frequency range. Separate I and Q channel variable gain amplifiers follow the baseband outputs of the mixers. The RF and baseband amplifiers together provide 69.5 dB of gain control. A precision control circuit sets the linear-in-dB RF gain response to the gain control voltage.

1

U.S. patents issued and pending.

Baseband level detectors are included for use in an AGC loop to maintain the output level. The demodulator dc offsets are minimized by an internal loop, whose time constant is controlled by external capacitor values. The offset control can also be overridden by forcing an external voltage at the offset nulling pins.

The baseband variable gain amplifier outputs are brought offchip for filtering before final amplification. By inserting a channel selection filter before each output amplifier, high level out-of-channel interferers are eliminated. Additional internal circuitry also allows the user to set the dc common-mode level at the baseband outputs.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

AD8347

REVISION HISTORY

10/05—Rev. 0 to Rev. A

Updated Format..................................................................Universal

Change V

Changes to Figure 46...................................................................... 19

Changes to Figure 48 ..................................................................... 21

Changes to Figure 49 and Figure 50............................................. 22

Changes to Ordering Guide.......................................................... 27

10/01—Revision 0: Initial Version

GIN

to V

..........................................................Universal

VGIN

Evaluation Board............................................................................ 23

Outline Dimensions....................................................................... 26

Ordering Guide .......................................................................... 26

Rev. A | Page 2 of 28

AD8347

SPECIFICATIONS

VS = 5 V; TA = 25°C; FLO = 1.9 GHz; V otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

OPERATING CONDITIONS

LO/RF Frequency Range 0.8 2.7 GHz LO Input Level −10 0 dBm VGIN Input Level 0.2 1.2 V V

(VS) 2.7 5.5 V

SUPPLY

Temperature Range −40 +85 °C

RF AMPLIFIER/DEMODULATOR From RFIP/RFIN to IMXO and QMXO (IMXO/QMXO load > 1 kΩ)

AGC Gain Range 69.5 dB Conversion Gain (Max) V Conversion Gain (Min) V Gain Linearity V Gain Flatness FLO = 0.8 GHz to 2.7 GHz, FBB = 1 MHz +0.7 dB p-p Input P1 dB V V Third-Order Input Intercept (IIP3) F F Second-Order Input Intercept (IIP2) F F LO Leakage (RF) At RFIP −60 dBm LO Leakage (MXO) At IMXO/QMXO −42 dBm Demodulation Bandwidth −3 dB +90 MHz Quadrature Phase Error FRF = 1.9 GHz −3 ±1 +3 degree I/Q Amplitude Imbalance FRF = 1.9 GHz +0.3 dB Noise Figure Max Gain 11 dB Mixer AGC Output Level See Figure 34 24 mV p-p Baseband DC Offset At IMXO/QMXO, max gain (corrected, REF to VREF) 2 mV Mixer Output Swing Level at which IMD3 = 45 dBc R R Mixer Output Impedance 3 Ω

BASEBAND OUTPUT AMPLIFIER From IAIN to IOPP/IOPN and QAIN to QOPP/QOPN

Gain 30 dB Bandwidth −3 dB (see Figure 22) 65 MHz Output DC Offset (Differential) (V Common-Mode Offset (V Group Delay Flatness 0 MHz to 50 MHz +1.8 ns p-p Second-Order Intermod. Distortion FIN1 = 5 MHz, FIN2 = 6 MHz, VIN1 = VIN2 = 8 mV p-p −49 dBc Third-Order Intermod. Distortion FIN1 = 5 MHz, FIN2 = 6 MHz, VIN1 = VIN2 = 8 mV p-p −67 dBc Input Bias Current +2 µA Input Impedance 1||3 MΩ||pF Output Swing Limit (Upper) VS − 1.3 V Output Swing Limit (Lower) 0.4 V

= 1 V; FRF = 1.905 GHz; PLO = −8 dBm, R

VCMO

= 0.2 V (max gain) 39.5 dB

VGIN

= 1.2 V (min gain) −30 dB

VGIN

= 0.3 V to 1 V ±2 dB

VGIN

= 0.2 V −30 dBm

VGIN

= 1.2 V −2 dBm

VGIN

= 1.905 GHz, +11.5 dBm

RF1

= 1.906 GHz, –10 dBm each tone, (min gain)

RF2

= 1.905 GHz, +25.5 dBm

RF1

= 1.906 GHz, −10 dBm each tone, (min gain)

RF2

= 200 Ω 65 mV p-p

LOAD

= 1 kΩ 65 mV p-p

LOAD

= 10 kΩ, dBm with respect to 50 Ω, unless

LOAD

R

= 10 kΩ

LOAD

– V

IOPP

) −200 ±50 +200 mV

IOPN

+ V

IOPN

)/2 − V

−40 ±5 +40 mV

VCMO

Rev. A | Page 3 of 28

AD8347

Parameter Conditions Min Typ Max Unit

CONTROL INPUT/OUTPUTS

VCMO Input @ VS = 2.7 V 1 V @ VS = 5 V 0.5 1 2.5 V Gain Control Input Bias Current VGIN <1 µA Offset Input Overriding Current IOFS, QOFS 10 µA VREF Output R

RESPONSE FROM RF INPUT TO FINAL BB AMP

Gain @ V Gain @ V

= 0.2 V 65.5 69.5 72.5 dB

VGIN

= 1.2 V −3 +0.5 +4 dB

VGIN

Gain Slope −96.5 −89 −82.5 dB/V Gain Intercept Linear extrapolation back to theoretical value at VGIN = 0 88 94 101 dB

LO/RF INPUT (See Figure 30 through Figure 33 for more detail)

LOIP Input Return Loss Measuring LOIP LOIN, ac-coupled to ground with 100 pF. −4 dB

Measuring through evaluation board balun with termination −9.5 dB

RFIP Input Return Loss RFIP input pin −10 dB

ENABLE

Power-Up Control Low = standby 0 0.5 V Power-Up Control High = enabled +VS − 1 +VS V Power-Up Time Time for final BB amps to be within 90% of final amplitude @ VS = 5 V 20 µs @ VS = 2.7 V 10 µs Power-Down Time Time for supply current to be <4 mA @ VS = 5 V 30 µs @ VS = 2.7 V 1.5 ms

POWER SUPPLIES VPS1, VPS2, VPS3

Voltage 2.7 5.5 V Current (Enabled) @ 5 V 48 64 80 mA Current (Standby) @ 5 V 400 µA Current (Standby) @ 3.3 V 80 µA

= 10 kΩ 0.95 1.00 1.05 V

LOAD

IMXO and QMXO connected directly to IAIN and QAIN, respectively

Rev. A | Page 4 of 28

AD8347

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage VPS1, VPS2, VPS3 5.5 V LO and RF Input Power 10 dBm Internal Power Dissipation 500 mW θJA 68°C/W Maximum Junction Temperature 150°C Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering 60 sec) 300°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. A | Page 5 of 28

AD8347

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

LOIN VPS1 IOPN

IOPP

VCMO

IAIN

COM3

IMXO

COM2

RFIN

RFIP VPS2

IOFS

VREF

1 2 3 4 5 6 7 8

9 10 11 12 13 14

AD8347

TOP VIEW

(Not to Scale)

LOIP

28

COM1

27 26

QOPN

25

QOPP

24

QAIN

23

COM3

22

QMXO

21

VPS3

20

VDT1

19

VAGC

18

VDT2

17

GIN

V

16

QOFS

15

ENBL

02675-002

Figure 2. 28-Lead TSSOP Pin Configuration

Table 3. Pin Function Descriptions

Equiv.

Pin No. Mnemonic Description

1, 28 LOIN, LOIP A

Circuit

LO Input. For optimum performance, these inputs are differentially driven. Typical input drive level is equal to −8 dBm. To improve the match to a 50 Ω source, connect a 200 Ω shunt resistor between LOIP

and LOIN. A single-ended drive is possible, but slightly increases LO leakage. 2 VPS1 Positive Supply for LO Section. Decouple VPS1 with 0.1 µF and 100 pF capacitors. 3, 4 IOPN, IOPP B

I-Channel Differential Baseband Output. Typical output swing is equal to 760 mV p-p differential in

AGC mode. The common-mode level on these pins is programmed by the voltage on VCMO. 5 VCMO C

Baseband Amplifier Common-Mode Voltage. The voltage applied to this pin sets the output common-

mode level of the baseband amplifiers. This pin can either be connected to VREF (Pin 14) or to a

reference voltage from another device (typically an ADC). 6 IAIN D

I-Channel Baseband Amplifier Input. This pin, which has a high input impedance, should be biased to

VREF (approximately 1 V). If IAIN is connected directly to IMXO, biasing is provided by IMXO. If an ac-

coupled filter is placed between IMXO and IAIN, this pin can be biased from VREF through a 1 kΩ

resistor. The gain from IAIN to the differential outputs IOPN/IOPP is 30 dB. 7, 23 COM3 Ground for Biasing and Baseband Sections. 8, 22 IMXO, QMXO B

I-Channel and Q-Channel Baseband Mixer/VGA Outputs. Low impedance outputs with bias levels equal to

VREF. IMXO and QMXO are typically connected to IAIN and QAIN, respectively, either directly or through

filters. These outputs have a maximum current limit of about 1.5 mA. This allows for a 600 mV p-p swing into

a 200 Ω load. This corresponds to an input level of −40 dBm @ a maximum gain of 39.5 dB. At lower output

levels, IMXO and QMXO can drive a lower load resistance, subject to the same current limit. 9 COM2 RF Section Ground. 10, 11 RFIN, RFIP E

RF Input. RFIN must be ac-coupled to ground. The RF input signal should be ac-coupled into RFIP. For

a broadband 50 Ω input impedance, connect a 200 Ω resistor from the signal side of the RFIP coupling

capacitor to ground. Note that RFIN and RFIP are not interchangeable differential inputs. RFIN is the

ground reference for the input system. 12 VPS2 Positive Supply for RF Section. Decouple VPS2 with 0.1 µF and 100 pF capacitors. 13, 16 IOFS, QOFS F

I-Channel and Q-Channel Offset Nulling Inputs. To null the dc offset on the I-channel and Q-channel

mixer outputs (IMXO, QMXO), connect a 0.1 µF capacitor from these pins to ground. Alternately, a

forced voltage of approximately 1 V on these pins disables the offset compensation circuit. 14 VREF G

Reference Voltage Output. This output voltage (1 V) is the main bias level for the device and can be

used to externally bias the inputs and outputs of the baseband amplifiers. The VREF pin should be

decoupled with a 0.1 F capacitor to ground. 15 ENBL H Chip Enable Input. Active high. 17 VGIN C

Gain Control Input. The voltage on this pin controls the gain on the RF and baseband VGAs. The gain

control is applied in parallel to all VGAs. The gain control voltage range is from 0.2 V to 1.2 V and

corresponds to a gain range from +39.5 dB to −30 dB. This is the gain to the output of the baseband

VGAs (that is, QMXO and IMXO). There is an additional 30 dB of gain in the baseband amplifiers. Note

that the gain control function has a negative sense (that is, increasing control voltage decreases gain).

In AGC mode, connect this pin directly to VAGC.

Rev. A | Page 6 of 28

AD8347

Equiv.

Pin No. Mnemonic Description

18, 20 VDT2, VDT1 D

19 VAGC I

21 VPS3 Positive Supply for Biasing and Baseband Sections. Decouple VPS3 with 0.1 µF and 100 pF capacitors. 24 QAIN D

25, 26 QOPP, QOPN B

27 COM1 LO Section Ground.

Circuit

ENBL

RFIN

RFIP

Detector Inputs. These pins are the inputs to the on-board detector. VDT2 and VDT1, which have high input impedances, are normally connected to IMXO and QMXO, respectively.

AGC Output. This pin provides the output voltage from the on-board detector. In AGC mode, connect this pin directly to VGIN.

Q-Channel Baseband Amplifier Input. Bias this high input impedance pin to VREF (approximately 1 V). If QAIN is directly connected to QMXO, biasing is provided by QMXO. If an ac-coupled filter is placed between QMXO and QAIN, this pin can be biased from VREF through a 1 kΩ resistor. The gain from QAIN to the QOPN/QOPP differential outputs is 30 dB.

Q-Channel Differential Baseband Output. Typical output swing is equal to 760 mV p-p differential. The common-mode level on these pins is programmed by the voltage on VCMO.

VPS3

VPS2 IMXO

VPS1

12

2

AD8347

15

10

11

BIAS CELL

VREF

21

VREF

814

VREF

PHASE

SPLITTER

IAIN

2

613

VCMO

IOPPIOFS IOPN

3

4

PHASE

SPLITTER

1

VCMO

5

LOIN

1

28

LOIP

VGIN

17

GAIN

CONTROL

INTERFACE

DET 1

20 19

DET 2

18

VDT2 QMXO QOPPQOFSVAGCVDT1 QAIN

22 16 24 25

VREF

Figure 3. Block Diagram

VCMO

26

QOPN

7

COM3

9

COM2

23

COM3

27

COM1

02675-003

Rev. A | Page 7 of 28

AD8347

TYPICAL PERFORMANCE CHARACTERISTICS

RF AMP AND DEMODULATOR

,

2400 2600

14 12 10 8 6 4 2 0 –2 –4 –6 –8 –10 –12

14 12 10 8 6 4 2 0 –2 –4 –6 –8 –10

LINEARITY ERROR (dB)

02675-013

LINEARITY ERROR (dB)

02675-014

02675-015

MIXER GAIN (dB)

45 40 35 30 25 20 15 10

–5 –10 –15 –20 –25 –30 –35

TA = –40°C

TA = +85°C

TA = +25°C

5 0

TA = +25°C

TA = +85°C

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2

0.2 V

VGIN

(V)

Figure 4. Gain and Linearity Error vs. V

= 5 V, FLO = 1900 MHz, FBB = 1 MHz

V

S

45

MIXER GAIN (dB)

–10 –15 –20 –25 –30 –35

40 35 30 25 20 15

10

5 0

–5

0.2

TA = –40°C

TA = +85°C

TA = –40°C

TA = +25°C

TA = +85°C

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2

TA = +25°C

V

VGIN

(V)

Figure 5. Gain and Linearity Error vs. V

= 2.7 V, FLO = 1900 MHz, FBB = 1 MHz

V

S

40

39

VS = 2.7V, TA = –40°C

38

37 36

V

= 2.7V, TA = +85°C

S

35

GAIN (dB)

34

33

32 31

30

1000 1200 1400 1600 1800 2000 2200

800

Figure 6. Gain vs. F

VS = 2.7V, TA = +25°C

V

S

VS = 5V, TA = +85°C

RF FREQUENCY (MHz)

, V

= 0.2 V, FBB = 1 MHz

LO

VGIN

= 5V, TA = –40°C

TA = –40°C

VGIN

= 5V, TA = +25°C

V

S

3.0

2.5

2.0

1.5 V

= 2.7V, TA = –40°C

S

1.0

GAIN (dB)

0.5

= 5V, TA = –40°C

V

S

0

–0.5

–1.0

800

1000 1200 1400 1600 1800 2000 2200

Figure 7. Gain vs. F

–27

–28

= 2.7V, TA = +25°C

V

S

–29 –30

–31

–32

GAIN (dB)

–33

V

= 5V, TA = +85°C

S

–34 –35 –36

–

37

800

1000 1200 1400 1600 1800 2000 2200

Figure 8. Gain vs. F

42 41

40 39 38

V

= 5V, TA = +25°C

S

37 36

V

= 2.7V, TA = +85°C

S

35

GAIN (dB)

34

= 5V, TA = +85°C

V

S

33 32 31 30

1

Figure 9. Gain vs. F

VS = 2.7V, TA = +25°C

V

RF FREQUENCY (MHz)

LO

= 5V, TA = +25°C

V

S

V

= 5V, TA = –40°C

S

RF FREQUENCY (MHz)

LO

= 2.7V, TA = –40°C

V

S

BASEBAND FREQUENCY (MHz)

, V

BB

= 5V, TA = +25°C

S

VS = 5V, TA = +85°C

VS = 2.7V, TA = +85°C

, V

= 0.7 V, FBB = 1 MHz

VGIN

= 2.7V, TA = –40°C

V

S

VS = 2.7V, TA = +85°C

, V

= 1.2 V, F

VGIN

10

= 0.2 V, FLO = 1900 MHz

VGIN

BB

VS = 2.7V, TA = +25°C

= 5V, TA = –40°C

V

S

2400 2600

= 1 MHz

100

02675-016

02675-017

02675-018

Rev. A | Page 8 of 28

AD8347

10

9 8 7 6 5 4

= 2.7V, TA = +25°C

V

S

3 2

GAIN (dB)

1

0 –1 –2

= 5V, TA = –40°C

V

–3

S

–4 –5

1

Figure 10. Gain vs. FBB, V

VS = 2.7V, TA = +85°C

V

= 5V, TA = +85°C

S

= 5V, TA = +25°C

V

S

= 2.7V, TA = –40°C

V

S

BASEBAND FREQUENCY (MHz)

10

= 0.7 V, FLO = 1900 MHz

VGIN

100

02675-019

15

VS = 2.7V, TA = +85°C

14

13 12

11

10

V

= 2.7V, TA = +25°C

S

IIP3 (dBm)

9

8 7

6

5

800 2400 26001000 1200 1400 1600 1800 2000 2200

Figure 13. IIP3 vs. F

V

= 5V, TA = +85°C

S

= 5V, TA = +25°C

V

S

V

= 2.7V, TA = –40°C

S

V

= 5V, TA = –40°C

S

RF FREQUENCY (MHz)

, V

= 1.2 V, F

LO

VGIN

= 1 MHz

BB

02675-022

–25

–26

–27

–28

= 5V, TA = +25°C

V

S

–29

–30

GAIN (dB)

–31

–32

VS = 2.7V, TA = +85°C

–33

–34

–35

1

Figure 11. Gain vs. F

0

–5

–10

VS = 5V, TA = +85°C

–15

–20

INPUT P1dB (dBm)

–25

–30

V

–35

0.2

= 2.7V, TA = +25°C

V

S

BASEBAND FREQUENCY (MHz)

, V

BB

= 5V, TA = –40°C

V

S

VS = 2.7V, TA = +85°C

= 2.7V, TA = +25°C

V

S

= 2.7V, TA = –40°C

V

S

= 5V, TA = +25°C

S

V

VGIN

V

= 2.7V, TA = –40°C

S

V

= 5V, TA = –40°C

S

= 5V, TA = +85°C

V

S

10

= 1.2 V, FLO = 1900 MHz

VGIN

(V)

Figure 12. Input 1 dB Compression Point (OP1 dB) vs. V

= 1900 MHz, F

F

LO

= 1 MHz

BB

–10

–12

= 5V, TA = +25°C

V

S

–14

–16

–18 –20

IIP3 (dBm)

–22 –24

V

= 5V, TA = –40°C

S

–26

–28

100

02675-020

–30

800 2400 26001000 1200 1400 1600 1800 2000 2200

Figure 14. IIP3 vs. F

15

V

= 2.7V, TA = –40°C

S

14

V

13

IIP3 (dBm)

12

11

V

= 2.7V, TA = +25°C

S

10

0 100510

1.2

1.11.00.90.80.70.60.50.40.3

02675-021

,

VGIN

15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95

Figure 15. IIP3 vs. F

VS = 2.7V, TA = +85°C

= 2.7V, TA = +25°C

V

S

V

= 2.7V, TA = –40°C

S

= 5V, TA = +85°C

V

S

RF FREQUENCY (MHz)

, V

= 0.2 V, FBB = 1 MHz

LO

VGIN

= 5V, TA = +85°C

S

= 5V, TA = –40°C

V

S

BASEBAND FREQUENCY (MHz)

BB

VS = 2.7V, TA = +85°C

= 5V, TA = +25°C

V

S

, V

= 1.2 V, FLO = 1900 MHz

VGIN

02675-023

02675-024

Rev. A | Page 9 of 28

Analog Devices AD8347 Service Manual

FEATURES FUNCTIONAL BLOCK DIAGRAM

APPLICATIONS

GENERAL DESCRIPTION

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS

RF AMP AND DEMODULATOR