Analog Devices AD8343 Service Manual
DC-to-2.5 GHz
C
C
FEATURES
High-performance active mixer
Broadband operation to 2.5 GHz
Conversion gain: 7 dB
Input IP3: 16.5 dBm
LO drive: –10 dBm
Noise figure: 14 dB
Input P
Differential LO, IF and RF Ports
50 Ω LO input impedance
Single-supply operation: 5 V @ 50 mA typical
Power-down mode @ 20 μA typical
APPLICATIONS
Cellular base stations
Wireless LAN
Satellite converters
SONET/SDH radio
Radio links
RF instrumentation
: 2.8 dBm
1dB
High IP3 Active Mixer
AD8343
FUNCTIONAL BLOCK DIAGRAM
1
2
3
4
5
6
7
AD8343
BIAS
Figure 1.
14
13
12
11
10
9
8
COMM
OUTP
OUTM
COMM
LOIP
LOIM
COMM
01034-001
OMM
INPP
INPM
DCPL
VPOS
PWDN
OMM
GENERAL DESCRIPTION
The AD8343 is a high-performance broadband active mixer.
With wide bandwidth on all ports and very low intermodulation distortion, the AD8343 is well suited for demanding
transmit applications or receive channel applications.
The AD8343 provides a typical conversion gain of 7 dB. The
integrated LO driver supports a 50 Ω differential input impedance with low LO drive level, helping to minimize external
component count.
The open-emitter differential inputs can be interfaced directly
to a differential filter or driven through a balun (transformer)
to provide a balanced drive from a single-ended source.
The open-collector differential outputs can be used to drive a
differential IF signal interface or convert to a single-ended signal
through the use of a matching network or transformer. When
centered on the VPOS supply voltage, the outputs swing ±1 V.
The LO driver circuitry typically consumes 15 mA of current.
Two external resistors are used to set the mixer core current for
required performance, resulting in a total current of 20 mA to
60 mA. This corresponds to power consumption of 100 mW to
300 mW with a single 5 V supply.
The AD8343 is fabricated on Analog Devices, Inc.’s highperformance 25 GHz silicon bipolar IC process. The AD8343 is
available in a 14-lead TSSOP package. It operates over a −40°C
to +85°C temperature range. A device-populated evaluation
board is available.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
AD8343
TABLE OF CONTENTS
Features.............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram ..............................................................1
General Description......................................................................... 1
Revision History ...............................................................................2
Specifications..................................................................................... 3
Basic Operating Instructions ...................................................... 3
Typical AC Performance.............................................................. 4
Typical Isolation Performance.................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Simplified Interface Schematics .................................................7
Typical Performance Characteristics............................................. 8
Receiver Characteristics .............................................................. 8
Transmit Characteristics............................................................ 13
Circuit Description......................................................................... 15
DC Interfaces .................................................................................. 16
Biasing and Decoupling (VPOS, DCPL)................................. 16
Power-Down Interface (PWDN) .............................................16
AC Interfaces................................................................................... 17
Input Interface (INPP and INPM)............................................... 18
Single-Ended-to-Differential Conversion............................... 18
Input Matching Considerations ............................................... 18
Input Biasing Considerations ................................................... 19
Output Interface (OUTP, OUTM) ...............................................20
Output Matching Considerations............................................ 20
Output Biasing Considerations ................................................20
Input and Output Stability Considerations................................. 21
Local Oscillator Input Interface (LOIP, LOIM)..................... 22
DC Coupling the LO.................................................................. 22
A Step-by-Step Approach to Impedance Matching............... 23
Applications..................................................................................... 26
Downconverting Mixer............................................................. 26
Upconverting Mixer................................................................... 26
Evaluation Board............................................................................ 27
Outline Dimensions....................................................................... 32
Ordering Guide .......................................................................... 32
REVISION HISTORY
11/06—Rev. A to Rev. B
Changes to General Description .................................................... 1
Changes to Table 1............................................................................ 3
Changes to Table 3............................................................................ 4
Changes to Power-Down Interface (PWDN) Section............... 16
Changes to Output Matching Considerations Section.............. 20
Changes to Circuit Description Section...................................... 15
Changes to Output Matching Considerations............................ 20
Changes to Upconverting Mixer Section .................................... 26
Changes to Table 6, Table 7, and Table 8 .....................................27
Changes to Figure 71 and Figure 72............................................. 29
Updated Outline Dimensions....................................................... 32
Changes to Ordering Guide.......................................................... 32
3/02—Rev. 0 to Rev. A
Edits to Absolute Maximum Ratings..............................................3
Edits to Input Interface (LOIP, LOIM)........................................ 17
Edits to Table III ............................................................................. 22
Edits to Table IV ............................................................................. 23
Edits to Table V............................................................................... 23
Edits to Figure 23............................................................................ 23
Edits to Figure 24............................................................................ 23
6/00—Revision 0—Initial Version
Rev. B | Page 2 of 32
AD8343
SPECIFICATIONS
BASIC OPERATING INSTRUCTIONS
VS = 5.0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter Conditions/Comments Min Typ Max Unit
INPUT INTERFACE (INPP, INPM)
Differential Open Emitter
DC Bias Voltage Internally generated 1.1 1.2 1.3 V
Operating Current Each Input (IO) Current set by R3, R4; see Figure 72 5 17.6 20 mA
Value of Bias Setting Resistor
Port Differential Impedance f = 50 MHz; R3 and R4 = 68.1 Ω; see Figure 57 5.6 + j 1.4 Ω
OUTPUT INTERFACE (OUTP, OUTM)
Differential Open Collector
DC Bias Voltage Externally applied 4.5 5 5.5 V
Voltage Swing Collector bias (VS) = VPOS 1.65 VS ± 1 VS + 2 V
Operating Current Each Output Same as input current IO mA
Port Differential Impedance f = 50 MHz; see Figure 60 900 − j 77 Ω
LO INTERFACE (LOIP, LOIM)
Differential Common Base Stage
DC Bias Voltage2 Internally generated; (port is typically ac-coupled) 300 360 450 mV
LO Input Power 50 Ω impedance; see Figure 65 −12 −10 −3 dBm
Port Differential Reflection Coefficient See Figure 64 −10 dB
POWER-DOWN INTERFACE (PWDN)
PWDN Threshold Assured on VS − 1.5 V
Assured off VS − 0.5 V
PWDN Response Time3 Time from device on to off; see Figure 52 2.2 μs
Time from device off to on; see Figure 53 500 ns
PWDN Input Bias Current PWDN = 0 V (device on) −160 −250 μA
PWDN = 5 V (device off) 0 μA
POWER SUPPLY
Supply Voltage Range 4.5 5.0 5.5 V
Total Quiescent Current R3 and R4 = 68.1 Ω; see Figure 72 50 60 mA
Over temperature 75 mA
Powered-Down Current VS = 5.5 V 20 95 μA
V
Over temperature; VS = 5.5 V 50 150 μA
1
The balance in the bias current in the two legs of the mixer input is important to applications where a low feedthrough of the local oscillator (LO) is critical.
2
This voltage is proportional to absolute temperature (PTAT). See the DC Coupling the LO section for more information regarding this interface.
3
Response time until device meets all specified conditions.
1
1% bias resistors; R3, R4; see Figure 72 68.1 Ω
= 4.5 V 6 15 μA
S
Rev. B | Page 3 of 32
AD8343
TYPICAL AC PERFORMANCE
VS = 5.0 V, TA = 25°C; see Figure 72, Table 6 through Table 8.
Table 2.
Conversion
Input Frequency (MHz) Output Frequency (MHz)
RECEIVER CHARACTERISTICS
400 70 5.6 10.5 20.5 3.3
900 170 3.6 11.4 19.4 3.6
1900 170 7.1 14.1 16.5 2.8
2400 170 6.8 15.3 14.5 2.1
2400 425 5.4 16.2 16.5 2.2
TRANSMITTER CHARACTERISTICS
150 900 7.5 17.9 18.1 1.9
150 1900 0.25 16.0 13.4 0.8
Gain (dB)
TYPICAL ISOLATION PERFORMANCE
VS = 5.0 V, TA = 25°C; see Figure 72, Table 6 through Table 8.
Table 3.
LO to Output
Input Frequency (MHz) Output Frequency (MHz)
RECEIVER CHARACTERISTICS
400 70 −40.1 −51.0 −44.0 −62.4
900 170 −44.4 −35.5 <−75.0 −56.9
1900 170 −65.6 −38.3 −73.3 −65.7
2400 170 −66.7 −44.4 <−73.7 −73.7
2400 425 −51.1 −49.4 <−75.0 −92.3
TRANSMITTER CHARACTERISTICS
150 900 −30 −32 −62 −50
150 1900 −25 −17 −65 −40
Leakage (dBm)
SSB Noise
Figure (dB)
2xLO to Output
Leakage (dBm)
Input IP3 (dBm)
3xLO to Output
Leakage (dBm)
Input 1 dB Compression
Point (dBm)
Input to Output
Leakage (dBm)
Rev. B | Page 4 of 32
AD8343
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
VPOS Quiescent Voltage 5.5 V
OUTP, OUTM Quiescent Voltage 5.5 V
INPP, INPM Voltage Differential
(Either Polarity)
LOIP, LOIM Current
(Injection or Extraction)
LOIP, LOIM Voltage Differential
(Either Polarity)
Internal Power Dissipation (TSSOP)
θJA (TSSOP) 125°C/W
Maximum Junction Temperature 125°C
Operating Temperature Range −40°C to + 85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering 60 sec) 300°C
1
A portion of the device power is dissipated by external bias resistors, R3 and R4.
1
500 mV
1 mA
500 mV
320 mW
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. B | Page 5 of 32
AD8343
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
COMM
1
AD8343
2
INPP
INPM
DCPL
VPOS
PWDN
COMM
TOP VIEW
3
(Not to Scale)
4
5
6
7
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1, 7, 8, 11, 14 COMM Connect to low impedance circuit ground.
2 INPP Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3.
3 INPM Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3.
4 DCPL Bias rail decoupling capacitor connection for LO driver; see Figure 6.
5 VPOS
Positive Supply Voltage (V
shown in the
6 PWDN
Power-Down Interface. Connect pin to ground for normal operating mode. Connect pin to supply for powerdown mode; see
Applications section.
Figure 5.
), 4.5 V to 5.5 V. Ensure adequate supply bypassing for proper device operation as
S
9 LOIM Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4.
10 LOIP Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4.
12 OUTM Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3.
13 OUTP Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3.
14
13
12
11
10
9
8
COMM
OUTP
OUTM
COMM
LOIP
LOIM
COMM
01034-002
Rev. B | Page 6 of 32
AD8343
V
V
SIMPLIFIED INTERFACE SCHEMATICS
OUTP
VPOS
5V
DC
OUTM
5V
5V
DC
DC
INPP
INPM
LOIP
LOIM
1.2V
DC
1.2V
DC
Figure 3. Input and Output Ports
5V
360mV
DC
360mV
DC
Figure 4. LO Port
POS
DC
VPOS
5V
DC
400Ω
400Ω
VBIAS
LOIP
LOIM
PWDN
01034-003
DCPL
VPOS
LOIP
LOIM
1034-004
POS
5V
DC
25kΩ
Figure 5. Power-Down Pin
BIAS
360mV
360mV
CELL
DC
DC
R1
10Ω
Figure 6. Bias Decoupling Pin
2V
DC
LO
BUFFER
BIAS
CELL
01034-005
TO
MIXER
CORE
01034-006
Rev. B | Page 7 of 32
AD8343
TYPICAL PERFORMANCE CHARACTERISTICS
RECEIVER CHARACTERISTICS
fIN = 400 MHz, f
= 70 MHz, f
OUT
= 330 MHz, see Figure 72, Tab le 6 , and Tabl e 8.
LO
60
MEAN: 5.57dB
50
40
30
PERCENTAGE
20
10
0
5.37 5.42 5.47 5. 52 5.57 5.62 5.67 5.72
Figure 7. Gain Hi stogram; f
25
20
15
10
PERCENTAGE
5
0
19.9 20.0 20.1 20.2 20. 3 20.4 20.5 20.6 20.7 20. 8 20.9 21.0
Figure 8. Input IP3 Histogram; fIN = 400 MHz, f
CONVERSION G AIN (dB)
= 400 MHz, f
IN
INPUT IP3 (dBm)
= 70 MHz
OUT
MEAN: 20.5dBm
= 70 MHz
OUT
10
9
8
7
6
CONVERSION G AIN (dB)
5
01034-007
01034-008
4
TEMPERATURE (°C)
Figure 10. Gain Performance Over Temperature; f
f
= 70 MHz
OUT
24
23
22
21
20
19
INPUT IP3 (dBm)
18
17
16
15
TEMPERATURE (°C)
Figure 11. Input IP3 Performance Over Temperature; f
= 70 MHz
f
OUT
6040200–20–40 80
= 400 MHz,
IN
6040200–20–40 80
= 400 MHz,
IN
01034-010
01034-011
60
55
50
45
40
35
30
25
PERCENTAGE
20
15
10
5
0
3.24 3.26 3.28 3. 30 3.32 3.34 3.36 3.38
INPUT 1dB CO MPRESSIO N POINT (dBm)
Figure 9. Input 1 dB Compression Point Histogram; f
f
= 70 MHz
OUT
MEAN: 3.31dB
= 400 MHz,
IN
01034-009
Rev. B | Page 8 of 32
5.0
4.5
4.0
3.5
3.0
2.5
INPUT 1dB COMPRESSION POINT (dBm)
2.0
TEMPERATURE (°C)
6040200–20–40
01034-012
80
Figure 12. Input 1 dB Compression Point Performance Over Temperature;
f
= 400 MHz, f
IN
= 70 MHz
OUT
AD8343
fIN = 900 MHz, f
35
= 170 MHz, fLO = 730 MHz, see Figure 72, Tabl e 6, and Tabl e 8.
OUT
6
30
25
20
15
PERCENTAGE
10
5
0
CONVERSION G AIN (dB)
Figure 13. Gain Histogram; f
30
28
26
24
22
20
18
16
14
12
PERCENTAGE
10
8
6
4
2
0
Figure 14. Input IP3 Histogram; f
30
28
26
24
22
20
18
16
14
12
PERCENTAGE
10
8
6
4
2
0
INPUT 1dB COMPRESSION POINT (d Bm)
= 900 MHz, f
IN
INPUT IP3 (dBm)
= 900 MHz, f
IN
Figure 15. Input 1 dB Compression Point Histogram; f
f
= 170 MHz
OUT
MEAN: 3.63dB
OUT
MEAN: 19.4dBm
19.619.419.219.018.818.618.418.2 20.420.220.019.8
OUT
MEAN: 3.62dBm
3.663.643.623.603.583.563.543.52 3.723.703.68
3.753.703.653.603.553.503.453.40 3.853.80
= 170 MHz
= 170 MHz
= 900 MHz,
IN
5
4
3
2
CONVERSION GAIN (dB)
1
01034-013
01034-014
01034-015
0
TEMPERATURE (°C)
Figure 16. Gain Performance Over Temperature; f
f
= 170 MHz
OUT
23
22
21
20
19
18
INPUT IP3 (dBm)
17
16
15
TEMPERATURE (°C)
Figure 17. Input IP3 Performance Over Temperature; f
f
= 170 MHz
OUT
5.0
4.5
4.0
3.5
3.0
2.5
INPUT 1dB COM PRESSION P OINT (dBm)
2.0
TEMPERATURE (°C)
6040200–20–40
= 900 MHz ,
IN
6040200–20–40 80
= 900 MHz,
IN
6040200–20–40
01034-016
80
01034-017
01034-018
80
Figure 18. Input 1dB Compression Point Performance Over Temperature;
= 900 MHz, f
f
IN
= 170 MHz
OUT
Rev. B | Page 9 of 32
AD8343
fIN = 1900 MHz, f
28
26
24
22
20
18
16
14
12
PERCENTAGE
10
8
6
4
2
0
Figure 19. Gain Histogram; f
= 170 MHz, fLO = 1730 MHz, see Figure 72, Ta ble 6, and Table 8 .
OUT
MEAN: 7.09dB
CONVERS ION G AIN (d B)
IN
7.107.057.006.956.906.856.806.75 7.307.257.207.15
= 1900 MHz, f
= 170 MHz
OUT
01034-019
10
9
8
7
6
CONVERSION G AIN (dB)
5
4
TEMPERATURE (°C)
Figure 22. Gain Performance Over Temperature; f
= 170 MHz
f
OUT
6040200–20–40 80
= 1900 MHz,
IN
01034-022
45
40
MEAN: 16.54dBm
35
30
25
20
PERCENTAGE
15
10
5
0
INPUT IP3 (dBm)
Figure 20. Input IP3 Histogram; fIN = 1900 MHz, f
50
45
40
35
30
25
20
PERCENTAGE
15
10
5
0
INPUT 1d B COMP RESSIO N POI NT (dBm)
Figure 21. Input 1 dB Compression Point Histogram; f
f
= 170 MHz
OUT
17.517.016.516.015.515.014.514.0 18.518.0
= 170 MHz
OUT
MEAN: 2.8dBm
2.952.902.852.802.752.702.652.60 3.053.00
= 1900 MHz,
IN
18
17
16
15
14
13
INPUT IP3 (dBm)
12
11
01034-020
01034-021
10
TEMPERATURE (°C)
Figure 23. Input IP3 Performance Over Temperature; f
= 170 MHz
f
OUT
5.0
4.5
4.0
3.5
3.0
2.5
INPUT 1dB COM PRESSION P OINT (dBm)
2.0
TEMPERATURE (°C)
6040200–20–40 80
= 1900 MHz,
IN
6040200–20–40
01034-023
01034-024
80
Figure 24. Input 1 dB Compression Point Performance Over Temperature;
f
= 1900 MHz, f
IN
= 170 MHz
OUT
Rev. B | Page 10 of 32
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