ANALOG DEVICES AD8335 Service Manual

Quad Low Noise, Low Cost

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FEATURES

Low noise preamplifier (PrA) Voltage noise = 1.3 nV/√Hz typical Current noise = 2.4 pA/√Hz typical NF = 7 dB (R Single-ended input; V Active input match Input SNR (noise bandwidth = 20 MHz) = 92 dB VGA

Differential output V

OUT

Gain range (8 dB output gain step)

−10 dB to +38 dB—low gain mode

−2 dB to +46 dB—high gain mode

Accurate linear-in-dB gain control

PrA + VGA performance

−3 dB bandwidth of 85 MHz Excellent overload performance Supply: 5 V

Power consumption

95 mW/channel (380 mW total) 65 mW/channel (PrA off; 260 mW total)

Power-down

APPLICATIONS

Medical imaging (ultrasound, gamma cameras) Sonar Test and measurement Precise, stable wideband gain control

= RIN = 50 Ω)

S

maximum = 625 mV p-p

IN

maximum = 5 V p-p, RL = 500 Ω differential

PIP1

PMD1

PMD2

PIP2

PON2

POP2

VIP2

VIN2

VIN3

VIP3

POP3

PON3

PIP3

PMD3

PMD4

PIP4

Variable Gain Amplifier

AD8335

FUNCTIONAL BLOCK DIAGRAM

PON160POP159VIP158VIN153VCM255VCM1

61

63

18dB

64

1

18dB

2

4

5

6

7

10

11

12

13

15

18dB

16

17

18dB

18

20

21

PON4

VMD1

VMD2

AD8335

VMD3

VMD4

22

POP4

VIP4

23

VIN4

Figure 1.

28

VCM326VCM4

INTERPOLATOR

52

ATT EN

–48dB TO

0dB

ATT EN

–48dB TO

0dB

ATT EN

–48dB TO

0dB

ATT EN

–48dB TO

0dB

29

EN1251SP1249HL12

20dB

TO

28dB

GAIN INT

20dB

TO

28dB

20dB

TO

28dB

GAIN INT

20dB

TO

28dB

30

SP3432HL34

EN34

47

VOH1

46

VOL1

56

VGN1

50

SL12

54

VGN2

43

VOL2

42

VOH2

39

VOH3

38

VOL3

27

VGN3

31

SL34

25

VGN4

35

VOL4

34

VOH4

04976-001

GENERAL DESCRIPTION

The AD8335 is a quad variable gain amplifier (VGA) with low noise preamplifier intended for cost and power sensitive applications. Each channel features a gain range of 48 dB, fully differential signal paths, active input preamplifier matching, and user-selectable maximum gains of 46 dB and 38 dB. Individual gain controls are provided for each channel.

The preamplifier (PrA) has a single-ended to differential gain of ×8 (18.06 dB) and accepts input signals ≤625 mV p-p. PrA noise is 1.2 nV/√Hz and the combined input referred voltage noise of the PrA and VGA is 1.3 nV/√Hz at maximum gain.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

Assuming a 20 MHz noise bandwidth (NBW), the Nyquist frequency for a 40 MHz ADC, the input SNR is 92 dB. The HLxx pin optimizes the output SNR for 10-bit and 12-bit ADCs with 1 V p-p or 2 V p-p full-scale (FS) inputs.

Channel 1 and Channel 2 are enabled through the EN12 pin and Channel 3 and Channel 4 are enabled through the EN34 pin. For VGA only applications, the PrAs can be powered down, significantly reducing power consumption.

The AD8335 is available in a 64-lead lead frame chip scale package (9 mm × 9 mm) for the industrial temperature range of −40°C to +85°C.

AD8335

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REVISION HISTORY

8/08—Rev. 0 to Rev. A

Changes to Features Section............................................................ 1

Changes to Table 1, Scale Factor Parameter .................................. 4

Changes to Theory of Operation Section .................................... 16

Changes to Figure 54 ...................................................................... 16

Changes to Equation 4 ................................................................... 18

Changes to Figure 58 ...................................................................... 21

Added Evaluation Board Section ................................................. 23

Added Figure 60 to Figure 68 ........................................................ 23

Updated Outline Dimensions ....................................................... 28

Changes to Ordering Guide .......................................................... 28

9/04—Revision 0: Initial Version

Rev. A | Page 2 of 28

AD8335

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SPECIFICATIONS

VS = 5 V, TA = 25°C, RL = 500 Ω, f = 5 MHz, CL = 10 pF, low gain range (−10 dB to +38 dB), RFB = 249 Ω (PrA RIN = 50 Ω) and signal voltage specified differential, per channel performance, dBm (50 Ω), unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

PrA CHARACTERISTICS

Gain Single-ended input to single-ended output 12 dB Input Voltage Range PrA output limited to 5 V p-p differential 625 mV p-p Input Resistance RFB = 249 Ω 50 Ω R R R Input Capacitance PIPx (Pin 2, Pin 15, Pin 18, Pin 63) 1.5 pF

−3 dB Small Signal Bandwidth With RFB = 249 Ω 110 MHz Input Voltage Noise RS = 0 Ω, RFB = ∞ 1.15 nV/√Hz Input Current Noise 2.4 pA/√Hz Noise Figure

Active Termination Match RS = RIN = 50 Ω, RFB = 249 Ω 7 dB Unterminated RS = 50 Ω, RFB = ∞ 4.4 dB

PrA + VGA CHARACTERISTICS

−3 dB Small Signal Bandwidth Unterminated: RS = 50 Ω, RFB = ∞ 70 MHz Matched: RS = RIN = 50 Ω 85 MHz Slew Rate Low gain, VGN = 3 V, V

High gain, VGN = 3 V, V

Input Voltage Noise VGNx pins = 3 V, RS = 0 Ω, RFB = ∞ 1.3 nV/√Hz Noise Figure

Active Termination Match

R

Unterminated RS = 50 Ω, RFB = ∞ 5.0 dB R Output Referred Noise Low gain; VGN < 2 V 33 nV/√Hz High gain; VGN < 2 V 80 nV/√Hz Peak Output Voltage Differential, RL ≥ 500 Ω 5 V p-p Output Resistance f < 1 MHz, VOHx, VOLx pins 1.2 Ω Common-Mode Level Set to midsupply for PrA and VGA VS/2 V Output Offset Voltage

Differential Between VOHx pins and VOLx pins, full gain range −25 +5 +35 mV

Common-Mode

Harmonic Distortion V

HD2 f = 1 MHz −69 dBc

HD3 f = 1 MHz −57 dBc

HD2 f = 10 MHz −57 dBc

HD3 f = 10 MHz −55 dBc Harmonic Distortion V

HD2 f = 1 MHz −58 dBc

HD3 f = 1 MHz −70 dBc

HD2 f = 10 MHz −55 dBc

HD3 f = 10 MHz −55 dBc Output 1 dB Compression (OP1dB) VGN = 3 V 18 dBm VGN = 3 V 8 dBV peak

Single-ended input to differential output 18 dB

= 374 Ω 75 Ω

FB

= 499 Ω 100 Ω

FB

= ∞, low frequency value into PIPx 14.7 kΩ

FB

= 2 V p-p 250 V/µs

OUT

= 2 V p-p 350 V/µs

OUT

VGNx pins = 3 V, f = 1 MHz to 10 MHz RS = RIN = 50 Ω 7 dB

= RIN = 100 Ω 4.5 dB

S

= 500 Ω, RFB = ∞ 1.3 dB

S

Between VOHx pins and VCMx pins, and between VOLx pins and VCMx pins

= 1 V p-p, low gain, VGN = 2 V

OUT

= 1 V p-p, high gain, VGN = 2 V

OUT

−20 +0 +20 mV

Rev. A | Page 3 of 28

AD8335

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Parameter Conditions Min Typ Max Unit

Two-Tone IMD3 Distortion V f f Output IP3 (OIP3) V f = 1 MHz 33 dBm f = 10 MHz 31 dBm Channel-to-Channel Crosstalk V Overload Recovery PrA or VGA 10 ns Group Delay Variation Full gain range, f = 1 MHz to 10 MHz 3.0 ns

GAIN CONTROL INTERFACE VGNx pins

Normal Operating Range 0 Maximum Range No gain foldover 0 VS V Gain Range Low gain mode; (HLxx pins = 0 V) −10 to +38 dB High gain mode; (HLxx pins = VS) −2 to +46 dB Scale Factor Nominal (Pin SL12 and Pin SL34 = 2.5 V) 19.1 20.1 21.1 dB/V Bias Current −0.3 µA Response Bandwidth 5 MHz Response Time 48 dB gain change 350 ns

GAIN ACCURACY VGNx pins

Absolute Gain Error 0 ≤ VGN ≤ 0.4 V 1.25 7.5 dB

0.4 ≤ VGN ≤ 2.6 V, 1σ −1.25 ±0.2 +1.25 dB

2.6 ≤ VGN ≤ 3 V −7.5 −1.25 dB Gain Law Conformance Over Temperature 0.4 ≤ VGN ≤ 2.6 V; −40°C < TA < +85°C ±0.75 dB Intercept Low gain mode; PrA matched to 50 Ω −16.1 dB High gain mode; PrA matched to 50 Ω −8.1 dB Channel-to-Channel Matching 0.4 ≤ VGN ≤ 2.6 V 0.15 dB

LOGIC LEVEL—HIGH/LOW, SHUTDOWN PREAMP, and ENABLE INTERFACES

Logic High 2.75 5 V Logic Low 0 1 V

BIAS CURRENT—HIGH/LOW, ENABLE

Logic High 80 µA

Logic Low −12 µA INPUT RESISTANCE—HIGH/LOW, ENABLE 50 kΩ BIAS CURRENT— SHUTDOWN PREAMP

Logic High 20 µA

Logic Low 0 µA INPUT RESISTANCE—SHUTDOWN PREAMP 500 kΩ

High/Low Response Time 0.6 µs

Enable Response Time 100 µs POWER SUPPLY VPPx and VPVx pins

Supply Voltage 4.5 5 5.5 V

Quiescent Current Each channel—PrA and VGA enabled 19 mA

Each channel—PrA disabled, VGA enabled 13 mA

All channels enabled 76 mA

Over Temperature −40°C < TA < +85°C 16 22.8 mA

Quiescent Power Each channel—PrA and VGA enabled 95 mW

Each channel—PrA disabled, VGA enabled 65 mW

Disable Current All channels disabled 0.8 mA

PSRR VGN = 0 V, all bypass capacitors removed, 1 MHz −60 dB

= 1 V p-p, VGN = 3 V

OUT

= 1 MHz, f2 = 1.05 MHz −69 dBc

1

= 10 MHz, f2 = 10.05 MHz −65 dBc

1

= 1 V p-p, VGN = 3 V

OUT

= 1 V p-p, f = 1 to 10 MHz −80 dBc

OUT

HLxx, SPxx, and ENxx pins

3 V

Rev. A | Page 4 of 28

AD8335

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ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Voltage

Supply VS 6 V Preamp Input VS VGA Inputs VS Enable, Shutdown Preamp, and

High/Low Interfaces

Gain VS Power Dissipation (4-Layer JEDEC Board (2s2p)) 2.46 W θJA 26.4°C/W θJC 6.8°C/W Operating Temperature Range −40°C to +85°C Storage Temperature Range

Lead Temperature Range (Soldering 60 sec) 300°C

V

S

−65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

Rev. A | Page 5 of 28

AD8335

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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

PMD1

PIP1

VPP1

PON1

POP1

VIP1

VIN1

COM1

VGN1

VCM1

VGN2

VCM2

EN12

SP12

SL12

646362616059585756555453525150

HL12

49

PMD2

PIP2

VPP2 PON2 POP2

VIP2

VIN2 COM2 COM3

VIN3

VIP3 POP3 PON3

VPP3

PIP3 PMD3

10 11 12 13 14 15 16

PIN 1

1

IDENTIFIER

2 3 4 5 6 7 8 9

171819202122232425262728293031

PIP4

VPP4

PON4

PMD4

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No. Mnemonic Description

1 PMD2 Preamp Input Common—CH2 2 PIP2 Preamp Input—CH2 3 VPP2 Positive Supply Preamp—CH2 4 PON2 Preamp Output Negative—CH2 5 POP2 Preamp Output Positive—CH2 6 VIP2 VGA Input Positive—CH2 7 VIN2 VGA Input Negative—CH2 8 COM2 Ground Preamp—CH2 9 COM3 Ground Preamp—CH3 10 VIN3 VGA Input Negative—CH3 11 VIP3 VGA Input Positive—CH3 12 POP3 Preamp Output Positive—CH3 13 PON3 Preamp Output Negative—CH3 14 VPP3 Positive Supply Preamp—CH3 15 PIP3 Preamp Input—CH3 16 PMD3 Preamp Input Common—CH3 17 PMD4 Preamp Input Common—CH4 18 PIP4 Preamp Input—CH4 19 VPP4 Positive Supply Preamp—CH4 20 PON4 Preamp Output Negative—CH4 21 POP4 Preamp Output Positive—CH4 22 VIP4 VGA Input Positive—CH4 23 VIN4 VGA Input Negative—CH4 24 COM4 Ground Preamp—CH4 25 VGN4 Gain Control—CH4 26 VCM4 Common-Mode Decoupling Pin—CH4 27 VGN3 Gain Control—CH3 28 VCM3 Common-Mode Decoupling Pin—CH3 29 EN34 Enable—CH3 and CH4 30 SP34 Shutdown—Preamp 3 and Preamp 4 31 SL34 Slope Decoupling Pin—CH3 and CH4 32 HL34 High/Low Pin—CH3 and CH4

Rev. A | Page 6 of 28

AD8335

TOP VIEW

(Not to Scale)

VIP4

VIN4

POP4

COM4

48

GND1

47

VOH1

46

VOL1

45

VPV1

44

VPV2

43

VOL2

42

VOH2

41

GND2

40

GND3

39

VOH3

38

VOL3

37

VPV3

36

VPV4

35

VOL4

34

VOH4

33

GND4

32

SL34

SP34

HL34

EN34

VGN4

VGN3

VCM4

VCM3

04976-058

Pin No. Mnemonic Description

33 GND4 Ground VGA—CH4 34 VOH4 VGA Output Positive—CH4 35 VOL4 VGA Output Negative—CH4 36 VPV4 Positive Supply VGA—CH4 37 VPV3 Positive Supply VGA—CH3 38 VOL3 VGA Output Negative—CH3 39 VOH3 VGA Output Positive—CH3 40 GND3 Ground VGA—CH3 41 GND2 Ground VGA—CH2 42 VOH2 VGA Output Positive—CH2 43 VOL2 VGA Output Negative—CH2 44 VPV2 Positive Supply VGA—CH2 45 VPV1 Positive Supply VGA—CH1 46 VOL1 VGA Output Negative—CH1 47 VOH1 VGA Output Positive—CH1 48 GND1 Ground VGA—CH1 49 HL12 High/Low Pin—CH1 and CH2 50 SL12 Slope Decoupling Pin—CH1 and CH2 51 SP12 Shutdown—Preamp 1 and Preamp 2 52 EN12 Enable—CH1 and CH2 53 VCM2 Common-Mode Decoupling Pin—CH2 54 VGN2 Gain Control—CH2 55 VCM1 Common-Mode Decoupling Pin—CH1 56 VGN1 Gain Control—CH1 57 COM1 Ground Preamp—CH1 58 VIN1 VGA Input Negative—CH1 59 VIP1 VGA Input Positive—CH1 60 POP1 Preamp Output Positive—CH1 61 PON1 Preamp Output Negative—CH1 62 VPP1 Positive Supply Preamp—CH1 63 PIP1 Preamp Input—CH1 64 PMD1 Preamp Input Common—CH1

AD8335

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TYPICAL PERFORMANCE CHARACTERISTICS

VS = 5 V, TA = 25°C, RL = 500 Ω, f = 5 MHz, CL = 10 pF, low gain range (−10 dB to +38 dB), RFB = 249 Ω (PrA RIN = 50 Ω) and signal voltage specified differential, per channel performance, unless otherwise noted.

50

40

30

20

+25°C

10

GAIN (dB)

0

–10

–20

Figure 3. Gain vs. V

+85°C

HIGH GAIN

LOW GAIN

–40°C

1.0 1.50 0.5 2.0 2.5 3.0

at Three Temperatures (See Figure 49)

GAIN

V

GAIN

(V)

04976-002

20

420 CHANNELS

18

(105 UNITS) V

= 1.5V

GAIN

16

14

12

10

8

% OF UNITS

6

4

2

0

–0.6 –0.5 –0.4 –0.3 –0. 2 0 0.4–0.1 0.1 0.2 0.3 0.5 0.6

GAIN ERROR (dB)

Figure 6. Gain Error Histogram

04976-005

2.0

1.5

1.0

0.5

0

–0.5

GAIN ERROR (d B)

–1.0

–1.5

–2.0

+85°C, LOW GAIN

+25°C, LOW GAIN

+25°C, HIG H GAIN

Figure 4. Gain Error vs. V

6.0

4.0

GAIN ERROR (dB)

2.0

0

–2.0

–4.0

–6.0

20MHz

1MHz

Figure 5. Gain Error vs. V

+85°C, HIGH GAIN

–40°C, LOW GAIN

–40°C, HIG H GAIN

1.0 1.50 0.5 2.0 2.5 3.0

GAIN

1.0 1.50 0.5 2.0 2.5 3.0

GAIN

(V)

V

GAIN

at Three Temperatures (See Figure 49)

5MHz

10MHz

(V)

V

GAIN

at Various Frequencies (See Figure 49)

25

420 CHANNELS

20

(105 UNITS) V

= 1.0V

GAIN

15

10

5

0

–1.0

–0.9

–0.8

–0.7

–0.6

–0.5

25

% OF UNITS

V

= 2.0V

GAIN

20

CH1 TO CH2

15

CH1 TO CH4

10

CH1 TO CH3

5

0

–1.0

–0.9

04976-003

–0.8

–0.4

–0.7

–0.6

–0.5

–0.4

CHANNEL-TO- CHANNEL GAIN MATCH (dB)

Figure 7. Gain Match Histogram for V

45

420 CHANNELS (105 UNITS)

40

0.5V < V

35

30

25

20

%TOTAL

15

10

5

0

04976-004

< 2.5V

GAIN

GAIN SCALING FACTOR

Figure 8. Gain Scaling Factor Histogram for 0.5 V < V

0

0.1

0.3

0.4

0.5

–0.3

–0.2

–0.3

–0.2

0.2

–0.1

0

0.1

0.3

0.4

0.5

0.2

–0.1

= 1 V and 2 V

GAIN

0.9

0.6

0.7

0.8

1.0

0.9

0.6

0.7

0.8

1.0

04976-006

20.419.9 20.0 20.1 20.2 20.3

04976-007

< 2.5 V

GAIN

Rev. A | Page 7 of 28

AD8335

–

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25

20

15

%TOTAL

10

420 CHANNELS (105 UNITS)

0.5V < V

GAIN

< 2.5V

30

25

20

RS = 50Ω

15

V

= 10mV p-p

IN

10

GAIN (dB)

5

RFB = 249Ω

RFB =

∞

5

0

–16.7

–16.6

–16.5

–16.4

–16.3

–16.1

–16.2

–16.0

–15.9

INTERCEPT ( dB)

–15.8

Figure 9. Intercept Histogram

50

V

= 3.0V

GAIN

40

V

= 2.5V

GAIN

30

V

= 2.0V

GAIN

20

V

= 1.5V

GAIN

10

GAIN (dB)

V

= 1.0V

GAIN

0

V

= 0.5V

GAIN

–10

V

= 0V

GAIN

–20

1M100k 10M 100M 1G

FREQUENCY ( Hz)

Figure 10. Frequency Response for Various Values of V

–15.7

–15.6

–15.5

(See Figure 49)

GAIN

0

–5

–10

04976-008

1M100k 10M 100M 1G

FREQUENCY ( Hz)

04976-011

Figure 12. Frequency Response for a Terminated and Unterminated

50 Ω Source (See Figure 49)

10

V

= 1V p-p

OUT

–20

–30

–40

–50

–60

V

= 1V

GAIN

CROSSTALK (dB)

–70

–80

–90

–100

04976-009

V

= 3V

GAIN

V

= 2V

GAIN

100k 10M1M 100M

FREQUENCY ( Hz)

V

GAIN

V

GAIN

= 1V

= 2V

V

GAIN

= 3V

04976-012

Figure 13. Channel-to-Channel Crosstalk vs. Frequency for

Various Values of V

GAIN

50

V

= 3.0V

GAIN

40

V

= 2.5V

GAIN

V

= 2.0V

GAIN

30

V

= 1.5V

GAIN

20

V

= 1.0V

GAIN

10

GAIN (dB)

V

= 0.5V

GAIN

0

V

= 0V

GAIN

–10

–20

1M100k 10M 100M 1G

FREQUENCY ( Hz)

Figure 11. Frequency Response vs. Frequency for Various Values of V

04976-010

GAIN

,

80

70

60

50

40

30

GROUP DELAY (ns)

20

10

0

100k 10M1M 100M

FREQUENCY ( Hz)

Figure 14. Group Delay vs. Frequency

HLxx = High (See Figure 49)

Rev. A | Page 8 of 28

04976-013

AD8335

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25

20

15

10

5

0

–5

–10

OFFSET VOLTAGE (mV)

–15

–20

–25

+85°C, HIG H

+85°C, LO W

–40°C, LO W

1.0 1.50 0.5 2.0 2.5 3.0

V

GAIN

–40°C, HIG H

(V)

Figure 15. Differential Output Offset Voltage vs. V

+25°C, HIG H

+25°C, LO W

at Three Temperatures

GAIN

04976-014

1k

RFB = 2.5kΩ

RFB = 1kΩ

R

= 499Ω

FB

100

R

= 249Ω

FB

INPUT IMPE DANCE (Ω)

10

RSH =∞, CSH = 0pF

R

= 49Ω, CSH = 22pF

SH

1M 10M 1G

FREQUENCY ( Hz)

Figure 18. Preamp Input Resistance vs. Frequency for

Various Values of R

FB

04976-017

25

20

15

10

5

0

–5

–10

OFFSET VOLTAGE (mV)

–15

–20

–25

1.0 1.50 0.5 2.0 2.5 3.0

Figure 16. Absolute Offset vs. V

Relative to VCMx Pins

100

VIN = 10mV p-p

10

(V)

V

GAIN

at VOHx and VOLx Pins

GAIN

VOHx

VOLx

50Ω

START 100kHz

100MHz

50j

–50j

150Ω

STOP 1GHz

100j

–75j

04976-018

VIN = 10mV p-p

–10

–20

–30

–40

–50

0Ω

–60

CROSSTALK (dB)

–70

–80

–90

–100

04976-015

25j

17Ω

–25j

Figure 19. Smith Chart S11 vs. Frequency, 100 kHz to 1 GHz

250

R

= 0Ω

S

R

=

∞

FB

200

150

1

OUTPUT IMPEDANCE (Ω)

0.1 1M100k 10M 1G

FREQUENCY ( Hz)

Figure 17. Output Resistance at VOHx and VOLx Pins vs. Frequency

04976-016

100

50

OUTPUT REF ERRED NOISE ( nV/ Hz)

0

Figure 20. Output Referred Noise vs. V

Rev. A | Page 9 of 28

HLxx = HIGH

HLxx = LOW

1.0 1.50 0.5 2.0 2.5 3.0

V

(V)

GAIN

(See Figure 50)

GAIN

04976-019

ANALOG DEVICES AD8335 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS