Analog Devices AD824 Datasheet

Single Supply, Rail-to-Rail

OUT A

–IN A

OUT D
–IN D

+INB
–INB

OUTB

+IN C
–IN C
OUT C

+IN A

V+

+IN D
V–

1
2

14
13

5
6
7

10

9
8

3
4

12
11

TOP VIEW

(Not to Scale)

AD824

OUT A

–IN A

OUT D
–IN D

+IN B
–IN B

OUT B

+IN C
–IN C
OUT C

+IN A

V+

+IN D
V–

1
2

14
13

5
6
7

10

9
8

3
4

12
11

TOP VIEW

AD824

1
2
3
4
5
6
7
8

14
13
12
11
10

9

15

16

OUT A

–IN A
+IN A

V+
+IN B
–IN B

OUT B

–IN D
+IN D
V–
+IN C
–IN C
OUT C

OUT D

NC

NC

NC = NO CONNECT

AD824

a

FEATURES
Single Supply Operation: 3 V to 30 V
Very Low Input Bias Current: 2 pA
Wide Input Voltage Range
Rail-to-Rail Output Swing
Low Supply Current: 500 mA/Amp
Wide Bandwidth: 2 MHz
Slew Rate: 2 V/ms
No Phase Reversal

APPLICATIONS
Photo Diode Preamplifier
Battery Powered Instrumentation
Power Supply Control and Protection
Medical Instrumentation
Remote Sensors
Low Voltage Strain Gage Amplifiers
DAC Output Amplifier

GENERAL DESCRIPTION

The AD824 is a quad, FET input, single supply amplifier, fea­turing rail-to-rail outputs. The combination of FET inputs and
rail-to-rail outputs makes the AD824 useful in a wide variety of
low voltage applications where low input current is a primary
consideration.

The AD824 is guaranteed to operate from a 3 V single supply
up to ±15 volt dual supplies.

Fabricated on ADI’s complementary bipolar process, the AD824
has a unique input stage that allows the input voltage to safely
extend beyond the negative supply and to the positive supply
without any phase inversion or latchup. The output voltage
swings to within 15 millivolts of the supplies. Capacitive loads
to 350 pF can be handled without oscillation.

The FET input combined with laser trimming provides an input
that has extremely low bias currents with guaranteed offsets be­low 300 µV. This enables high accuracy designs even with high
source impedances. Precision is combined with low noise,
making the AD824 ideal for use in battery powered medical
equipment.

Low Power, FET-Input Op Amp

AD824

PIN CONFIGURATIONS

14-Lead Epoxy DIP

(N Suffix)

16-Lead Epoxy SO

(R Suffix)

Applications for the AD824 include portable medical equipment,
photo diode preamplifiers and high impedance transducer
amplifiers.

The ability of the output to swing rail-to-rail enables designers
to build multistage filters in single supply systems and maintain
high signal-to-noise ratios.

The AD824 is specified over the extended industrial (–40°C to
+85°C) temperature range and is available in 14-pin DIP and
narrow 14-pin and 16-pin SO packages.

14-Lead Epoxy SO

(R Suffix)

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1997

AD824–SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

(@ VS = +5.0 V, VCM = 0 V, V

= 0.2 V, TA = +258C unless otherwise noted)

OUT

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS

Offset Voltage AD824A V

Offset Voltage AD824B V

Input Bias Current I

Input Offset Current I

B

OS

OS

OS

T

to T

MIN

T

MIN

T

MIN

T

MIN

to T

to T

to T

MAX

MAX

MAX

MAX

0.1 1.0 mV

1.5 mV
300 µV
900 µV

212pA
300 4000 pA
210pA

300 pA
Input Voltage Range –0.2 3.0 V
Common-Mode Rejection Ratio CMRR V

Input Impedance 10
Large Signal Voltage Gain A

VO

= 0 V to 2 V 66 80 dB

CM

V

= 0 V to 3 V 60 74 dB

CM

T

MIN

to T

MAX

60 dB

13

i3.3 ΩipF

VO = 0.2 V to 4.0 V
R

= 2 kΩ 20 40 V/mV

L

R

= 10 kΩ 50 100 V/mV

L

R

= 100 kΩ 250 1000 V/mV

L

T

MIN

to T

= 100 kΩ 180 400 V/mV

MAX, RL

Offset Voltage Drift ∆VOS/∆T2µV/°C

OUTPUT CHARACTERISTICS

Output Voltage High V

Output Voltage Low V

Short Circuit Limit I

Open-Loop Impedance Z

OH

OL

SC

OUT

I

= 20 µA 4.975 4.988 V

SOURCE

to T

T

MIN

I

SOURCE

T

MIN

I

SINK

T

MIN

I

SINK

T

MIN

MAX

= 2.5 mA 4.80 4.85 V

to T

MAX

= 20 µA1525mV

to T

MAX

= 2.5 mA 120 150 mV

to T

MAX

4.97 4.985 V

4.75 4.82 V

20 30 mV

140 200 mV

Sink/Source ±12 mA
T

MIN

to T

MAX

±10 mA

f = 1 MHz, AV = 1 100 Ω

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = 2.7 V to 12 V 70 80 dB

Supply Current/Amplifier I

to T

T

MIN

SY

T

MIN

to T

MAX

MAX

66 dB

500 600 µA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 10 kΩ, AV = 1 2 V/µs
Full-Power Bandwidth BW
Settling Time t

S

P

1% Distortion, VO = 4 V p-p 150 kHz
V

= 0.2 V to 4.5 V, to 0.01% 2.5 µs

OUT

Gain Bandwidth Product GBP 2 MHz
Phase Margin φo No Load 50 Degrees
Channel Separation CS f = 1 kHz, RL = 2 kΩ –123 dB

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 2 µV p-p
Voltage Noise Density e
Current Noise Density i

n

n

f = 1 kHz 16 nV/√Hz
f = 1 kHz 0.8 fA/√Hz

Total Harmonic Distortion THD f = 10 kHz, RL = 0, AV = +1 0.005 %

–2–

REV. A

AD824

ELECTRICAL SPECIFICATIONS

(@ VS = 615.0 V, V

= 0 V, TA = +258C unless otherwise noted)

OUT

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS

Offset Voltage AD824A V

Offset Voltage AD824B V

Input Bias Current I

Input Bias Current I
Input Offset Current I

B

B
OS

OS

OS

T

to T

MIN

T

MIN

to T

MAX

MAX

VCM = 0 V 4 35 pA
T

to T

MIN

MAX

VCM = –10 V 25 pA

T

to T

MIN

MAX

0.5 2.5 mV

0.6 4.0 mV

0.5 1.5 mV

0.6 2.5 mV

500 4000 pA

320 pA

500 pA
Input Voltage Range –15 13 V
Common-Mode Rejection Ratio CMRR V

Input Impedance 10
Large Signal Voltage Gain A

VO

= –15 V to 13 V 70 80 dB

CM

T

MIN

to T

MAX

66 dB

13

i3.3 ΩipF

Vo = –10 V to +10 V;
R

= 2 kΩ 12 50 V/mV

L

R

= 10 kΩ 50 200 V/mV

L

R

= 100 kΩ 300 2000 V/mV

L

T

MIN

to T

= 100 kΩ 200 1000 V/mV

MAX, RL

Offset Voltage Drift ∆VOS/∆T2µV/°C

OUTPUT CHARACTERISTICS

Output Voltage High V

Output Voltage Low V

Short Circuit Limit I
Open-Loop Impedance Z

OH

OL

SC

OUT

I

= 20 µA 14.975 14.988 V

SOURCE

T

to T

MIN

I

SOURCE

T

MIN

I

SINK

T

MIN

I

SINK

T

MIN

Sink/Source, T
f = 1 MHz, A

MAX

= 2.5 mA 14.80 14.85 V

to T

MAX

= 20 µA –14.985 –14.975 V

to T

MAX

= 2.5 mA –14.88 –14.85 V

to T

MAX

to T

MIN

= 1 100 Ω

V

MAX

14.970 14.985 V

14.75 14.82 V

–14.98 –14.97 V

–14.86 –14.8 V

±8 ±20 mA

POWER SUPPLY

Power Supply Rejection Ratio PSRR V

Supply Current/Amplifier I

SY

= 2.7 V to 15 V 70 80 dB

S

T

to T

MIN

V

O

T

MIN

MAX

= 0 V 560 625 µA

to T

MAX

68 dB

675 µA

DYNAMIC PERFORMANCE

Slew Rate SR R
Full-Power Bandwidth BW
Settling Time t

P

S

= 10 kΩ, AV = 1 2 V/µs

L

1% Distortion, VO = 20 V p-p 33 kHz
V

= 0 V to 10 V, to 0.01% 6 µs

OUT

Gain Bandwidth Product GBP 2 MHz
Phase Margin φo 50 Degrees
Channel Separation CS f = 1 kHz, R

=2 kΩ –123 dB

L

NOISE PERFORMANCE

Voltage Noise e
Voltage Noise Density e
Current Noise Density i
Total Harmonic Distortion THD f =10 kHz, V

p-p 0.1 Hz to 10 Hz 2 µV p-p

n
n

n

f = 1 kHz 16 nV/√Hz
f = 1 kHz 1.1 fA/√Hz

= 3 V rms,

R

= 10 kΩ 0.005 %

L

O

REV. A

–3–

AD824–SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

(@ VS = +3.0 V, VCM = 0 V, V

= 0.2 V, TA = +258C unless otherwise noted)

OUT

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS

Offset Voltage AD824A -3 V V

Input Bias Current I

Input Offset Current I

B

OS

OS

T

to T

MIN

T

MIN

T

MIN

to T

to T

MAX

MAX

MAX

0.2 1.0 mV

1.5 mV
212pA
250 4000 pA
210pA
250 pA

Input Voltage Range 0 1 V
Common-Mode Rejection Ratio CMRR V

Input Impedance 10
Large Signal Voltage Gain A

VO

= 0 V to 1 V 58 74 dB

CM

T

MIN

to T

MAX

56 dB

13

i3.3 ΩipF

VO = 0.2 V to 2.0 V
R

= 2 kΩ 10 20 V/mV

L

R

= 10 kΩ 30 65 V/mV

L

R

= 100 kΩ 180 500 V/mV

L

T

MIN

to T

= 100 kΩ 90 250 V/mV

MAX, RL

Offset Voltage Drift ∆VOS/∆T2µV/°C

OUTPUT CHARACTERISTICS

Output Voltage High V

Output Voltage Low V

Short Circuit Limit I
Short Circuit Limit I
Open-Loop Impedance Z

OH

OL

SC
SC

OUT

I
T
I
T
I
T
I
T

= 20 µA 2.975 2.988 V

SOURCE

to T

MIN

SOURCE

MIN

SINK

MIN

SINK

MIN

MAX

= 2.5 mA 2.8 2.85 V

to T

MAX

= 20 µA1525mV

to T

MAX

= 2.5 mA 120 150 mV

to T

MAX

2.97 2.985 V

2.75 2.82 V

20 30 mV

140 200 mV

Sink/Source ±8mA
Sink/Source, T
f = 1 MHz, A

to T

MIN

= 1 100 Ω

V

MAX

±6mA

POWER SUPPLY

Power Supply Rejection Ratio PSRR V

Supply Current/Amplifier I

SY

= 2.7 V to 12 V, 70 dB

S

T

to T

MIN

MAX

VO = 0.2 V, T

MIN

to T

MAX

66 dB

500 600 µA

DYNAMIC PERFORMANCE

Slew Rate SR R
Full-Power Bandwidth BW
Settling Time t

P

S

=10 kΩ, AV = 1 2 V/µs

L

1% Distortion, VO = 2 V p-p 300 kHz
V

= 0.2 V to 2.5 V, to 0.01% 2 µs

OUT

Gain Bandwidth Product GBP 2 MHz
Phase Margin φo 50 Degrees
Channel Separation CS f = 1 kHz, R

= 2 kΩ –123 dB

L

NOISE PERFORMANCE

Voltage Noise e
Voltage Noise Density e
Current Noise Density i

p-p 0.1 Hz to 10 Hz 2 µV p-p

n
n

n

f = 1 kHz 16 nV/√Hz

0.8 fA/√Hz

Total Harmonic Distortion THD f = 10 kHz, RL = 0, AV = +1 0.01 %

–4–

REV. A

AD824

WARNING!

ESD SENSITIVE DEVICE

I6

R1 R2

R9

R7

R17

R14

R12

R13

R15

V

CC

I5

Q18 Q29

Q27Q21

Q20

Q23

Q25Q24

Q31

Q28

Q22

Q19

Q7

Q6

Q5

Q8

Q3

Q2

Q4

I1 I2 I3

I4

+IN

J1

–IN

C1

Q26

V

OUT

J2

V

EE

C3

C2

C4

WAFER TEST LIMITS

(@ VS = +5.0 V, VCM = 0 V, TA = +258C unless otherwise noted)

Parameter Symbol Conditions Limit Units

Offset Voltage V
Input Bias Current I
Input Offset Current I
Input Voltage Range V

OS
B
OS

CM

Common-Mode Rejection Ratio CMRR V

= 0 V to 2 V 66 dB min

CM

1.0 mV max
12 pA max
20 pA
–0.2 to 3.0 V min

Power Supply Rejection Ratio PSRR V = + 2.7 V to +12 V 70 µV/V
Large Signal Voltage Gain A
Output Voltage High V
Output Voltage Low V
Supply Current/Amplifier I

NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly
methods and normal yield loss, yield after packaging is not guaranteed for
standard product dice. Consult factory to negotiate specifications based on dice
lot qualifications through sample lot assembly and testing.

ABSOLUTE MAXIMUM RATINGS

1

VO

OH

OL
SY

R

= 2 kΩ 15 V/mV min

L

I

= 20 µA 4.975 V min

SOURCE

I

= 20 µA 25 mV max

SINK

VO = 0 V, R

= ∞ 600 µA max

L

DICE CHARACTERISTICS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . –V

– 0.2 V to +V

S

S

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±30 V

Output Short Circuit Duration to GND . . . . . . . . . Indefinite

Storage Temperature Range

N, R Package . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Operating Temperature Range

AD824A, B . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

Junction Temperature Range

N, R Package . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C

Package Type θ

2

JA

θ

JC

Units

AD824 Die Size 0.70 X 0.130 inch, 9,100 sq. mils.
Substrate (Die Backside) Is Connected to V+. Transistor
Count, 143.

14-Pin Plastic DIP (N) 76 33 °C/W
14-Pin SOIC (R) 120 36 °C/W
16-Pin SOIC (R) 92 27 °C/W

NOTES

1

Absolute maximum ratings apply to both DICE and packaged parts unless
otherwise noted.

2

θJA is specified for the worst case conditions, i.e., θ

for P-DIP packages; θJA is specified for device soldered in circuit board for SOIC
package.

is specified for device in socket

JA

ORDERING GUIDE

Temperature

Model Range Package Option

AD824AN –40°C to +85°C 14-Pin Plastic DIP
AD824BN –40°C to +85°C 14-Pin Plastic DIP
AD824AR –40°C to +85°C 14-Pin SOIC
AD824AR-3V –40°C to +85°C 14-Pin SOIC
AD824AN-3V –40°C to +85°C 14-Pin Plastic DIP
AD824AR-14 –40°C to +85°C 14-Pin SOIC
AD824AR-14-3V –40°C to +85°C 14-Pin SOIC
AD824AR-16 –40°C to +85°C 16-Pin SOIC
AD824AChips +25°C DICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD824 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

REV. A –5–

Figure 1. Simplified Schematic of 1/4 AD824