Datasheet AD8202 Datasheet (ANALOG DEVICES)

Single-Supply Difference Amplifier

AD8202

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

Trademarks and registered trademarks are the property of their respective owners.

A1

+IN

–IN

200kΩ200kΩ

100kΩ

A2

+IN

–IN

G = ×10

G = ×2

AD8202

10kΩ

10kΩ

+IN

–IN

GND

OUT

NC A1

A2

+V

S

NC = NO CONNECT

2

5

647

8

1

3

04981-001

GND

NC

–IN

+IN

A1

+V

S

A2

OUT

AD8202

5V

OUTPUT

INDUCTIVE
LOAD

POWER
DEVICE

4-TERM

SHUNT

CLAMP

DIODE

BATTERY

14V

COMMON

NC = NO CONNECT

04981-002

GND

NC

–IN

+IN

A1

+V

S

A2

OUT

AD8202

5V

OUTPUT

INDUCTIVE
LOAD

POWER
DEVICE

4-TERM

SHUNT

CLAMP

DIODE

BATTERY

14V

COMMON

NC = NO CONNECT

04981-003

Data Sheet

FEATURES

High common-mode voltage range

−8 V to +28 V at a 5 V supply voltage
Operating temperature range: −40°C to +125°C
Supply voltage range: 3.5 V to 12 V
Low-pass filter (1-pole or 2-pole)
Excellent ac and dc performance

±1 mV voltage offset
±1 ppm/°C typical gain drift
80 dB CMRR min dc to 10 kHz

Qualified for automotive applications

High Common-Mode Voltage,

FUNCTIONAL BLOCK DIAGRAMS

APPLICATIONS

Transmission control
Diesel injection control
Engine management
Adaptive suspension control
Vehicle dynamics control

GENERAL DESCRIPTION

The AD8202 is a single-supply difference amplifier for amplifying
and low-pass filtering small differential voltages in the presence of a
large common-mode voltage (CMV). The input CMV range
extends from −8 V to +28 V at a typical supply voltage of 5 V.

The AD8202 is available in die and packaged form. The MSOP
and SOIC packages are specified over a wide temperature range,
from −40°C to +125°C, making the AD8202 well-suited for use
in many automotive platforms.

Automotive platforms demand precision components for
better system control. The AD8202 provides excellent ac and
dc performance keeping errors to a minimum in the user’s
system. Typical offset and gain drift in the SOIC package are

0.3 µV/°C and 1 ppm/°C, respectively. Typical offset and gain
drift in the MSOP package are 2 µV/°C and 1 ppm/°C, respec­tively. The device also delivers a minimum CMRR of 80 dB
from dc to 10 kHz.

Figure 1. SOIC (R) Package Die Form

Figure 2. High Line Current Sensor

The AD8202 features an externally accessible 100 kΩ resistor
at the output of the Preamp A1 that can be used for low-pass
filter applications and for establishing gains other than 20.

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specificati ons subject to change without no tice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2004-2

Figure 3. Low Line Current Sensor

www.analog.com

012 Analog Devices, Inc. All rights reserved.

AD8202 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Theory of Operation ...................................................................... 12

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams ............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Single Supply ................................................................................. 3

Absolute Maximum Ratings ............................................................ 4

ESD Caution .................................................................................. 4

Pin Configuration and Function Descriptions ............................. 5

Typical Performance Characteristics ............................................. 6

REVISION HISTORY

4/12—Rev. E to Rev. F

Changes to Table 3 and Figure 5 ..................................................... 5

10/11—Rev. D to Rev. E

Change to Features Section ............................................................. 1

Changes to Ordering Guide .......................................................... 17

Updated Outline Dimensions ....................................................... 17

Added Automotive Products Section .......................................... 17

11/05—Rev. C to Rev. D

Updated Format .................................................................. Universal

Changes to Typical Performance Characteristics ........................ 6

Added Figure 18 ................................................................................ 8

Added Figure 25 to Figure 27 .......................................................... 9

Added Figure 32 .............................................................................. 10

Added Figure 37 to Figure 39 ........................................................ 11

Changes to Theory of Operation .................................................. 12

Added Figure 41 .............................................................................. 13

2/05—Rev. B to Rev. C

Changes to Table 1 ............................................................................ 3

Changes to Figure 14 ........................................................................ 8

Changes to Figure 22 ........................................................................ 9

Applications ..................................................................................... 14

Current Sensing .......................................................................... 14

Gain Adjustment ........................................................................ 14

Gain Trim .................................................................................... 15

Low-Pass Filtering ...................................................................... 15

High Line Current Sensing with LPF and Gain Adjustment 16

Driving Charge Redistribution ADCs ..................................... 16

Outline Dimensions ....................................................................... 17

Ordering Guide .......................................................................... 17

Automotive Products ................................................................. 17

1/05—Rev. A to Rev. B

Changes to the General Description ............................................... 1

Changes to Specifications ................................................................. 3

Added Figure 14 to Figure 33 .......................................................... 8

Changes to Figure 38 ...................................................................... 14

Changes to Figure 40 and Figure 41............................................. 15

Changes to Ordering Guide .......................................................... 16

11/04—Rev. 0 to Rev. A

Changes to the Features .................................................................... 1

Changes to the General Description ............................................... 1

Changes to Specifications (Table 1) ................................................ 3

Changes to Absolute Maximum Ratings (Table 2) ....................... 4

Changes to Pin Function Descriptions (Table 3) .......................... 5

Changes to Figure 5 ........................................................................... 5

Changes to Figure 9 and Figure 10 .................................................. 6

Updated Outline Dimensions ....................................................... 12

Changes to the Ordering Guide ................................................... 12

7/04—Revision 0: Initial Version

Rev. F | Page 2 of 20

Data Sheet AD8202

Initial

20

20

20 V/V

OUT

CMV

Continuous

−8 +28

−8 +28

−8 +28

V

Gain

2 2 2 V/V

OUT

OUT

OUT

For Specified Performance

−40 +125

−40 +125

−40 +150

°C

SPECIFICATIONS

SINGLE SUPPLY

TA = operating temperature range, VS = 5 V, unless otherwise noted.

Table 1.

AD8202 SOIC AD8202 MSOP AD8202 Die

Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Unit

SYSTEM GAIN

Error 0.02 ≤ V

≤ 4.8 V dc @ 25°C −0.3 +0.3 −0.3 +0.3 %

vs. Temperature 1 20 1 25 1 30 ppm/°C

VOLTAGE OFFSET

Input Offset (RTI) VCM = 0.15 V; 25°C −1 +1 −2 +2 −1 +1 mV
vs. Temperature −40°C to +125°C −10 +0.3 +10 −20 +2 +20 −10 +0.3 +10 µV/°C

−40°C to +150°C −15 +5 +15 µV/°C
INPUT

Input Impedance

Differential 260 325 390 260 325 390 260 325 390 kΩ
Common Mode 135 170 205 135 170 205 135 170 205 kΩ

CMRR1 VCM = −8 V to +28 V
f = dc 82 82 82 dB
f = 1 kHz 82 82 82 dB
f = 10 kHz2 80 80 80 dB
PREAMPLIFIER

Gain 10 10 10 V/V

Gain Error −0.3 +0.3 −0.3 +0.3 −0.3 +0.3 %

Output Voltage Range 0.02 4.8 0.02 4.8 0.02 4.8 V

Output Resistance 97 100 103 97 100 103 97 100 103 kΩ
OUTPUT BUFFER

Gain Error 0.02 ≤ V

≤ 4.8 V dc −0.3 +0.3 −0.3 +0.3 −0.3 +0.3 %
Output Voltage Range 0.02 4.8 0.02 4.8 0.02 4.8 V
Input Bias Current 40 40 40 nA
Output Resistance 2 2 2 Ω

DYNAMIC RESPONSE

System Bandwidth VIN = 0.1 V p-p; V
Slew Rate VIN = 0.2 V dc; V

= 2.0 V p-p 30 50 30 50 30 50 kHz

= 4 V step 0.28 0.28 0.28 V/µs

NOISE

0.1 Hz to 10 Hz 10 10 10 µV p-p
Spectral Density, 1 kHz (RTI) 275 275 275 nV/√Hz

POWER SUPPLY

Operating Range 3.5 12 3.5 12 3.5 12 V
Quiescent Current vs.

VO = 0.1 V dc 0.25 1.0 0.25 1.0 0.25 1.0 mA

Temperature

PSRR VS = 3.5 V to 12 V 75 83 75 83 75 83 dB

TEMPERATURE RANGE

1

Source imbalance <2 Ω.

2

The AD8202 preamplifier exceeds 80 dB CMRR at 10 kHz. However, because the signal is available only by way of a 100 kΩ resistor, even the small amount of pin-to-

pin capacitance between Pin 1, Pin 8 and Pin 3, Pin 4 might couple an input common-mode signal larger than the greatly attenuated preamplifier output. The effect of
pin-to-pin coupling can be neglected in all applications by using filter capacitors at Node 3.

Rev. F | Page 3 of 20

AD8202 Data Sheet

Transient Input Voltage (400 ms)

44 V

SOIC

−40°C to +125°C

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage 12.5 V

Continuous Input Voltage (Common Mode) 35 V
Reversed Supply Voltage Protection 0.3 V
Operating Temperature Range

Die −40°C to +150°C

MSOP −40°C to +125°C
Storage Temperature −65°C to +150°C
Output Short-Circuit Duration Indefinite
Lead Temperature Range (Soldering, 10 sec) 300°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

Rev. F | Page 4 of 20

Data Sheet AD8202

–IN

1

GND

2

A1

3

A2

4

+IN

8

NC

7

+V

S

6

OUT

5

NC = NO CONNECT

AD8202

TOP VIEW

(Not to Scale)

04981-004

8

+IN

+205

+409

(CIRCUIT S IDE)

1.165

1.180

1

2

3

4

5

6

7

8

04981-100

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Table 3. Pin Function Descriptions

Pin No. Mnemonic X Y

1 −IN −205 +409
2 GND −413 +285
3 A1 −413 −229
4 A2 −309 −410
5 OUT +272 −410
6 +VS +417 −121
7 NC N/A1 N/A1

1

N/A = not applicable.

Figure 4. Pin Configuration

Figure 5. Metallization Photograph

Rev. F | Page 5 of 20

AD8202 Data Sheet

FREQUENCY (Hz)

PSRR (dB)

90

70

80

50

60

40

10

20

30

0

10 100 1k

10k 100k

04981-006

FREQUENCY (Hz)

OUTPUT (dB)

30

25

20

15

5

10

0

100 1k 10k 100k 1M

04981-007

FREQUENCY (Hz)

CMRR (dB)

100

95

90

85

75

80

70

10 100 1k 10k 100k

04981-008

POWER SUPPLY (V)

COMMON-MODE VOLTAGE (V)

0

–5

–10

–15

–20

–25

–30

–35

3 4 5 6 7 8 9 10 11 12 13

04981-009

–55°C

–40°C

+25°C

+125°C

+150

°C

POWER SUPPLY (V)

COMMON-MODE VOLTAGE (V)

40

35

25

30

20

5

10

15

0

3 654 87 109 11 1312

04981-010

–40°C

–55°C

+25°C

+125°C

+150°C

LOAD RESISTANCE (Ω)

OUTPUT SWING (V)

5.0

4.0

4.5

3.5

3.0

2.5

0.5

1.0

1.5

2.0

0

10 100 1k 10k

04981-011

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, VS = 5 V, VCM = 0 V, RL = 10 kΩ, unless otherwise noted.

Figure 6. Power Supply Rejection Ratio vs.

Frequency Valid for CM Range −8 V to +28 V

Figure 7. Bandwidth

Figure 9. Negative Common-Mode Voltage vs. Voltage Supply

Figure 10. Positive Common-Mode Voltage vs. Voltage Supply

Figure 8. Common-Mode Rejection Ratio vs. Frequency

Valid for Common-Mode Range −8 V to +28 V

Figure 11. Output Swing vs. Load Resistance

Rev. F | Page 6 of 20

Data Sheet AD8202

SUPPLY VOLTAGE (V)

OUTPUT MINUS SUPPLY (mV)

0

–10

–20

–30

–40

–50

–60

–70

3 654 87 109 11 12 13

04981-012

10k LOAD

NO LOAD

2

1

CH1 500mVΩ 50mVΩ M 20µs 2.5MS/s 400NS/PT

A CH1 1.73V

CH2

04981-013

OUTPUT

INPUT

COMMON-MODE VOLTAGE (V)

V

OS

(µV)

1000

800

0

–200

200

600

400

–400

–600

–800

–1000

–10 –5 1050 20 2515 30

04981-044

–40°C

+85°C

+125°C

+25°C

HITS

18

12

14

16

10

8

6

4

2

0

CMRR (µV/V)

–70

–65

–60

–45

–55

–50

–40

–35

–30

–25

–20

–10

–15

–5

0

5

10152030253540455055656070

04981-043

TEMPERATURE = 25°C

HITS

8

7

6

5

4

3

2

1

0

V

OS

DRIFT (µV/°C)

–28

–26

–24

–22

–20

–18

–16

–14

–12

–10

–6–8–4

–2

0

2

468

101214181620222428

26

04981-034

V

SUPPLY

= 5V

TEMPERATURE RANGE =
–40°C TO +25°C

HITS

12

10

8

6

4

2

0

V

OS

DRIFT (µV/°C)

–28

–26

–24

–22

–20

–18

–16

–14

–12

–10

–6–8–4

–2

02468

101214181620222428

26

04981-036

V

SUPPLY

= 5V

TEMPERATURE RANGE =

25°C TO 125°

C

Figure 12. Output Minus Supply vs. Supply Voltage

Figure 13. Pulse Response

Figure 15. CMRR Distribution, −8 V to +28 V Common Mode

Figure 16. Offset Drift Distribution, MSOP,

Temperature Range = −40°C to +25°C

Figure 14. V

vs. Common-Mode Voltage

OS

Figure 17. Offset Drift Distribution, MSOP,

Temperature Range = 25°C to 125°C

Rev. F | Page 7 of 20

AD8202 Data Sheet

HITS

10

9
8

7

5
4

3

2

1

6

0

V

OS

DRIFT (µV/°C)

–16.0

–14.0

–12.0

–10.0

–8.0

–6.0

–4.0

–2.0

0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

16.0

04981-052

V

SUPPLY

= 5V

TEMPERATURE RANGE =

25°C TO 85°C

HITS

14

12

8

10

6

4

2

0

V

OS

(µV)

–2200

–2000

–1800

–1400

–1600

–1200

–1000

–800

–600

–400

–200

200

400

600

1000

800

1200

1400

1600

1800

2000

2200

0

04981-037

TEMPERATURE = 25°C

HITS

10

8

7

9

4

6

3

5

1

2

0

V

OS

(µV)

–2200

–2000

–1800

–1400

–1600

–1200

–1000

–800

–600

–400

–200

200

400

600

1000

800

1200

1400

1600

1800

2000

2200

0

04981-038

TEMPERATURE = 125°C

HITS

9

8

7

4

6

3

5

1

2

0

V

OS

(µV)

–2200

–2000

–1800

–1400

–1600

–1200

–1000

–800

–600

–400

–200

200

400

600

1000

800

1200

1400

1600

1800

2000

2200

0

04981-039

TEMPERATURE = –40°C

HITS

14

12

10

8

6

4

2

0

ERROR (%)

–0.15

–0.13

–0.11

–0.07

–0.09

–0.05

–0.03

–0.01

0.01

0.05

0.03

0.07

0.09

0.11

0.13

0.17

0.15

0.19

0.21

0.23

0.27

0.25

0.29

04981-040

TEMPERATURE = 25°C

HITS

14

12

10

8

6

4

2

0

ERROR (%)

–0.15

–0.13

–0.11

–0.07

–0.09

–0.05

–0.03

–0.01

0.01

0.05

0.03

0.07

0.09

0.11

0.13

0.17

0.15

0.19

0.21

0.23

0.27

0.25

0.29

04981-041

TEMPERATURE = 125°C

Figure 18. Offset Drift Distribution, MSOP,

Temperature Range = 25°C to 85°C

Figure 19. VOS Distribution, MSOP, Temperature = 25°C

Figure 21. VOS Distribution, MSOP, Temperature = −40°C

Figure 22. MSOP Gain Accuracy, Temperature = 25°C

Figure 20. VOS Distribution, MSOP, Temperature = 125°C

Figure 23. MSOP Gain Accuracy, Temperature = 125°C

Rev. F | Page 8 of 20

Data Sheet AD8202

HITS

14

12

10

8

6

4

2

0

ERROR (%)

–

0.15

–0.13

–0.11

–0.07

–0.09

–0.05

–0.03

–0.01

0.01

0.05

0.03

0.07

0.09

0.11

0.13

0.17

0.15

0.19

0.21

0.23

0.27

0.25

0.29

04981-042

TEMPERATURE = –40°C

HITS

9

8

7

6

5

4

3

2

1

0

GAIN DRIFT (PPM/°C)

–18

–16

–14

–12

–10

–8–6–4

–2

02468

1210141618

04981-048

V

SUPPLY

= 5V

TEMPERATURE RANGE =
+25°C TO –40°C

HITS

9

8

7

6

5

4

3

2

1

0

GAIN DRIFT (PPM/°C)

–18

–16

–14

–12

–10

–8–6–4

–2

02468

1210141618

04981-049

V

SUPPLY

= 5V

TEMPERATURE RANGE =

25°C TO 85°C

HITS

10

8

9

7

6

5

4

3
2

1
0

GAIN DRIFT (PPM/°C)

–18

–16

–14

–12

–10

–8–6–4

–2

02468

1210141618

04981-050

V

SUPPLY

= 5V

TEMPERATURE RANGE =

25°C TO 125°C

HITS

40

35

25

30

20

15

10

5

0

V

OS

(µV)

–1500

–1400

–1300

–1100

–1200

–1000

–900

–800

–700

–600

200

–500

–400

–300

–200

–

100

1000300

400

500

600

900

1200

1100

1400

1300

1000

1500

800

700

04981-028

TEMPERATURE = 25°C

HITS

30

25

20

15

10

5

0

V

OS

(µV)

–1500

–1400

–1300

–1100

–1200

–1000

–900

–800

–700

–600

200

–500

–400

–

300

–200

–100

1000300

400

500

600

900

1200

1100

1400

1300

1000

1500

800

700

04981-030

TEMPERATURE = 125°C

Figure 24. MSOP Gain Accuracy, Temperature = −40°C

Figure 25. Gain Drift Distribution, MSOP,

Temperature Range = +25°C to −40°C

Figure 27. Gain Drift Distribution, MSOP,

Temperature Range = 25°C to 125°C

Figure 28. VOS Distribution, SOIC, Temperature = 25°C

Figure 26. Gain Drift Distribution, MSOP,

Temperature Range = 25°C to 85°C

Figure 29. VOS Distribution, SOIC, Temperature = 125°C

Rev. F | Page 9 of 20

AD8202 Data Sheet

HITS

35

25

30

20

15

10

5

0

V

OS

(µV)

–1500

–1400

–1300

–1100

–

1200

–1000

–900

–800

–700

–600

200

–500

–400

–300

–200

–100

1000300

400

500

600

900

1200

1100

1400

1300

1000

1500

800

700

04981-029

TEMPERATURE = –40

°C

HITS

25

20

15

10

5

0

V

OS

DRIFT (µV/°C)

–10.0

–9.0

–8.0

–7.0

–6.0

–5.0

–4.0

–3.0

–2.0

2.0

–1.0

1.003.0

4.0

5.0

6.0

8.0

9.0

10.0

7.0

04981-025

V

SUPPLY

= 5V

TEMPERATURE RANGE =

–40°C TO +25°C

HITS

25

20

15

10

5

0

V

OS

DRIFT (µV/°C)

–15.0

–14.0

–13.0

–12.0

–11.0

–10.0

–9.0

–8.0

–7.0

–6.0

–5.0

–4.0

–3.0

–2.0

–1.0

0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

9.0

10.0

11.0

12.0

13.0

14.0

15.0

04981-051

V

SUPPLY

= 5V

TEMPERATURE RANGE =

25°C TO 85°C

HITS

30

25

20

15

10

5

0

V

OS

DRIFT (µV/°C)

–10.0

–9.0

–8.0

–7.0

–6.0

–5.0

–4.0

–3.0

–2.0

2.0

–1.0

1.003.0

4.0

5.0

6.0

8.0

9.0

10.0

7.0

04981-027

V

SUPPLY

= 5V

TEMPERATURE RANGE =

25°C TO 125°

C

HITS

40

35

30

25

20

15

10

5

0

ERROR (%)

0

0.01

0.02

0.04

0.03

0.05

0.06

0.07

0.08

0.09

0.17

0.10

0.11

0.12

0.13

0.14

0.16

0.15

0.18

0.19

0.20

0.21

0.24

0.27

0.26

0.29

0.28

0.25

0.30

0.23

0.22

04981-031

TEMPERATURE = 25°C

HITS

45

40

35

30

25

20

15

10

5

0

ERROR (%)

0

0.01

0.02

0.04

0.03

0.05

0.06

0.07

0.08

0.09

0.17

0.10

0.11

0.12

0.13

0.14

0.16

0.15

0.18

0.19

0.20

0.21

0.24

0.27

0.26

0.29

0.28

0.25

0.30

0.23

0.22

04981-032

TEMPERATURE = 125°C

Figure 30. VOS Distribution, SOIC, Temperature = −40°C

Figure 31. Offset Drift Distribution, SOIC,

Temperature Range = −40°C to +25°C

Figure 33. Offset Drift Distribution, SOIC,

Temperature Range = 25°C to 125°C

Figure 34. Gain Accuracy, SOIC, Temperature = 25°C

Figure 32. Offset Drift Distribution, SOIC,

Temperature Range = 25°C to 85°C

Rev. F | Page 10 of 20

Figure 35. Gain Accuracy, SOIC, Temperature = 125°C

Data Sheet AD8202

HITS

50

45

40

35
30

25

20

15

10

5
0

ERROR (%)

0

0.01

0.02

0.04

0.03

0.05

0.06

0.07

0.08

0.09

0.17

0.10

0.11

0.12

0.13

0.14

0.16

0.15

0.18

0.19

0.20

0.21

0.24

0.27

0.26

0.29

0.28

0.25

0.30

0.23

0.22

04981-033

TEMPERATURE = –40°C

HITS

40

35

30

20

25

15

10

5

0

GAIN DRIFT (PPM/°C)

–25

–23

–21

–19

–17

–15

–13

–11

–9–7–3–5–1

13579

11151317192125

23

04981-045

V

SUPPLY

= 5V

TEMPERATURE RANGE =
+25°C TO –40°

C

HITS

25

20

15

10

5

0

GAIN DRIFT (PPM/°C)

–25

–23

–21

–19

–17

–15

–13

–11

–9–7–3–5–1

13579

11151317192125

23

04981-046

V

SUPPLY

= 5V

TEMPERATURE RANGE =

25°C TO 85°C

HITS

45

40

35

30

25

20

15

10

5

0

GAIN DRIFT (PPM/°C)

–25

–23

–21

–19

–17

–15

–13

–11

–9–7–3–5–1

13579

11151317192125

23

04981-047

V

SUPPLY

= 5V

TEMPERATURE RANGE =

25°C TO 125°C

Figure 36. Gain Accuracy, SOIC, Temperature = −40°C

Figure 38. Gain Drift Distribution, SOIC,

Temperature Range = 25°C to 85°C

Figure 37. Gain Drift Distribution, SOIC,

Temperature Range = +25°C to −40°C

Figure 39. Gain Drift Distribution, SOIC,

Temperature Range = 25°C to 125°C

Rev. F | Page 11 of 20

AD8202 Data Sheet

A1

A3

R

CM

R

CM

(TRIMMED)

100kΩ

R

A

–IN

R

G

R

C

R

B

R

A

R

C

R

B

R

G

+IN

COM

A2

R

F

R

F

AD8202

5

4

3

1

2

8

04981-014

THEORY OF OPERATION

The AD8202 consists of a preamp and buffer arranged as shown
in Figure 40. Like-named resistors have equal values.

The preamp uses a dynamic bridge (subtractor) circuit.
Identical networks (within the shaded areas), consisting of R
R

, RC, and RG, attenuate input signals applied to Pin 1 and

B

,

A

Pin 8. When equal amplitude signals are asserted at Input 1 and
Input 8, and the output of A1 is equal to the common potential
(that is, 0), the two attenuators form a balanced-bridge network.
When the bridge is balanced, the differential input voltage at
A1, and thus its output, is 0.

Any common-mode voltage applied to both inputs keeps the
bridge balanced and the A1 output at 0. Because the resistor
networks are carefully matched, the common-mode signal
rejection approaches this ideal state.

However, if the signals applied to the inputs differ, the result is a
difference at the input to A1. A1 responds by adjusting its output
to drive R

, by way of RG, to adjust the voltage at its inverting

B

input until it matches the voltage at its noninverting input.

By attenuating voltages at Pin 1 and Pin 8, the amplifier inputs
are held within the power supply range, even if Pin 1 and Pin 8
input levels exceed the supply or fall below common (ground).
The input network also attenuates normal (differential) mode
voltages. R

and RG form an attenuator that scales A1 feedback,

C

forcing large output signals to balance relatively small differen­tial inputs. The resistor ratios establish the preamp gain at 10.

Because the differential input signal is attenuated and then
amplified to yield an overall gain of 10, Amplifier A1 operates
at a higher noise gain, multiplying deficiencies such as input
offset voltage and noise with respect to Pin 1 and Pin 8.

To minimize these errors while extending the common-mode
range, a dedicated feedback loop is used to reduce the range of
common-mode voltage applied to A1 for a given overall range at
the inputs. By offsetting the voltage range applied to the com­pensator, the input common-mode range is also offset to include
voltages more negative than the power supply.

Amplifier A3 detects the common-mode signal applied to A1
and adjusts the voltage on the matched R

resistors to reduce

CM

the common-mode voltage range at the A1 inputs. By adjusting
the common voltage of these resistors, the common-mode input
range is extended while, at the same time, the normal mode
signal attenuation is reduced, leading to better performance
referred to input.

The output of the dynamic bridge taken from A1 is connected
to Pin 3 by way of a 100 kΩ series resistor, provided for low­pass filtering and gain adjustment. The resistors in the input
networks of the preamp and the buffer feedback resistors are
ratio-trimmed for high accuracy.

The output of the preamp drives a gain-of-2 buffer amplifier,
A2, implemented with carefully matched feedback resistors (R

).

F

The 2-stage system architecture of the AD8202 enables the user
to incorporate a low-pass filter prior to the output buffer. By
separating the gain into two stages, a full-scale, rail-to-rail
signal from the preamp can be filtered at Pin 3, and a half-scale
signal, resulting from filtering, can be restored to full scale by
the output buffer amp. The source resistance seen by the
inverting input of A2 is approximately 100 kΩ to minimize the
effects of the input bias current of A2. However, this current is
quite small, and errors resulting from applications that mismatch
the resistance are correspondingly small.

The A2 input bias current has a typical value of 40 nA, however,
this can increase under certain conditions. For example, if the
input signal to the A2 amplifier is V
go to V

due to the gain of 2. However, the output saturates

CC

/2, the output attempts to

CC

because the maximum specified voltage for correct operation is
200 mV below V

. Under these conditions, the total input bias

CC

current increases (see Figure 41 for more information).

Figure 40. Simplified Schematic

Rev. F | Page 12 of 20

Data Sheet AD8202

–140

0

0

2.5

04981-053

DIFFERENTIAL-MODE VOLTAGE (V)

A2 INPUT BIAS CURRENT (nA)

–120

–100

–80

–60

–40

–20

0.5 1.0 1.5 2.0

V

SUPPLY

= 5V

TEMPERATURE RANGE =
+125

°C TO –40°C

• The total error at the input of A2, 24 mV, multiplied by the

buffer gain generates a resulting error of 48 mV at the
output of the buffer. This is AD8202 system output low
saturation potential.

• The high output voltage range of the AD8202 is specified

as 4.8 V. Therefore, assuming a typical A2 input bias
current, the output voltage range for the AD8202 is 48 mV
to 4.8 V.

For an example of the effect of changes in A2 input bias current
vs. applied input potentials, see Figure 41. The change in bias
current causes a change in error voltage at the input of the

Figure 41. A2 Input Bias Current vs. Input Voltage and Temperature. The

Shaded Area is the Bias Current from +125°C to −40°C.

An increase in the A2 bias current, in addition to the output
saturation voltage of A1, directly affects the output voltage of
the AD8202 system (Pin 3 and Pin 4 shorted). An example of
how to calculate the correct output voltage swing of the

AD8202, by taking all variables into account, follows:

buffer amplifier. This results in a change in overall error
potential at the output of the buffer amplifier.

• Amplifier A1 output saturation potential can drop as low

• A2 typical input bias current of 40 nA multiplied by the

• Total voltage at the A2 input equals the output saturation

as 20 mV at its output.

100 kΩ preamplifier output resistor produces

40 nA × 100 kΩ = 4 mV at the A2 input

voltage of A1 combined with the voltage error generated
by the input bias current

20 mV + 4 mV = 24 mV

Rev. F | Page 13 of 20

AD8202 Data Sheet

5V

OUTPUT

10Ω

1%

10Ω
1%

NC = NO CONNECT

+

GND

NC

–IN

+IN

A1

+V

S

A2

OUT

AD8202

04981-015

10kΩ10kΩ

100kΩ

A2A1GND–IN

OUT+V

S

NC+IN

AD8202

OUT

+V

S

R

EXT

V

CM

V

DIFF

2

GAIN =

20R

EXT

R

EXT

+ 100kΩ

R

EXT

= 100kΩ

GAIN

20 – GAIN

V

DIFF

2

NC = NO CONNECT

04981-016

10kΩ10kΩ

100kΩ

A2A1GND–IN

OUT+V

S

NC+IN

AD8202

OUT

+V

S

R

EXT

V

CM

V

DIFF

2

GAIN =

20R

EXT

R

EXT

– 100kΩ

R

EXT

= 100kΩ

GAIN

GAIN – 20

V

DIFF

2

NC = NO CONNECT

04981-017

APPLICATIONS

The AD8202 difference amplifier is intended for applications that
require extracting a small differential signal in the presence of
large common-mode voltages. The differential input resistance
is nominally 325 kΩ, and the device can tolerate common-mode
voltages higher than the supply voltage and lower than ground.

The open collector output stage sources current to within
20 mV of ground and to within 200 mV of V

CURRENT SENSING

High Line, High Current Sensing

Basic automotive applications using the large common-mode
range are shown in Figure 2 and Figure 3. The capability of the
device to operate as an amplifier in primary battery supply
circuits is shown in Figure 2; Figure 3 illustrates the ability
of the device to withstand voltages below system ground.

Low Current Sensing

The AD8202 is also used in low current sensing applications, such
as the 4 to 20 mA current loop shown in Figure 42. In such
applications, the relatively large shunt resistor can degrade the
common-mode rejection. Adding a resistor of equal value on the
low impedance side of the input corrects for this error.

.

S

Figure 43. Adjusting for Gains Less than 20

The overall bandwidth is unaffected by changes in gain by using
this method, although there may be a small offset voltage due
to the imbalance in source resistances at the input to the buffer.
This can often be ignored, but if desired, it can be nulled by
inserting a resistor equal to 100 kΩ minus the parallel sum of R
and 100 kΩ, in series with Pin 4. For example, with R

EXT

EXT

= 100 kΩ
(yielding a composite gain of ×10), the optional offset nulling
resistor is 50 kΩ.

Gains Greater Than 20

Connecting a resistor from the output of the buffer amplifier
to its noninverting input, as shown in Figure 44, increases the
gain. The gain is multiplied by the factor R
for example, the gain is doubled for R

/(R

EXT

= 200 kΩ. Overall

EXT

− 100 kΩ);

EXT

gains as high as 50 are achievable in this way. The accuracy of
the gain becomes critically dependent on the resistor value at
high gains. Also, the effective input offset voltage at Pin 1 and
Pin 8 (about six times the actual offset of A1) limits the part’s
use in high gain, dc-coupled applications.

Figure 42. 4 to 20 mA Current Loop Receiver

GAIN ADJUSTMENT

The default gain of the preamplifier and buffer are ×10 and ×2,
respectively, resulting in a composite gain of ×20. With the
addition of external resistor(s) or trimmer(s), the gain can be
lowered, raised, or finely calibrated.

Gains Less than 20

Because the preamplifier has an output resistance of 100 kΩ,
an external resistor connected from Pin 3 and Pin 4 to GND
decreases the gain by a factor R
in Figure 43.

EXT

/(100 kΩ + R

EXT

) as shown

Figure 44. Adjusting for Gains > 20

Rev. F | Page 14 of 20

Data Sheet AD8202

5V

OUT

R

EXT

GAIN TRIM
20kΩ MIN

V

CM

V

DIFF

2

V

DIFF

2

NC = NO CONNECT

GND

NC

–IN

+IN

A1

+V

S

A2

OUT

AD8202

04981-018

5V

V

CM

V

DIFF

2

V

DIFF

2

NC = NO CONNECT

C

GND

NC

–IN

+IN

A1

+V

S

A2

OUT

AD8202

04981-019

OUTPUT

fC=

1

2πC10

5

C IN FARADS

5V

V

CM

V

DIFF

2

V

DIFF

2

NC = NO CONNECT

C

GND

NC

–IN

+IN

A1

+V

S

A2

OUT

AD8202

04981-020

OUT

C

255kΩ

f

C

(Hz) = 1/C(µF)

GAIN TRIM

Figure 45 shows a method for incremental gain trimming by
using a trim potentiometer and external resistor, R

The following approximation is useful for small gain ranges:

ΔG ≈ (10 MΩ/R

Thus, the adjustment range is ±2% for R
R

= 1 MΩ, and so on.

EXT

EXT

)%

= 5 MΩ; ±10% for

EXT

EXT

.

Low-pass filters can be implemented in several ways by using the

AD8202. In the simplest case, a single-pole filter (20 dB/decade)

is formed when the output of A1 is connected to the input of
A2 via the internal 100 kΩ resistor by tying Pin 3 and Pin 4
and adding a capacitor from this node to ground, as shown in
Figure 46. If a resistor is added across the capacitor to lower the
gain, the corner frequency increases; it should be calculated using
the parallel sum of the resistor and 100 kΩ.

Figure 46. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor

Figure 45. Incremental Gain Trim

If the gain is raised using a resistor, as shown in Figure 44, the

Internal Signal Overload Considerations

When configuring gain for values other than 20, the maxi­mum input voltage with respect to the supply voltage and
ground must be considered because either the preamplifier

corner frequency is lowered by the same factor as the gain is
raised. Thus, using a resistor of 200 kΩ (for which the gain
would be doubled), the corner frequency is now 0.796 Hz/µF
(0.039 µF for a 20 Hz corner frequency).

or the output buffer reaches its full-scale output (approximately
V

− 0.2 V) with large differential input voltages. The input of

S

the AD8202 is limited to (V

− 0.2)/10 for overall gains ≤ 10

S

because the preamplifier, with its fixed gain of ×10, reaches its full­scale output before the output buffer. For gains greater than 10, the
swing at the buffer output reaches its full scale first and limits the

AD8202 input to (V

− 0.2)/G, where G is the overall gain.

S

LOW-PASS FILTERING

In many transducer applications, it is necessary to filter
the signal to remove spurious high frequency components
including noise, or to extract the mean value of a fluctuating
signal with a peak-to-average ratio (PAR) greater than unity.
For example, a full-wave rectified sinusoid has a PAR of 1.57,
a raised cosine has a PAR of 2, and a half-wave sinusoid has a
PAR of 3.14. Signals having large spikes can have PARs of 10
or more.

When implementing a filter, the PAR should be considered
so that the output of the AD8202 preamplifier (A1) does not clip
before A2 because this nonlinearity would be averaged
and appear as an error at the output. To avoid this error,
both amplifiers should clip at the same time. This condition
is achieved when the PAR is no greater than the gain of the
second amplifier (2 for the default configuration). For example,
if a PA R of 5 is e xpected, the gain of A2 should be increased to 5.

Rev. F | Page 15 of 20

A 2-pole filter (with a roll-off of 40 dB/decade) can be
implemented using the connections shown in Figure 47. This is a
Sallen-Key form based on a ×2 amplifier. It is useful to remember
that a 2-pole filter with a corner frequency f
with a corner at f

2

(f

/f1). The attenuation at that frequency is 40 log (f2/f1), which is

2

illustrated in Figure 48. Using the standard resistor value shown
and equal capacitors (see Figure 47), the corner frequency is
conveniently scaled at 1 Hz/µF (0.05 µF for a 20 Hz corner).
A maximally flat response occurs when the resistor is lowered to
196 kΩ and the scaling is then 1.145 Hz/µF. The output offset
is raised by approximately 5 mV (equivalent to 250 µV at the
input pins).

Figure 47. 2-Pole, Low-Pass Filter

and a 1-pole filter

2

have the same attenuation at the frequency

1

AD8202 Data Sheet

40LOG (f

2/f1

)

f

1

ATTENUATION

f

2

f

2

2

/f

1

FREQUENCY

A 1-POLE FILTER, CORNER f1, AND
A 2-POLE FILTER, CORNER f

2

, HAVE

THE SAME ATTENUATION –40LOG (f

2/f1

)

AT FREQUENCY f

2

2

/f

1

20dB/DECADE

40dB/DECADE

04981-021

GND

NC

–IN

+IN

A1

+V

S

A2

OUT

AD8202

5V

INDUCTIVE
LOAD

POWER
DEVICE

4-TERM

SHUNT

CLAMP

DIODE

BATTERY

14V

NC = NO CONNECT COMMON

04981-022

C

OUT
4V/AMP

5% CALIBRATION RANGE
f

C

(Hz) = 0.796Hz/C(µF)

(0.22µF FOR f

C

= 3.6Hz)

V

OS/IB

NULL

191kΩ

20kΩ

GND

NC

–IN

+IN

A1

+V

S

A2

OUT

AD8202

5V

INDUCTIVE
LOAD

POWER
DEVICE

4-TERM

SHUNT

CLAMP

DIODE

BATTERY

14V

NC = NO CONNECT COMMON

04981-023

fC(Hz) = 1/C(µF)
(0.05µF FOR f

C

= 20Hz)

C

OUTPUT

127kΩ

C

432kΩ

50kΩ

+IN

–IN

10kΩ

10kΩ

AD8202

5V

R

LAG

1kΩ

C

LAG

0.01µF

MICROPROCESSOR

A/D

A2

2

4

6

5

04981-024

by a 1-pole low-pass filter, set with a corner frequency of 3.6 Hz,
providing about 30 dB of attenuation at 100 Hz. A higher rate of
attenuation can be obtained using a 2-pole filter with f
as shown in Figure 50. Although this circuit uses two separate
capacitors, the total capacitance is less than half that needed for
the 1-pole filter.

= 20 Hz,

C

Figure 48. Comparative Responses of 1-Pole and 2-Pole Low-Pass Filters

HIGH LINE CURRENT SENSING WITH LPF AND GAIN ADJUSTMENT

Figure 49 is another refinement of Figure 2, including gain
adjustment and low-pass filtering.

Figure 49. High Line Current Sensor Interface;

Gain = ×40, Single-Pole, Low-Pass Filter

A power device that is either on or off controls the current in
the load. The average current is proportional to the duty cycle
of the input pulse and is sensed by a small value resistor. The
average differential voltage across the shunt is typically 100 mV,
although its peak value is higher by an amount that depends
on the inductance of the load and the control frequency. The
common-mode voltage, conversely, extends from roughly 1 V
above ground for the on condition to about 1.5 V above the
battery voltage in the off condition. The conduction of the
clamping diode regulates the common-mode potential applied
to the device. For example, a battery spike of 20 V can result
in an applied common-mode potential of 21.5 V to the input
of the devices.

To produce a full-scale output of 4 V, a gain ×40 is used,
adjustable by ±5% to absorb the tolerance in the shunt.
Sufficient headroom allows 10% overrange (to 4.4 V). The
roughly triangular voltage across the sense resistor is averaged

Rev. F | Page 16 of 20

Figure 50. 2-Pole Low-Pass Filter

DRIVING CHARGE REDISTRIBUTION ADCS

When driving CMOS ADCs, such as those embedded in
popular microcontrollers, the charge injection (∆Q) can cause
a significant deflection in the output voltage of the AD8202.
Though generally of short duration, this deflection can persist
until after the sample period of the ADC expires due to the
relatively high open-loop output impedance (typically 21 kΩ)
of the AD8202. Including an R-C network in the output can
significantly reduce the effect. The capacitor helps to absorb the
transient charge, effectively lowering the high frequency output
impedance of the AD8202. For these applications, the output
signal should be taken from the midpoint of the R
combination, as shown in Figure 51.

Because the perturbations from the analog-to-digital converter
are small, the output impedance of the AD8202 appears to be low.
The transient response, therefore, has a time constant governed
by the product of the two LAG components, C
values shown in Figure 51, this time constant is programmed at
approximately 10 µs. Therefore, if samples are taken at several
tenths of microseconds or more, there is negligible charge
stack-up.

Figure 51. Recommended Circuit for Driving CMOS A/D

LAG

× R

LAG

− C

. For the

LAG

LAG

Data Sheet AD8202

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.

COMPLIANT TO JEDEC STANDARDSMS-012-AA

012407-A

0.25 (0.0098)

0.17 (0.0067)

1.27 (0.0500)

0.40 (0.0157)

0.50 (0.0196)

0.25 (0.0099)

45°

8°
0°

1.75 (0.0688)

1.35 (0.0532)

SEATING

PLANE

0.25 (0.0098)

0.10 (0.0040)

4

1

8 5

5.00(0.1968)

4.80(0.1890)

4.00 (0.1574)

3.80 (0.1497)

1.27 (0.0500)
BSC

6.20 (0.2441)

5.80 (0.2284)

0.51 (0.0201)

0.31 (0.0122)

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

6°
0°

0.80

0.55

0.40

4

8

1

5

0.65 BSC

0.40

0.25

1.10 MAX

3.20

3.00

2.80

COPLANARITY

0.10

0.23

0.09

3.20

3.00

2.80

5.15

4.90

4.65

PIN 1

IDENTIFIER

15° MAX

0.95

0.85

0.75

0.15

0.05

10-07-2009-B

1, 2

AD8202WYRZ-RL

−40oC to 125oC

8-Lead Standard Small Outline Package [SOIC_N]

R-8

OUTLINE DIMENSIONS

Figure 52. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body (R-8)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model

AD8202WYC-P3 −40oC to 125°C Die
AD8202WYC-P7 −40oC to 125°C Die
AD8202WYRMZ −40oC to 125oC 8-Lead Mini Small Outline Package [MSOP] RM-8 JWY
AD8202WYRMZ-RL −40oC to 125oC 8-Lead Mini Small Outline Package [MSOP] RM-8 JWY
AD8202WYRZ −40oC to 125oC 8-Lead Standard Small Outline Package [SOIC_N] R-8

AD8202YRMZ −40oC to 125oC 8-Lead Mini Small Outline Package [MSOP] RM-8 JWY
AD8202YRMZ-R7 −40oC to 125oC 8-Lead Mini Small Outline Package [MSOP] RM-8 JWY
AD8202YRMZ-RL −40oC to 125oC 8-Lead Mini Small Outline Package [MSOP] RM-8 JWY
AD8202YRZ −40oC to 125oC 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8202YRZ-RL −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8202YRZ-R7 −40oC to 125oC 8-Lead Standard Small Outline Package [SOIC_N] R-8

1

Z = RoHS Compliant Part.

2

W = Qualified for Automotive Applications.

Temperature Range Package Description Package Option Branding

AUTOMOTIVE PRODUCTS

The AD8202W models are available with controlled manufacturing to support the quality and reliability requirements of automotive
applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers
should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in
automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to
obtain the specific Automotive Reliability reports for these models.

Figure 53. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

Rev. F | Page 17 of 20

AD8202 Data Sheet

NOTES

Rev. F | Page 18 of 20

Data Sheet AD8202

NOTES

Rev. F | Page 19 of 20

AD8202 Data Sheet

NOTES

© 2004-2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.

D04981-0-4/12(F)

Rev. F | Page 20 of 20