st r e a m
ª
33 17, 3.2 Gb/s
a
FEATURES
Low Cost
33 17, Fully Differential, Nonblocking Array
3.2 Gb/s per Port NRZ Data Rate
Wide Power Supply Range: +3.3 V, –3.3 V
Low Power
425 mA (Outputs Enabled)
35 mA (Outputs Disabled)
LV PECL and LV ECL Compatible
CMOS/TTL-Level Control Inputs: 3 V to 5 V
Low Jitter
No Heat Sinks Required
Drives a Backplane Directly
Programmable Output Current
Optimize Termination Impedance
User-Controlled Voltage at the Load
Minimize Power Dissipation
Individual Output Disable for Busing and Reducing
Power
Double Row Latch
Buffered Inputs
Available in 184-Lead LQFP
CS
RE
WE
UPDATE
RESET
Digital Crosspoint Switch
AD8151*
FUNCTIONAL BLOCK DIAGRAM
INP INN
33
7
D
5
A
OUTPUT
ADDRESS
DECODER
FIRST
RANK
17
7-BIT
LATCH
SECOND
RANK
17
7-BIT
LATCH
DIFFERENTIAL
INPUT
DECODERS
AD8151
33 17
SWITCH
MATRIX
33
17
OUTP
17
OUTN
APPLICATIONS
High-Speed Serial Backplane Routing to OC-48 with FEC
Fiber Optic Network Switching
Fiber Channel
LVDS
PRODUCT DESCRIPTION
AD8151 is a member of the X
stream
line of products and is
a breakthrough in digital switching, offering a large switch array
(33 × 17) on very little power, typically less than 1.5 W. Additionally, it operates at data rates in excess of 3.2 Gb/s per port,
making it suitable for Sonet OC-48 with 8b/10b Forward Error
Correction (FEC). Further, the pricing of the AD8151 makes
it affordable enough to be used for lower data rates as well.
The AD8151’s flexible supply voltages allow the user to operate
with either PECL or ECL data levels and will operate down to
3.3 V for further power reduction. The control interface is CMOS/
TTL compatible (3 V to 5 V).
Its fully differential signal path reduces jitter and crosstalk while
allowing the use of smaller single-ended voltage swings.
The AD8151 is offered in a 184-lead LQFP package that operates
over the extended commercial temperature range of 0° C to 85°C.
* Patent Pending.
X
stream
is a trademark of Analog Devices, Inc.
Figure 1. Eye Pattern, 3.2 Gb/s, PRBS 23
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2001
AD8151–SPECIFICATIONS
(@ 25 C, VCC = 3.3 V to 5 V, VEE = 0 V, RL = 50 (see TPC 22), I
otherwise noted.)
= 16 mA, unless
OUT
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
Max Data Rate/Channel (NRZ) 2.5 3.2 Gb/s
Channel Jitter Data Rate = 3.2 Gb/s 52 ps p-p
RMS Channel Jitter 8p s
Propagation Delay Input to Output 650 ps
Propagation Delay Match ±50 ±100 ps
Output Rise/Fall Time 20% to 80% 100 ps
INPUT CHARACTERISTICS
Input Voltage Swing Single-Ended 200 1000 mV p-p
Input Bias Current 2 µA
Input Capacitance 2p F
Input V
High VCC – 1.2 V
IN
CC
V
Input VIN Low VCC – 2.4 VCC – 1.4 V
OUTPUT CHARACTERISTICS
Output Voltage Swing Differential (See TPC 22) 800 mV p-p
Output Voltage Range V
– 1.8 V
CC
CC
V
Output Current 5 25 mA
Output Capacitance 2p F
Output V
Output V
High VCC – 1.8 V
OUT
Low V
OUT
CC
V
POWER SUPPLY
Operating Range
PECL, V
ECL, V
V
V
EE
DD
SS
CC
VEE = 0 V 3.0 5.25 V
VCC = 0 V –5.25 –3.0 V
35 V
0V
Quiescent Current
V
DD
V
EE
All Outputs Enabled, I
to T
T
MIN
MAX
= 16 mA 425 mA
OUT
2m A
450 mA
All Outputs Disabled 35 mA
THERMAL CHARACTERISTICS
Operating Temperature Range 0 85 °C
θ
JA
LOGIC INPUT CHARACTERISTICS V
Input V
High 1.9 V
IN
= 3 V dc to 5 V dc
DD
30 ° C/W
DD
V
Input VIN Low 0 0.9 V
–2–
REV. 0
AD8151
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage
V
DD–VEE
V
CC
V
DD
V
SS
V
SS
V
DD
Internal Power Dissipation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.5 V
– VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
– VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
– VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
– VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
– VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
2
AD8151 184-Lead Plastic LQFP (ST) . . . . . . . . . . . . 4.2 W
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.0 V
Storage Temperature Range . . . . . . . . . . . . –65° C to +125°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air (TA = 25° C):
184-lead plastic LQFP (ST): θ JA = 30°C/W.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the AD8151
is limited by the associated rise in junction temperature. The
maximum safe junction temperature for plastic encapsulated
devices is determined by the glass transition temperature of
the plastic, approximately 150° C. Temporarily exceeding this
limit may cause a shift in parametric performance due to a change
in the stresses exerted on the die by the package. Exceeding a
junction temperature of 175° C for an extended period can result in
device failure.
To ensure proper operation, it is necessary to observe the maximum power derating curves shown in Figure 2.
6.0
5.0
4.0
3.0
2.0
MAXIMUM POWER DISSIPATION – Watts
1.0
– 1 0 0 1 0 2 03 04 05 06 07 08 09 0
AMBIENT TEMPERATURE – C
TJ = 150C
Figure 2. Maximum Power Dissipation vs. Temperature
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
AD8151AST 0° C to 85° C 184-Lead Plastic LQFP ST-184
(20 mm × 20 mm)
AD8151-EVAL Evaluation Board
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8151 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
AD8151
OUT16N
OUT16P
VEEA16
V
IN20P
IN20N
V
IN21P
IN21N
V
IN22P
IN22N
V
IN23P
IN23N
V
IN24P
IN24N
V
IN25P
IN25N
V
IN26P
IN26N
V
IN27P
IN27N
V
IN28P
IN28N
V
IN29P
IN29N
V
IN30P
IN30N
V
IN31P
IN31N
V
IN32P
IN32N
V
V
V
V
PIN CONFIGURATION
REF
EE
VEEIN19N
IN19P
VEEIN18N
IN18P
VEEIN17N
IN17P
VEEIN16N
IN16P
VEEVCCVDDRESETCSREWEUPDATEA0A1A2A3A4D0D1D2D3D4D5D6
184
183
182
181
180
179
178
177
176
175
174
173
170
169
168
167
166
165
164
AD8151
184L LQFP
TOP VIEW
(Not to Scale)
A10
EE
V
OUT09P
OUT09N
163
160
159
157
156
155
154
OUT06P
OUT06N
A6
EE
V
OUT05N
153
161
A8
EE
V
OUT08P
158
A7
V
OUT07P
OUT07N
EE
162
68
6970717274757677787379808182848586
A9
EE
V
OUT08N
172
171
1
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
CC
EE
EE
PIN 1
2
IDENTIFIER
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
4748495051525354555657
EE
V
A15
EE
V
OUT15P
OUT15N
OUT14P
OUT14N
A14
EE
V
OUT13N
A13
EE
V
OUT13P
OUT12N
596061626364656667
58
A12
A11
EE
EE
V
OUT11P
OUT11N
V
OUT10N
OUT10P
OUT12P
VSSREF
152
151
A5
EE
V
OUT05P
CCVEE
V
V
150
149
A4
V
OUT04P
OUT04N
IN15N
147
148
EE
OUT03N
IN15P
VEEIN14N
146
145
144
87838889909192
A3
EE
V
OUT03P
OUT02N
IN14P
143
OUT02P
VEEIN13N
142
141
A2
EE
V
OUT01N
EE
IN13P
V
140
139
EE
V
OUT01P
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
V
EE
IN12N
IN12P
V
EE
IN11N
IN11P
V
EE
IN10N
IN10P
V
EE
IN09N
IN09P
V
EE
IN08N
IN08P
V
EE
IN07N
IN07P
V
EE
IN06N
IN06P
V
EE
IN05N
IN05P
V
EE
IN04N
IN04P
V
EE
IN03N
IN03P
V
EE
IN02N
IN02P
V
EE
IN01N
IN01P
V
EE
IN00N
IN00P
V
EE
V
CC
VEEA0
OUT00P
OUT00N
VEEA1
V
EE
–4–
REV. 0
PIN FUNCTION DESCRIPTIONS
Pin No. Signal Type Description
1, 4, 7, 10, 13, 16, 19, 22, 25, 28, 31, V
EE
34, 37, 40, 42, 46, 47, 92, 93, 99, 102, Points Labeled V
Power Supply Most Negative PECL Supply (Common with Other
)
EE
105, 108, 111, 114, 117, 120, 123,
126, 129, 132, 135, 138, 139, 142,
145, 148, 172, 175, 178, 181, 184
2 IN20P PECL/ECL High-Speed Input
3 IN20N PECL/ECL High-Speed Input Complement
5 IN21P PECL/ECL High-Speed Input
6 IN21N PECL/ECL High-Speed Input Complement
8 IN22P PECL/ECL High-Speed Input
9 IN22N PECL/ECL High-Speed Input Complement
11 IN23P PECL/ECL High-Speed Input
12 IN23N PECL/ECL High-Speed Input Complement
14 IN24P PECL/ECL High-Speed Input
15 IN24N PECL/ECL High-Speed Input Complement
17 IN25P PECL/ECL High-Speed Input
18 IN25N PECL/ECL High-Speed Input Complement
20 IN26P PECL/ECL High-Speed Input
21 IN26N PECL/ECL High-Speed Input Complement
23 IN27P PECL/ECL High-Speed Input
24 IN27N PECL/ECL High-Speed Input Complement
26 IN28P PECL/ECL High-Speed Input
27 IN28N PECL/ECL High-Speed Input Complement
29 IN29P PECL/ECL High-Speed Input
30 IN29N PECL/ECL High-Speed Input Complement
32 IN30P PECL/ECL High-Speed Input
33 IN30N PECL/ECL High-Speed Input Complement
35 IN31P PECL/ECL High-Speed Input
36 IN31N PECL/ECL High-Speed Input Complement
38 IN32P PECL/ECL High-Speed Input
39 IN32N PECL/ECL High-Speed Input Complement
41, 98, 149, 171 V
CC
Power Supply Most Positive PECL Supply (Common with Other
Points Labeled V
CC
)
43 OUT16N PECL/ECL High-Speed Output Complement
44 OUT16P PECL/ECL High-Speed Output
45 V
A16 Power Supply Most Negative PECL Supply (Unique to This Output)
EE
48 OUT15N PECL/ECL High-Speed Output Complement
49 OUT15P PECL/ECL High-Speed Output
50 V
A15 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
51 OUT14N PECL/ECL High-Speed Output Complement
52 OUT14P PECL/ECL High-Speed Output
53 V
A14 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
54 OUT13N PECL/ECL High-Speed Output Complement
55 OUT13P PECL/ECL High-Speed Output
56 V
A13 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
57 OUT12N PECL/ECL High-Speed Output Complement
58 OUT12P PECL/ECL High-Speed Output
59 V
A12 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
60 OUT11N PECL/ECL High-Speed Output Complement
61 OUT11P PECL/ECL High-Speed Output
AD8151
REV. 0
–5–
AD8151
Pin No. Signal Type Description
62 V
63 OUT10N PECL/ECL High-Speed Output Complement
64 OUT10P PECL/ECL High-Speed Output
65 V
66 OUT09N PECL/ECL High-Speed Output Complement
67 OUT09P PECL/ECL High-Speed Output
68 V
69 OUT08N PECL/ECL High-Speed Output Complement
70 OUT08P PECL/ECL High-Speed Output
71 V
72 OUT07N PECL/ECL High-Speed Output Complement
73 OUT07P PECL/ECL High-Speed Output
74 V
75 OUT06N PECL/ECL High-Speed Output Complement
76 OUT06P PECL/ECL High-Speed Output
77 V
78 OUT05N PECL/ECL High-Speed Output Complement
79 OUT05P PECL/ECL High-Speed Output
80 V
81 OUT04N PECL/ECL High-Speed Output Complement
82 OUT04P PECL/ECL High-Speed Output
83 V
84 OUT03N PECL/ECL High-Speed Output Complement
85 OUT03P PECL/ECL High-Speed Output
86 V
87 OUT02N PECL/ECL High-Speed Output Complement
88 OUT02P PECL/ECL High-Speed Output
89 V
90 OUT01N PECL/ECL High-Speed Output Complement
91 OUT01P PECL/ECL High-Speed Output
94 V
95 OUT00N PECL/ECL High-Speed Output Complement
96 OUT00P PECL/ECL High-Speed Output
97 V
100 IN00P PECL/ECL High-Speed Input
101 IN00N PECL/ECL High-Speed Input Complement
103 IN01P PECL/ECL High-Speed Input
104 IN01N PECL/ECL High-Speed Input Complement
106 IN02P PECL/ECL High-Speed Input
107 IN02N PECL/ECL High-Speed Input Complement
109 IN03P PECL/ECL High-Speed Input
110 IN03N PECL/ECL High-Speed Input Complement
112 IN04P PECL/ECL High-Speed Input
113 IN04N PECL/ECL High-Speed Input Complement
115 IN05P PECL/ECL High-Speed Input
116 IN05N PECL/ECL High-Speed Input Complement
118 IN06P PECL/ECL High-Speed Input
119 IN06N PECL/ECL High-Speed Input Complement
121 IN07P PECL/ECL High-Speed Input
122 IN07N PECL/ECL High-Speed Input Complement
A11 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A10 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A9 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A8 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A7 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A6 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A5 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A4 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A3 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A2 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A1 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
A0 Power Supply Most Negative PECL Supply (Unique to this Output)
EE
–6–
REV. 0
AD8151
Pin No. Signal Type Description
124 IN08P PECL/ECL High-Speed Input
125 IN08N PECL/ECL High-Speed Input Complement
127 IN09P PECL/ECL High-Speed Input
128 IN09N PECL/ECL High-Speed Input Complement
130 IN10P PECL/ECL High-Speed Input
131 IN10N PECL/ECL High-Speed Input Complement
133 IN11P PECL/ECL High-Speed Input
134 IN11N PECL/ECL High-Speed Input Complement
136 IN12P PECL/ECL High-Speed Input
137 IN12N PECL/ECL High-Speed Input Complement
140 IN13P PECL/ECL High-Speed Input
141 IN13N PECL/ECL High-Speed Input Complement
143 IN14P PECL/ECL High-Speed Input
144 IN14N PECL/ECL High-Speed Input Complement
146 IN15P PECL/ECL High-Speed Input
147 IN15N PECL/ECL High-Speed Input Complement
150 V
151 REF R-Program Connection Point for Output Logic Pull-Down
152 V
153 D6 TTL Enable/Disable Output
154 D5 TTL (32) MSB Input Select
155 D4 TTL (16)
156 D3 TTL (8)
157 D2 TTL (4)
158 D1 TTL (2)
159 D0 TTL (1) LSB Input Select
160 A4 TTL (16) MSB Output Select
161 A3 TTL (8)
162 A2 TTL (4)
163 A1 TTL (2)
164 A0 TTL (1) LSB Output Select
165 UPDATE TTL Second Rank Program
166 WE TTL First Rank Program
167 RE TTL Enable Readback
168 CS TTL Enable Chip to Accept Programming
169 RESET TTL Disable All Outputs (Hi-Z)
170 V
173 IN16P PECL/ECL High-Speed Input
174 IN16N PECL/ECL High-Speed Input Complement
176 IN17P PECL/ECL High-Speed Input
177 IN17N PECL/ECL High-Speed Input Complement
179 IN18P PECL/ECL High-Speed Input
180 IN18N PECL/ECL High-Speed Input Complement
182 IN19P PECL/ECL High-Speed Input
183 IN19N PECL/ECL High-Speed Input Complement
REF R-Program Connection Point for Output Logic Pull-Down
EE
Programming Resistor (Must be Connected to V
Programming Resistor
SS
DD
Power Supply Most Negative Control Logic Supply
Power Supply Most Positive Control Logic Supply
EE
)
REV. 0
–7–
AD8151
–Typical Performance Characteristics
TPC 1. Eye Pattern 2.5 Gb/s, PRBS 23
p-p = 43ps
STD DEV = 8ps
150mV/DIV
20ps/DIV
TPC 2. Jitter @ 2.5 Gb/s, PRBS 23
100
90
80
70
60
50
40
EYE WIDTH – %
30
20
10
0
% EYE WIDTH =
1.0 1.5 2.0 2.5 3.0 3.5
0.5
(CLOCK PERIOD – JITTER p-p)
CLOCK PERIOD
DATA RATE – Gb/s
TPC 3. Eye Width vs. Data Rate, PRBS 23
100
TPC 4. Eye Pattern 3.2 Gb/s, PRBS 23
p-p = 53ps
STD DEV = 8ps
150mV/DIV
20ps/DIV
TPC 5. Jitter @ 3.2 Gb/s, PRBS 23
100
90
80
70
60
% EYE HEIGHT =
50
40
EYE HEIGHT – %
30
20
10
0
1.0 1.5 2.0 2.5 3.0 3.5
0.5
@ DATA RATE)
(V
OUT
V
@ 0.5Gb/s
OUT
DATA RATE – Gb/s
100
TPC 6. Eye Height vs. Data Rate, PRBS 23
–8–
REV. 0
AD8151
100
90
80
70
60
50
40
JITTER – ps
30
20
10
STANDARD DEVIATION
0
1.0
PEAK-PEAK
JITTER
1.5 2.0 2.5 3.0 3.5
DATA RATE – Gb/s
TPC 7. Jitter vs. Data Rate, PRBS 23
150mV/DIV
p-p = 38ps
STD DEV = 7.7ps
100
90
80
70
60
50
JITTER – ps
40
30
20
10
0
3.2Gb/s STD DEV
0 1 02 03 04 05 06 07 08 09 0
3.2Gb/s JITTER
2.5Gb/s JITTER
2.5Gb/s STD DEV
TEMPERATURE – C
TPC 10. Jitter vs. Temperature, PRBS 23
150mV/DIV
100ps/DIV
TPC 8. Crosstalk, 2.5 Gb/s, PRBS 23, Attack Signal is OFF
p-p = 70ps
STD DEV = 8ps
150mV/DIV
100ps/DIV
TPC 9. Crosstalk, 2.5 Gb/s, PRBS 23, Attack Signal is ON
p-p = 32ps
STD DEV = 4.7ps
75ps/DIV
TPC 11. Crosstalk, 3.2 Gb/s, PRBS 23, Attack Signal is OFF
150mV/DIV
p-p = 70ps
STD DEV = 9ps
75ps/DIV
TPC 12. Crosstalk, 3.2 Gb/s, PRBS 23, Attack Signal is ON
REV. 0
–9–
AD8151
150mV/DIV
1.4ns/DIV
TPC 13. Response, 2.5 Gb/s, 32-Bit Pattern
1111 1111 0000 0000 0101 0101 0011 0011
100
90
80
70
60
50
40
P-P JITTER – ps
30
3.2Gb/s JITTER
20
10
0
0.2 0.3 0.5 0.6 0.7 0.8 0.9 1 0.4
2.5Gb/s JITTER
INPUT AMPLITUDE – V
TPC 14. Jitter vs. Single-Ended Input Amplitude, PRBS 23
150mV/DIV
1.1ns/DIV
TPC 16. Response, 3.2 Gb/s, 32-Bit Pattern
1111 1111 0000 0000 0101 0101 0011 0011
100
90
80
70
60
50
40
P-P JITTER – ps
30
20
10
0
–5.0 –4.8 –4.6 –4.4 –4.2 –4.0 –3.8 –3.6 –3.4 –3.2 –3.0
3.2Gb/s
2.5Gb/s
– V
V
EE
TPC 17. Jitter vs. Supply, PRBS 23
100
90
80
70
60
3.2Gb/s
50
40
P-P JITTER – ps
30
20
10
0
–1.6 –1.4 –1.2 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6
2.5Gb/s
VIH – V
TPC 15. Jitter vs. VIH, PRBS 23
100
90
80
70
3.2Gb/s
60
50
2.5Gb/s
40
P-P JITTER – ps
30
20
10
0
–1.4 –1.2 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2
V
– V
OH
TPC 18. Jitter vs. VOH, PRBS 23, Output Amplitude = 0.4 V
Single-Ended
–10–
REV. 0
AD8151
100
90
80
70
60
50
40
FREQUENCY
30
20
10
0
550 570 590 610 630 650 670 690 710 730
PROPAGATION DELAY – ps
TPC 19. Variation in Channel-to-Channel Delay,
All 561 Points
100
90
80
70
2.5Gb/s
60
50
3.2Gb/s
40
P-P JITTER – ps
30
20
10
0
5
10 15 20 25
OUTPUT CURRENT – mA
TPC 20. Jitter vs. I
, PRBS 23
OUT
200
150
100
50
0
–50
–100
PROPAGATION DELAY – ps
–150
–200
–100 –80 –60 –40 –20 0 20 40 60 80 100
NORMALIZED TEMPERATURE – C
TPC 21. Propagation Delay, Normalized at 25°C vs.
Temperature
V
V
TT
CC
49.9
P
N
V
49.9
EE
V
TT
HIGH-SPEED
SAMPLING
OSCILLOSCOPE
50
50
PRBS
GENERATOR
DATA OUT
DATA OUT
V
CC
1.65k
–6dB
–6dB
1.65k
V
= 0V, VEE = –3.3V, VTT = –1.6V, VDD = 5V, VSS = 0V
CC
= 1.54k, I
R
SET
VIN = 0.8V p-p EXCEPT AS NOTED
OUT
AD8151
P
IN OUT
105
N
V
EE
= 16mA, VOH = –0.8V, VOL = –1.2V
TPC 22. Test Circuit
REV. 0
–11–