ANALOG DEVICES AD8132 Service Manual

Low Cost, High Speed
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FEATURES
High speed
350 MHz, −3 dB bandwidth
1200 V/μs slew rate Resistor set gain Internal common-mode feedback Improved gain and phase balance
−68 dB @ 10 MHz Separate input to set the common-mode output voltage Low distortion: −99 dBc SFDR @ 5 MHz, 800 Ω load Low power: 10.7 mA @ 5 V Power supply range: +2.7 V to ±5.5 V
APPLICATIONS
Low power differential ADC drivers Differential gain and differential filtering Video line drivers Differential in/out level shifting Single-ended input to differential output drivers Active transformers
GENERAL DESCRIPTION
Differential Amplifier
AD8132
PIN CONFIGURATION
AD8132
1
–IN
V
2
OCM
V+
3
+OUT
4
NC = NO CONNECT
Figure 1.
The AD8132 is also used as a differential driver for the trans­mission of high speed signals over low cost twisted pair or coaxial cables. The feedback network can be adjusted to boost the high frequency components of the signal. The AD8132 is used for either analog or digital video signals or for other high speed data trans­mission. The AD8132 is capable of driving either a Category 3 or Category 5 twisted pair or coaxial cable with minimal line attenuation. The AD8132 has considerable cost and performance improvements over discrete line driver solutions.
Differential signal processing reduces the effects of ground noise that plagues ground-referenced systems. The AD8132 can be used for differential signal processing (gain and filtering) through­out a signal chain, easily simplifying the conversion between differential and single-ended components.
8
+IN
NC
7
V–
6
–OUT
5
01035-001
The AD8132 is a low cost differential or single-ended input to differential output amplifier with resistor set gain. The AD8132 is a major advancement over op amps for driving differential input ADCs or for driving signals over long lines. The AD8132 has a unique internal feedback feature that provides output gain and phase matching balanced to −68 dB at 10 MHz, suppressing harmonics and reducing radiated EMI.
Manufactured using the next generation of Analog Devices, Inc.’s XFCB bipolar process, the AD8132 has a −3 dB bandwidth of 350 MHz and delivers a differential signal with −99 dBc SFDR at 5 MHz, despite its low cost. The AD8132 eliminates the need for a transformer with high performance ADCs, preserving the low frequency and dc information. The common-mode level of the differential output is adjustable by applying a voltage on the V
pin, easily level shifting the input signals for driving
OCM
single-supply ADCs. Fast overload recovery preserves sampling accuracy.
The AD8132 is available in both SOIC_N and MSOP packages for operation over the extended industrial temperature range of
−40°C to +125°C.
6
VS = ±5V G = +1
3
0
–3
GAIN (dB)
–6
–9
–12
= 2V p-p
V
O, dm
= 499
R
L, dm
1
Figure 2. Large Signal Frequency Response
10 100 1k
FREQUENCY (MHz)
01035-002
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
AD8132
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TABLE OF CONTENTS
Features.............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±D
to ±OUT Specifications...................................................... 3
IN
V
to ±OUT Specifications ..................................................... 4
OCM
±D
to ±OUT Specifications...................................................... 5
IN
V
to ±OUT Specifications ..................................................... 6
OCM
±D
to ±OUT Specifications...................................................... 7
IN
V
to ±OUT Specifications ..................................................... 7
OCM
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions............................. 9
Typical Performance Characteristics ........................................... 10
Test Circuits..................................................................................... 19
Operational Description................................................................ 20
Definition of Terms.................................................................... 20
Basic Circuit Operation............................................................. 20
Theory of Operation ...................................................................... 21
General Usage of the AD8132 .................................................. 21
Differential Amplifier Without Resistors (High Input
Impedance Inverting Amplifier).............................................. 21
Other β2 = 1 Circuits................................................................. 22
Varying β2 ................................................................................... 22
β1 = 0............................................................................................ 22
Estimating the Output Noise Voltage...................................... 22
Calculating Input Impedance of the Application Circuit ..... 23
Input Common-Mode Voltage Range in Single-Supply
Applications ................................................................................ 23
Setting the Output Common-Mode Voltage .......................... 23
Driving a Capacitive Load......................................................... 23
Open-Loop Gain and Phase ..................................................... 23
Layout, Grounding, and Bypassing.............................................. 24
Circuits......................................................................................... 24
Applications..................................................................................... 25
Analog-to-Digital Driver .......................................................... 25
Balanced Cable Driver............................................................... 25
Transmit Equalizer..................................................................... 26
Low-Pass Differential Filter ...................................................... 26
High Common-Mode Output Impedance Amplifier ........... 27
Full-Wave Rectifier .................................................................... 28
Outline Dimensions....................................................................... 29
Ordering Guide .......................................................................... 29
REVISION HISTORY
11/06—Rev. E to Rev. F
Updated Format..................................................................Universal
Changes to Table 1............................................................................ 3
Changes to Table 4............................................................................ 6
Changes to Table 5............................................................................ 7
Changes to Ordering Guide.......................................................... 29
11/05—Rev. D to Rev. E
Changes to Table 7, Thermal Resistance Section, Maximum
Power Dissipation Section, and Figure 3....................................... 8
Changes to Ordering Guide.......................................................... 29
Rev. F | Page 2 of 32
12/04—Rev. C to Rev. D
Changes to General Description .....................................................1
Changes to Specifications.................................................................2
Changes to Absolute Maximum Ratings........................................8
Updated Outline Dimensions....................................................... 29
Changes to Ordering Guide.......................................................... 29
2/03—Rev. B to Rev. C
Changes to Specifications.................................................................2
Addition to Estimating the Output Noise Voltage Section....... 15
Updated Outline Dimensions....................................................... 21
1/02—Rev. A to Rev. B
Edits to Transmitter Equalizer Section........................................ 18
AD8132
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SPECIFICATIONS
±DIN TO ±OUT SPECIFICATIONS
At TA = 25°C, VS = ±5 V, V
= 499 Ω. Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and
R
G
differential outputs, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Large Signal Bandwidth V V
−3 dB Small Signal Bandwidth V V Bandwidth for 0.1 dB Flatness V V Slew Rate V Settling Time 0.1%, V Overdrive Recovery Time VIN = 5 V to 0 V step, G = 2 5 ns
NOISE/HARMONIC PERFORMANCE
Second Harmonic V V V Third Harmonic V V V IMD 20 MHz, R IP3 20 MHz, R Input Voltage Noise (RTI) f = 0.1 MHz to 100 MHz 8 nV/√Hz Input Current Noise f = 0.1 MHz to 100 MHz 1.8 pA/√Hz Differential Gain Error NTSC, G = 2, R Differential Phase Error NTSC, G = 2, R
INPUT CHARACTERISTICS
Offset Voltage (RTI) V T Input Bias Current 3 7 μA Input Resistance Differential 12 MΩ Common mode 3.5 MΩ Input Capacitance 1 pF Input Common-Mode Voltage −4.7 to +3.0 V CMRR ΔV
OUTPUT CHARACTERISTICS
Output Voltage Swing Maximum ΔV Output Current +70 mA Output Balance Error ΔV
= 0 V, G = 1, R
OCM
= 499 Ω, RF = RG = 348 Ω, unless otherwise noted. For G = 2, R
L, dm
= 2 V p-p 300 350 MHz
OUT
= 2 V p-p, G = 2 190 MHz
OUT
= 0.2 V p-p 360 MHz
OUT
= 0.2 V p-p, G = 2 160 MHz
OUT
= 0.2 V p-p 90 MHz
OUT
= 0.2 V p-p, G = 2 50 MHz
OUT
= 2 V p-p 1000 1200 V/μs
OUT
= 2 V p-p 15 ns
OUT
= 2 V p-p, 1 MHz, R
OUT
= 2 V p-p, 5 MHz, R
OUT
= 2 V p-p, 20 MHz, R
OUT
= 2 V p-p, 1 MHz, R
OUT
= 2 V p-p, 5 MHz, R
OUT
= 2 V p-p, 20 MHz, R
OUT
= 800 Ω −76 dBc
L, dm
= 800 Ω 40 dBm
L, dm
L, dm
L, dm
OS, dm
MIN
OUT, dm
OUT, cm
= V
to T
/2; V
OUT, dm
variation 10 μV/°C
MAX
/ΔV
; ΔV
IN, cm
; single-ended output −3.6 to +3.6 V
OUT
/ΔV
OUT, dm
= 150 Ω 0.01 % = 150 Ω 0.10 Degrees
; ΔV
= 800 Ω −96 dBc
L, dm
= 800 Ω −83 dBc
L, dm
= 800 Ω −73 dBc
L, dm
= 800 Ω −102 dBc
L, dm
= 800 Ω −98 dBc
L, dm
= 800 Ω −67 dBc
L, dm
= V
= V
DIN+
DIN−
= ±1 V; resistors matched to 0.01% −70 −60 dB
IN, cm
= 1 V −70 dB
OUT, dm
= 0 V ±1.0 ±3.5 mV
OCM
= 200 Ω, RF = 1000 Ω,
L, dm
Rev. F | Page 3 of 32
AD8132
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V
TO ±OUT SPECIFICATIONS
OCM
At TA = 25°C, VS = ±5 V, V
= 499 Ω. Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and
R
G
differential outputs, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth ΔV
Slew Rate ΔV
Input Voltage Noise (RTI) f = 0.1 MHz to 100 MHz 12 nV/√Hz DC PERFORMANCE
Input Voltage Range ±3.6 V
Input Resistance 50
Input Offset Voltage V
Input Bias Current 0.5 μA
V
CMRR ΔV
OCM
Gain ΔV POWER SUPPLY
Operating Range ±1.35 ±5.5 V
Quiescent Current V
T
Power Supply Rejection Ratio ΔV OPERATING TEMPERATURE RANGE −40 +125 °C
= 0 V, G = 1, R
OCM
= 499 Ω, RF = RG = 348 Ω, unless otherwise noted. For G = 2, R
L, dm
= 600 mV p-p 210 MHz
OCM
= −1 V to +1 V 400 V/μs
OCM
OS, cm
OUT, dm
OUT, cm
DIN+
MIN
OUT, dm
= V
= V
to T
; V
= V
= V
OUT, cm
DIN+
DIN−
/ΔV
; ΔV
OCM
/ΔV
OCM
= V
DIN−
variation 16 μA/°C
MAX
= ±1 V; resistors matched to 0.01% −68 dB
OCM
; ΔV
= ±1 V 0.985 1 1.015 V/V
OCM
= 0 V 11 12 13 mA
OCM
= 0 V ±1.5 ±7 mV
OCM
/ΔVS; ΔVS = ±1 V −70 −60 dB
= 200 Ω, RF = 1000 Ω,
L, dm
Rev. F | Page 4 of 32
AD8132
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±DIN TO ±OUT SPECIFICATIONS
At TA = 25°C, VS = 5 V, V
= 499 Ω. Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and
R
G
differential outputs, unless otherwise noted.
Table 3.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Large Signal Bandwidth V V
−3 dB Small Signal Bandwidth V V Bandwidth for 0.1 dB Flatness V V Slew Rate V Settling Time 0.1%, V Overdrive Recovery Time VIN = 2.5 V to 0 V step, G = 2 5 ns
NOISE/HARMONIC PERFORMANCE
Second Harmonic V V V Third Harmonic V V V IMD 20 MHz, R IP3 20 MHz, R Input Voltage Noise (RTI) f = 0.1 MHz to 100 MHz 8 nV/√Hz Input Current Noise f = 0.1 MHz to 100 MHz 1.8 pA/√Hz Differential Gain Error NTSC, G = 2, R Differential Phase Error NTSC, G = 2, R
INPUT CHARACTERISTICS
Offset Voltage (RTI) V T Input Bias Current 3 7 μA Input Resistance Differential 10 MΩ Common-mode 3 MΩ Input Capacitance 1 pF Input Common-Mode Voltage 0.3 to 3.0 V CMRR ΔV
OUTPUT CHARACTERISTICS
Output Voltage Swing Maximum ΔV Output Current 50 mA Output Balance Error ΔV
= 2.5 V, G = 1, R
OCM
= 499 Ω, RF = RG = 348 Ω, unless otherwise noted. For G = 2, R
L, dm
= 2 V p-p 250 300 MHz
OUT
= 2 V p-p, G = 2 180 MHz
OUT
= 0.2 V p-p 360 MHz
OUT
= 0.2 V p-p, G = 2 155 MHz
OUT
= 0.2 V p-p 65 MHz
OUT
= 0.2 V p-p, G = 2 50 MHz
OUT
= 2 V p-p 800 1000 V/μs
OUT
= 2 V p-p 20 ns
OUT
= 2 V p-p, 1 MHz, R
OUT
= 2 V p-p, 5 MHz, R
OUT
= 2 V p-p, 20 MHz, R
OUT
= 2 V p-p, 1 MHz, R
OUT
= 2 V p-p, 5 MHz, R
OUT
= 2 V p-p, 20 MHz, R
OUT
= 800 Ω −76 dBc
L, dm
= 800 Ω 40 dBm
L, dm
L, dm
L, dm
OS, dm
MIN
OUT, dm
OUT, cm
= V
to T
/2; V
OUT, dm
variation 6 μV/°C
MAX
/ΔV
; ΔV
IN, cm
; single-ended output 1.0 to 4.0 V
OUT
/ΔV
OUT, dm
= 150 Ω 0.025 % = 150 Ω 0.15 Degrees
; ΔV
= 800 Ω −97 dBc
L, dm
= 800 Ω −100 dBc
L, dm
= 800 Ω −74 dBc
L, dm
= 800 Ω −100 dBc
L, dm
= 800 Ω −99 dBc
L, dm
= 800 Ω −67 dBc
L, dm
= V
= V
DIN+
DIN−
= ±1 V; resistors matched to 0.01% −70 −60 dB
IN, cm
= 1 V −68 dB
OUT, dm
= 2.5 V ±1.0 ±3.5 mV
OCM
= 200 Ω, RF = 1000 Ω,
L, dm
Rev. F | Page 5 of 32
AD8132
www.BDTIC.com/ADI
V
TO ±OUT SPECIFICATIONS
OCM
At TA = 25°C, VS = 5 V, V
= 499 Ω. Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and
R
G
differential outputs, unless otherwise noted.
Table 4.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth ΔV
Slew Rate ΔV
Input Voltage Noise (RTI) f = 0.1 MHz to 100 MHz 12 nV/√Hz DC PERFORMANCE
Input Voltage Range 1.0 to 3.7 V
Input Resistance 30 kΩ
Input Offset Voltage V
Input Bias Current 0.5 μA
V
CMRR ΔV
OCM
Gain ΔV POWER SUPPLY
Operating Range 2.7 11 V
Quiescent Current V
T
Power Supply Rejection Ratio ΔV OPERATING TEMPERATURE RANGE −40 +125 °C
= 2.5 V, G = 1, R
OCM
= 499 Ω, RF = RG = 348 Ω, unless otherwise noted. For G = 2, R
L, dm
= 600 mV p-p 210 MHz
OCM
= 1.5 V to 3.5 V 340 V/μs
OCM
OS, cm
OUT, dm
OUT, cm
DIN+
MIN
OUT, dm
= V
= V
to T
; V
= V
= V
OUT, cm
DIN+
DIN−
/ΔV
; ΔV
OCM
/ΔV
OCM
= V
DIN−
variation 10 μA/°C
MAX
= 2.5 V ±1 V; resistors matched to 0.01% −66 dB
OCM
; ΔV
= 2.5 V ±1 V 0.985 1 1.015 V/V
OCM
= 2.5 V 9.4 10.7 12 mA
OCM
= 2.5 V ±5 ±11 mV
OCM
/ΔVS; ΔVS = ±1 V −70 −60 dB
= 200 Ω, RF = 1000 Ω,
L, dm
Rev. F | Page 6 of 32
AD8132
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±DIN TO ±OUT SPECIFICATIONS
At TA = 25°C, VS = 3 V, V
= 499 Ω. Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and
R
G
differential outputs, unless otherwise noted.
Table 5.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Large Signal Bandwidth V V
−3 dB Small Signal Bandwidth V V Bandwidth for 0.1 dB Flatness V V
NOISE/HARMONIC PERFORMANCE
Second Harmonic V V V Third Harmonic V V V
INPUT CHARACTERISTICS
Offset Voltage (RTI) V Input Bias Current 3 μA Input Common-Mode Voltage 0.3 to 1.0 V CMRR ΔV
= 1.5 V, G = 1, R
OCM
= 499 Ω, RF = RG = 348 Ω, unless otherwise noted. For G = 2, R
L, dm
= 1 V p-p 350 MHz
OUT
= 1 V p-p, G = 2 165 MHz
OUT
= 0.2 V p-p 350 MHz
OUT
= 0.2 V p-p, G = 2 150 MHz
OUT
= 0.2 V p-p 45 MHz
OUT
= 0.2 V p-p, G = 2 50 MHz
OUT
= 1 V p-p, 1 MHz, R
OUT
= 1 V p-p, 5 MHz, R
OUT
= 1 V p-p, 20 MHz, R
OUT
= 1 V p-p, 1 MHz, R
OUT
= 1 V p-p, 5 MHz, R
OUT
= 1 V p-p, 20 MHz, R
OUT
OS, dm
OUT, dm
= V
OUT, dm
/ΔV
IN, cm
/2; V
; ΔV
= 800 Ω −100 dBc
L, dm
= 800 Ω −94 dBc
L, dm
= 800 Ω −77 dBc
L, dm
= 800 Ω −90 dBc
L, dm
= 800 Ω −85 dBc
L, dm
= 800 Ω −66 dBc
L, dm
= V
= V
DIN+
DIN−
= ±0.5 V; resistors matched to 0.01% −60 dB
IN, cm
= 1.5 V ±10 mV
OCM
= 200 Ω, RF = 1000 Ω,
L, dm
V
TO ±OUT SPECIFICATIONS
OCM
At TA = 25°C, VS = 3 V, V
= 499 Ω. Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and
R
G
= 1.5 V, G = 1, R
OCM
= 499 Ω, RF = RG = 348 Ω, unless otherwise noted. For G = 2, R
L, dm
= 200 Ω, RF = 1000 Ω,
L, dm
differential outputs, unless otherwise noted.
Table 6.
Parameter Conditions Min Typ Max Unit
DC PERFORMANCE
Input Offset Voltage V Gain ΔV
OS, cm
OUT, cm
= V
OUT, cm
/ΔV
OCM
; V
= V
= V
DIN+
DIN−
; ΔV
= ±0.5 V 1 V/V
OCM
= 1.5 V ±7 mV
OCM
POWER SUPPLY
Operating Range 2.7 11 V Quiescent Current V Power Supply Rejection Ratio ΔV
= V
= V
DIN+
DIN−
/ΔVS; ΔVS = ±0.5 V −70 dB
OUT, dm
= 0 V 7.25 mA
OCM
OPERATING TEMPERATURE RANGE −40 +125 °C
Rev. F | Page 7 of 32
AD8132
A
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ABSOLUTE MAXIMUM RATINGS
Table 7.
Parameter Rating
Supply Voltage ±5.5 V V
±VS
OCM
Internal Power Dissipation 250 mW Operating Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering 10 sec) 300°C Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is specified for the device soldered in a circuit board in still air.
Table 8.
Package Type θJA Unit
8-Lead SOIC/4-Layer 121 °C/W 8-Lead MSOP/4-Layer 142 °C/W
Maximum Power Dissipation
The maximum safe power dissipation in the AD8132 packages is limited by the associated rise in junction temperature (T the die. At approximately 150°C (the glass transition temperature), the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8132. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure.
) on
J
The power dissipated in the package (P
) is the sum of the
D
quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (V quiescent current (I
). The load current consists of the dif-
S
) times the
S
ferential and common-mode currents flowing to the load, as well as currents flowing through the external feedback net­works and the internal common-mode feedback loop. The internal resistor tap used in the common-mode feedback loop places a 1 kΩ differential load on the output. Consider rms voltages and currents when dealing with ac signals.
Airflow reduces θ
. In addition, more metal directly in contact
JA
with the package leads from metal traces through holes, ground, and power planes reduces the θ
.
JA
Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8-lead SOIC_N
= 121°C/W) and MSOP (θJA = 142°C/W) packages on a
JA
JEDEC standard 4-layer board. θ
1.75
1.50
1.25
TION (W)
1.00
0.75
0.50
MAXIMUM POWER DISSIP
0.25
0
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120
Figure 3. Maximum Power Dissipation vs. Temperature
AMBIENT TEM PERATURE (°C)
values are approximations.
JA
SOIC
MSOP
01035-082
ESD CAUTION
Rev. F | Page 8 of 32
AD8132
T
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD8132
–IN
1
2
V
OCM
3
V+
+OU
4
NC = NO CONNECT
Figure 4. Pin Configuration
Table 9. Pin Function Descriptions
Pin No. Mnemonic Description
1 −IN Negative Input. 2 V
OCM
Voltage applied to this pin sets the common-mode output voltage with a ratio of 1:1. For example, 1 V dc on V
sets the dc bias level on +OUT and −OUT to 1 V.
OCM
3 V+ Positive Supply Voltage. 4 +OUT Positive Output. Note that the voltage at −DIN is inverted at +OUT (see Figure 64). 5 −OUT Negative Output. Note that the voltage at +DIN is inverted at −OUT (see Figure 64). 6 V− Negative Supply Voltage. 7 NC No Connect. 8 +IN Positive Input.
+IN
8
7
NC
6
V–
–OUT
5
01035-004
Rev. F | Page 9 of 32
AD8132
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TYPICAL PERFORMANCE CHARACTERISTICS
2
1
0
1
2
GAIN (dB)
3
G = +1
= 0.2V p-p
V
O, dm
R
= 499
L, dm
4
VS = +3V
VS = ±5V
VS = +5V
3
2
1
0
1
GAIN (dB)
2
G = +1 V
= 2V p-p FOR VS = ±5V, +5V
O, dm
3
V
= 1V p-p FOR VS = +3V
O, dm
R
= 499
L, dm
4
VS = +3V
VS = +5V
VS = +3V
VS = ±5V
5
1
10 100 1k
FREQUENCY (MHz)
Figure 5. Small Signal Frequency Response (See Figure 56)
0.5 G = +1
GAIN (dB)
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
= 0.2V p-p
V
O, dm
= 499
R
L, dm
VS = ±5V
1 10 100 1k
FREQUE NCY (MHz)
Figure 6. 0.1 dB Flatness vs. Frequency; C
0.2
0.1
0
–0.1
–0.2
GAIN (dB)
–0.3
G = +1 V
= 0.2V p-p
O, dm
R
–0.4
–0.5
= 499
L, dm
1 10 100 1k
VS = +3V
VS = ±5V
FREQUENCY ( MHz)
Figure 7. 0.1 dB Flatness vs. Frequency; C
VS = +3V
VS = +5V
= 0 pF (See Figure 56)
F
VS = +5V
= 0.5 pF (See Figure 56)
F
5
01035-006
1 10 100 1k
Figure 8. Large Signal Frequency Response; C
2
1
0
–1
–2
GAIN (dB)
G = +1
–3
–4
–5
01035-007
= 2V p-p FOR VS = ±5V, +5V
V
O, dm
= 1V p-p FOR VS = +3V
V
O, dm
= 499
R
L, dm
1101001k
Figure 9. Large Signal Frequency Response; C
3
2
1
0
–1
GAIN (dB)
–2
VS = ±5V G = +1
–3
–4
–5
01035-008
1101001k
V R
O, dm L, dm
= 2V p-p = 499
FREQUE NCY (MHz)
VS = ±5V
VS = +3V
FREQUENCY (MHz)
FREQUENCY (MHz)
= 0 pF (See Figure 56)
F
VS = +3V
VS = +5V
= 0.5 pF (See Figure 56)
F
+85°C
+25°C
–40°C
01035-009
01035-010
01035-011
Figure 10. Large Signal Frequency Response at Various Temperatures
(See Figure 56)
Rev. F | Page 10 of 32
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