ANALOG DEVICES AD 8056 ANZ Datasheet

Low Cost, 300 MHz

–

V

Voltage Feedback Amplifiers

AD8055/AD8056

FEATURES CONNECTION DIAGRAMS

Low cost single (AD8055) and dual (AD8056)
Easy-to-use voltage feedback architecture
High speed

300 MHz, −3 dB bandwidth (G = +1)
1400 V/μs slew rate
20 ns settling to 0.1%
Low distortion: −72 dBc @ 10 MHz
Low noise: 6 nV/√Hz
Low dc errors: 5 mV max V

, 1.2 μA max I

OS B

Small packaging

AD8055 available in 5-lead SOT-23
AD8056 available in 8-lead MSOP

Excellent video specifications (R

= 150 Ω, G = +2)

L

Gain flatness 0.1 dB to 40 MHz

0.01% differential gain error

0.02° differential phase error
Drives 4 video loads (37.5 V) with 0.02% differential
Gain and 0.1° differential phase

Low power, ±5 V supplies 5 mA typ/amplifier power

supply current

High output drive current: over 60 mA

APPLICATIONS

Imaging
Photodiode preamps
Video line drivers
Differential line drivers
Professional cameras
Video switchers
Special effects
A-to-D drivers
Active filters

GENERAL DESCRIPTION

The AD8055 (single) and AD8056 (dual) voltage feedback
amplifiers offer bandwidth and slew rate typically found in
current feedback amplifiers. Additionally, these amplifiers are
easy to use and available at a very low cost.

Despite their low cost, the AD8055 and AD8056 provide
excellent overall performance. For video applications, their
differential gain and phase error are 0.01% and 0.02° into a
150  load and 0.02% and 0.1° while driving four video loads
(37.50 ).

1

+IN

NC

–IN

V

S

2

3

4

AD8055

NC = NO CO NNECT

8

NC

7

+V

S

6

V

OUT

5

NC

01063-001

1

OUT

2

–V

S

3

+IN

AD8055

Figure 1. N-8 and R-8 Figure 2. RJ-5

OUT1

–IN1

+IN1

–V

1

2

3

4

S

AD8056

8

+V

S

7

OUT

6

–IN2

5

+IN2

Figure 3. N-8, R-8, and RM-8

Their 0.1 dB flatness out to 40 MHz, wide bandwidth out to
300 MHz, along with 1400 V/µs slew rate and 20 ns settling
time, make them useful for a variety of high speed applications.

The AD8055 and AD8056 require only 5 mA typ/amplifier of
supply current and operate on a dual ±5 V or a single +12 V
power supply, while capable of delivering over 60 mA of load
current. The AD8055 is available in a small 8-lead PDIP, an 8-lead
SOIC, and a 5-lead SOT-23, while the AD8056 is available in an
8-lead MSOP. These features make the AD8055/AD8056 ideal
for portable and battery-powered applications where size and
power are critical. These amplifiers in the R-8, N-8, and RM-8
packages are available in the extended temperature range of

−40°C to +125°C.

5

4

3

2

1

0

GAIN (dB)

–1

–2

–3

–4

–5

R

V

C

R

F

G=+10
R

=909Ω

F

G=+5
R

F

FREQUENCY (Hz)

V

OUT

R

L

= 1000Ω

IN

50Ω

R

G

Figure 4. Frequency Response

G=+1
R

=0Ω

F

R

=100Ω

C

V
R

OUT

= 100Ω

L

= 100mV p -p

01063-003

G=+2
R

=402Ω

F

5

+V

S

4

–IN

01063-002

1G100M10M1M0.3M

01063-004

Rev. J

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2006 Analog Devices, Inc. All rights reserved.

AD8055/AD8056

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications..................................................................................... 12

Applications....................................................................................... 1

General Description......................................................................... 1

Connection Diagrams...................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

Maximum Power Dissipation ..................................................... 5

ESD Caution.................................................................................. 5

Typical Performance Characteristics............................................. 6

Test Circ uit s .....................................................................................11

REVISION HISTORY

2/06—Rev. I to Rev. J

Changes to Format.............................................................Universal

Updated Outline Dimensions....................................................... 15

Changes to Ordering Guide.......................................................... 16

2/04—Rev. H to Rev. I

Changes to Features.......................................................................... 1

Changes to Ordering Guide............................................................ 3

6/03—Rev. G to Rev. H

Changes to Absolute Maximum Ratings....................................... 3

Updated Ordering Guide................................................................. 3

Updated Outline Dimensions....................................................... 11

Four-Line Video Driver............................................................. 12

Single-Ended-to-Differential Line Driver............................... 12

Low Noise, Low Power Preamp................................................ 12

Power Dissipation Limits .......................................................... 13

Resistor Selection ....................................................................... 13

Driving Capacitive Loads.......................................................... 13

Outline Dimensions .......................................................................14

Ordering Guide .......................................................................... 16

10/02—Rev. E to Rev. F

Text Changes to Reflect Extended Temperature Range for

R-8, N-8 Packages..............................................................................1

Changes to Specifications.................................................................2

Changes to Absolute Maximum Ratings........................................3

Figure 2 Replaced ..............................................................................3

Changes to Ordering Guide.............................................................3

Outline Dimensions Updated....................................................... 11

7/01—Rev. D to Rev. E

TPC 24 Replaced with New Graph.................................................7

3/01—Rev. C to Rev. D

Edit to Curve in TPC 23...................................................................7

2/03—Rev. F to Rev. G

Changes to Product Description .................................................... 1

Changes to Specifications................................................................ 2

Change to Ordering Guide.............................................................. 3

Outline Dimensions Updated....................................................... 11

Rev. J | Page 2 of 16

2/01—Rev. B to Rev. C

Edits to Text at Top of Specifications Page (65 to 5)....................2

AD8055/AD8056

SPECIFICATIONS

TA = 25°C, VS = ±5 V, RF = 402 , RL = 100 , Gain = +2, unless otherwise noted.

Table 1.

AD8055A/AD8056A
Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth G = +1, VO = 0.1 V p-p 220 300 MHz
G=+1, VO = 2 V p-p 125 150 MHz
G=+2, VO = 0.1 V p-p 120 160 MHz
G=+2, VO = 2 V p-p 125 150 MHz
Bandwidth for 0.1 dB Flatness VO = 100 mV p-p 25 40 MHz
Slew Rate G = +1, VO = 4 V step 1000 1400 V/μs
G = +2, VO = 4 V step 750 840 V/μs
Settling Time to 0.1% G = +2, VO = 2 V step 20 ns
Rise and Fall Time, 10% to 90% G = +1, VO = 0.5 V step 2 ns
G = +1, VO = 4 V step 2.7 ns
G = +2, VO = 0.5 V step 2.8 ns
G = +2, VO = 4 V step 4 ns

NOISE/HARMONIC PERFORMANCE

Total Harmonic Distortion fC = 10 MHz, VO = 2 V p-p, RL = 1 kΩ −72 dBc
f
Crosstalk, Output-to-Output (AD8056) f = 5 MHz, G = +2 −60 dB
Input Voltage Noise f = 100 kHz 6 nV/√Hz
Input Current Noise f = 100 kHz 1 pA/√Hz
Differential Gain Error NTSC, G = +2, RL = 150 Ω 0.01 %
NTSC, G = +2, RL = 37.5 Ω 0.02 %
Differential Phase Error NTSC, G = +2, RL = 150 Ω 0.02 Degree
NTSC, G = +2, RL = 37.5 Ω 0.1 Degree

DC PERFORMANCE

Input Offset Voltage 3 5 mV
T
Offset Drift 6 μV/°C
Input Bias Current 0.4 1.2 μA
T
Open-Loop Gain VO = ±2.5 V 66 71 dB
T

INPUT CHARACTERISTICS

Input Resistance 10 MΩ
Input Capacitance 2 pF
Input Common-Mode Voltage Range 3.2 ±V
Common-Mode Rejection Ratio VCM = ±2.5 V 82 dB

OUTPUT CHARACTERISTICS

Output Voltage Swing RL = 150 Ω 2.9 3.1 ±V
Output Current1 VO = ±2.0 V 55 60 mA
Short-Circuit Current1 110 mA

= 20 MHz, VO = 2 V p-p, RL = 1 kΩ −57 dBc

C

to T

MIN

MIN

MIN

10 mV

MAX

to T

1 μA

MAX

to T

64 dB

MAX

Rev. J | Page 3 of 16

AD8055/AD8056

AD8055A/AD8056A
Parameter Conditions Min Typ Max Unit

POWER SUPPLY

Operating Range ±4.0 ±5.0 ±6.0 V

Quiescent Current AD8055 5.4 6.5 mA

T

T

AD8056 10 12 mA

T

T

Power Supply Rejection Ratio +VS = +5 V to +6 V, −VS = −5 V 66 72 dB

−VS = –5 V to −6 V, +VS = +5 V 69 86 dB
OPERATING TEMPERATURE RANGE AD8055ART −40 +85 °C
AD8055AR, AD8055AN, AD8056AR, AD8056AN, AD8056ARM −40 +125 °C

1

Output current is limited by the maximum power dissipation in the package. See Figure 5.

to 125°C 7.6 mA

MIN

to 85°C 7.3 mA

MIN

to 125°C 13.9 mA

MIN

to 85°C 13.3 mA

MIN

Rev. J | Page 4 of 16

AD8055/AD8056

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Ratings

Supply Voltage 13.2 V
Input Voltage (Common Mode) ±VS
Differential Input Voltage ±2.5 V
Output Short-Circuit Duration

Observe Power

Derating Curves
Storage Temperature Range N, R −65°C to +150°C
Operating Temperature Range (A Grade) −40°C to +125°C
Lead Temperature (Soldering 10 sec) 300°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the
AD8055/AD8056 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass
transition temperature of the plastic, approximately 150°C.
Exceeding this limit temporarily can cause a shift in parametric
performance due to a change in the stresses exerted on the die
by the package. Exceeding a junction temperature of 175°C for
an extended period can result in device failure.

While the AD8055/AD8056 are internally short-circuit
protected, this may not be sufficient to guarantee that the
maximum junction temperature (150°C) is not exceeded under
all conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves.

2.5

2.0

SOIC-8

1.5

1.0

0.5

MAXIMUM POWER DISSI PATION ( W)

0

–55 –45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115 125

Figure 5. Plot of Maximum Power Dissipation vs.

PDIP-8

MSOP-8

SOT-23-5

AMBIENT T EMPERATURE (°C)

Temperature for AD8055/AD8056

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

01063-005

Rev. J | Page 5 of 16

AD8055/AD8056

TYPICAL PERFORMANCE CHARACTERISTICS

0V

20mV 5n s

Figure 6. Small Step Response, G = +1 (See

0V

5ns1V

Figure 7. Large Step Response, G = +1 (See

0V

5ns20mV

Figure 8. Small Step Response, G = −1 (See

Figure 34

Figure 34)

Figure 35)

0V

01063-007

)

Figure 9. Large Step Response, G = −1 (See

1V 5ns

Figure 35

5

4

3

2

1

0

GAIN (dB)

–1

–2

–3

–4

01063-008

–5

R

V

C

IN

50Ω

R

G

R

F

G=+10
R

=909Ω

F

G=+5
R

F

FREQUENCY (Hz)

V

OUT

R

= 1000Ω

L

G=+1
R

=0Ω

F

R

=100Ω

C

V
R

OUT

= 100Ω

L

= 100mV p -p

G=+2
R

F

Figure 10. Small Signal Frequency Response, G = +1, G = +2, G = +5, G = +10

5

4

3

2

1

0

GAIN (dB)

–1

–2

–3

01063-010

–4

–5

G=+10
R

=909Ω

F

G=+5
R

F

= 1000Ω

FREQUENCY (Hz)

G=+2
R

=402Ω

F

V
R

OUT

= 100Ω

L

=2Vp-p

G=+1
R

F

Figure 11. Large Signal Frequency Response, G = +1, G = +2, G = +5, G = +10

=402Ω

=0Ω

01063-011

)

1G100M10M1M0.3M

01063-012

1G100M10M1M0.3M

01063-013

Rev. J | Page 6 of 16

AD8055/AD8056

–

–

–

0.5

0.4

0.3

0.2

0.1

0

–0.1

OUTPUT (d B)

–0.2

–0.3

–0.4

–0.5

FREQUENCY (Hz)

Figure 12. 0.1 dB Flatness

50

V

=2Vp-p

OUT

G=+2
R

= 100Ω

L

–60

–70

–80

–90

HARMONIC DISTORTION (dBc)

–100

10k 100k 1M 100M10M

SECOND

THIRD

FREQUENCY (Hz)

Figure 13. Harmonic Distortion vs. Frequency

50

V

=2Vp-p

OUT

G=+2
R

=1kΩ

L

–60

–70

–80

–90

HARMONIC DIST ORTIO N (dBc)

–100

10k 100k 1M 100M10M

SECOND

THIRD

FREQUENCY (Hz)

Figure 14. Harmonic Distortion vs. Frequency

V

OUT

G=+2
R

=100Ω

L

R

=402Ω

F

= 100mV

1G100M10M1M0.3M

01063-014

1063-015

1063-016

40

G=+2

–50

R

=1kΩ

L

–60

SECOND

–70

DISTORTION (dBc)

–80

–90

0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0

THIRD

(V p-p)

V

OUT

Figure 15. Distortion vs. V

@ 20 MHz

OUT

10

G=+1
R

= 100Ω

9

L

R

=0Ω

F

8

7

6

5

4

3

2

RISE TIME AND FALL T IME (ns)

1

0

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

FALL TIME

RISE TI ME

VIN(V p-p)

Figure 16. Rise Time and Fall Time vs. V

10

G=+1

9

R

=1kΩ

L

R

=0Ω

F

8

7

6

5

4

3

2

RISE TIME AND FALL TI ME (ns)

1

0

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

FALL TIME

RISE TI ME

VIN(V p-p)

Figure 17. Rise Time and Fall Time vs. V

01063-017

01063-018

IN

1063-019

IN

Rev. J | Page 7 of 16

AD8055/AD8056

–

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

ERROR (%)

–0.1

–0.2

–0.3

–0.4

–0.5

0 102030405060

TIME (ns)

V

=0VTO+2V OR

OUT

V

=0VTO–2V

OUT

G=+2
R

=100Ω

L

Figure 18. Settling Time

10

G=+2
R

=100Ω

9

L

R

=402Ω

F

8

7

6

5

4

3

2

RISE TIME AND FALL T IME (ns)

1

0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

Figure 19. Rise Time and Fall Time vs. V

5.0
G=+2

R

=1kΩ

4.5

L

R

=402Ω

F

4.0

3.5

3.0

2.5

2.0

1.5

1.0

RISE TIME AND FALL TIME (ns)

0.5

0

0 0.2 0.4 0.6 0.8 1.61.0 1.2 1.4

Figure 20. Rise Time and Fall Time vs. V

RISE TI ME

FALL TIME

VIN(V p-p)

IN

RISE TI ME

FALL TIME

VIN(V p-p)

IN

01063-020

01063-021

1063-022

10

G=+2

0

R

=402Ω

F

–10

–20

–30

–40

PSRR (dB)

–50

–60

–70

–80

–90

0.1 1 10 100 500

–PSRR

+PSRR

FREQUENCY (MHz)

Figure 21. PSRR vs. Frequency

V
G=+1
R

= 100Ω

L

V

=±5V

S

1V 50ns

IN

V

OUT

Figure 22. Overload Recovery

20

VIN=0dBm

–30

G=+2
R

=100Ω

L

R

=402Ω

–40

F

–50

–60

–70

–80

CROSSTALK (dB)

–90

–100

–110

–120

0.1 1 10 100 200

SIDE 2 DRIVEN

SIDE 1 DRIVEN

FREQUENCY (MHz)

Figure 23. Crosstalk (Output-to-Output) vs. Frequency

1063-023

01063-024

1063-025

Rev. J | Page 8 of 16

AD8055/AD8056

0

–10

–20

–30

–40

–50

–60

CMRR (dB)

–70

–80

–90

–100

OPEN-LOOP GAIN (dB)

–10

58Ω 402Ω

0.1 1 10 100 500

G=+2
R

= 100Ω

L

R

= 402Ω

F

V

=±5V

S

90

80

70

60

50

40

30

20

10

0

0.01 0.1 1 10 100 500

Figure 26. Open-Loop Gain vs. Frequency

402Ω

402Ω

402Ω

50Ω

FREQUENCY (MHz)

Figure 24. CMRR vs. Frequency

(1V/DIV)

V

IN

Figure 25. Overload Recovery

FREQUENCY (MHz)

V

OUT

50ns

(2V/DIV)

RL=100Ω

180

135

90

45

PHASE (Degrees)

0

–45

–90

10k 100k 1M 10M 100M 500M

01063-026

FREQUENCY (Hz)

01063-029

Figure 27. Phase vs. Frequency

0.04

0.02

0

–0.02

–0.04

DIFFERENTIAL GAIN (%)

01063-027

DIFFERENTIAL PHASE

1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH

0.04

0.02

0

–0.02

(Degrees)

–0.04

1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH

1 BACK TERMI NATED LO AD (150Ω)

G=+2
R

= 402Ω

F

1 BACK TERMI NATED LO AD (150Ω)

G=+2
R

= 402Ω

F

IRE

IRE

01063-030

Figure 28. Differential Gain and Differential Phase

0.04

4 VIDEO LOADS (37.5Ω)

0.02

0

G=+2

–0.02

R

= 402Ω

–0.04

DIFFERENTIAL GAIN (%)

–0.05

(Degrees)

–0.10

–0.15

01063-028

DIFFERENTIAL PHASE

F

1ST 2ND 3RD 4TH 5TH 6TH 7TH 8T H 9TH 10TH 11TH

0.15

4 VIDEO LOADS (37.5Ω)

0.10

0.05

0

G=+2
R

= 402Ω

F

1ST 2ND 3RD 4TH 5TH 6TH 7TH 8T H 9TH 10TH 11TH

IRE

IRE

01063-031

Figure 29. Differential Gain and Differential Phase

Rev. J | Page 9 of 16

AD8055/AD8056

V

5.0

4.5

4.0

3.5

3.0

(V)

2.5

OUT

±

2.0

1.5

1.0

0.5

0

–55 –35 –15 5 25 45 65 85 105 125

RL=1kΩ

RL=150Ω

TEMPERATURE (°C)

VS=±5V

RL=50Ω

1063-032

100

10

1

CURRENT NOISE (pA/ Hz)

0.1
10 100 1k 10k 100k 1M 10M 50M

FREQUENCY (Hz)

01063-034

Figure 30. Output Swing vs. Temperature

1000

100

10

VOLTAGE NOISE (nV/ Hz)

1

10 100 1k 10k 100k 1M 10M 50M

6nV/ Hz

FREQUENCY (Hz)

Figure 31. Voltage Noise vs. Frequency

45

40

35

30

25

| (Ω)

20

OUT

|Z

15

10

–5

01063-033

Figure 32. Current Noise vs. Frequency

G=+2
R

=402Ω

F

5

0

0.01 0.1 1 10 100 500
FREQUENCY (MHz)

Figure 33. Output Impedance vs. Frequency

01063-035

Rev. J | Page 10 of 16

AD8055/AD8056

TEST CIRCUITS

2

AD8055

3

–V

402Ω

4.7µF

+V

S

0.01µF

0.001µF

7

6

4

0.01µF

0.001µF

S

4.7µF

V

OUT

100Ω

HP8130A

PULSE

GENERATOR

T

=1ns

R/TF

4.7µF

+V

S

0.01µF

0.001µF

V

IN

100Ω

50Ω

3

AD8055

2

–V

7

4

S

6

4.7µF

0.01µF

0.001µF

V

OUT

100Ω

01063-006

HP8130A

PULSE

GENERATOR

T

=0.67ns

R/TF

V

IN

402Ω

57Ω

01063-009

Figure 34. G = +1, R

= 100 Ω

L

Figure 35. G = −1, R

= 100 Ω

L

Rev. J | Page 11 of 16

AD8055/AD8056

APPLICATIONS

FOUR-LINE VIDEO DRIVER

The AD8055 is a useful low cost circuit for driving up to four
video lines. For such an application, the amplifier is configured
for a noninverting gain of 2, as shown in

Figure 36. The input
video source is terminated in 75 Ω and is applied to the high
impedance noninverting input.

Each output cable is connected to the op amp output via a 75 Ω
series back termination resistor for proper cable termination.
The terminating resistors at the other ends of the lines divide
the output signal by 2, which is compensated for by the gain of 2
of the op amp stage.

For a single load, the differential gain error of this circuit was
measured as 0.01%, with a differential phase error of 0.02°. The
two load measurements were 0.02% and 0.03°, respectively. For
four loads, the differential gain error is 0.02%, while the
differential phase increases to 0.1°.

+5V

402Ω

2

AD8055

3

0.1µF 10µF

7

6

4

0.1µF

–5V

10µF

402Ω

V

IN

75Ω

75Ω

75Ω

75Ω

75Ω

Figure 36. Four-Line Video Driver

75Ω

75Ω

75Ω

75Ω

V

V

V

V

OUT1

OUT2

OUT3

OUT4

SINGLE-ENDED-TO-DIFFERENTIAL LINE DRIVER

Creating differential signals from single-ended signals is
required for driving balanced, twisted pair cables, differential
input ADCs, and other applications that require differential
signals. This can be accomplished by using an inverting and a
noninverting amplifier stage to create the complementary
signals.

The circuit shown in
used to make a single-ended-to-differential converter that offers
some advantages over the architecture previously mentioned.
Each op amp is configured for unity gain by the feedback
resistors from the outputs to the inverting inputs. In addition,
each output drives the opposite op amp with a gain of −1 by
means of the crossed resistors. The result of this is that the
outputs are complementary and there is high gain in the overall
configuration.

Feedback techniques similar to a conventional op amp are used
to control the gain of the circuit. From the noninverting input
of AMP1 to the output of AMP2 is an inverting gain.

Figure 37 shows how an AD8056 can be

01063-036

Between these points, a feedback resistor can be used to close
the loop. As in the case of a conventional op amp inverting gain
stage, an input resistor is added to vary the gain.

The gain of this circuit from the input to AMP1 output is R

/R

while the gain to the output of AMP2 is −R

. The circuit

F I

/R

F I

therefore creates a balanced differential output signal from a
single-ended input. The advantage of this circuit is that the gain
can be changed by changing a single resistor, while still
maintaining the balanced differential outputs.

R

F

402Ω

+5V

0.1µF

R

I

402Ω

V

IN

8

3

AMP1

2

402Ω

AD8056

402Ω

6

AMP2

5

75Ω

4

–5V

10µF

1

402Ω

402Ω

7

0.1µF 10µF

49.9Ω

49.9Ω

+V

OUT

–V

OUT

01063-037

Figure 37. Single-Ended-to-Differential Line Driver

LOW NOISE, LOW POWER PREAMP

The AD8055 makes a good, low cost, low noise, low power
preamp. A gain-of-10 preamp can be made with a feedback
resistor of 909 Ω and a gain resistor of 100 Ω, as shown in
Figure 38. The circuit has a −3 dB bandwidth of 20 MHz.

909Ω

+5V

100Ω

2

0.1µF 10µF

7

AD8055

3

4

R

S

0.1µF 10µF

–5V

Figure 38. Low Noise, Low Power Preamp with G = +10 and BW = 20 MHz

With a low source resistance (< approximately 100 Ω), the
major contributors to the input-referred noise of this circuit are
the input voltage noise of the amplifier and the noise of the
100  resistor. These are 6 nV/√Hz and 1.2 nV/√Hz, respectively.
These values yield a total input referred noise of 6.1 nV/√Hz.

+

6

V

OUT

1063-038

,

Rev. J | Page 12 of 16

AD8055/AD8056

V

POWER DISSIPATION LIMITS

With a 10 V supply (total VCC − VEE), the quiescent power
dissipation of the AD8055 in the SOT-23-5 package is 65 mW,
while the quiescent power dissipation of the AD8056 in the
MSOP-8 is 120 mW. This translates into a 15.6°C rise above the
ambient for the SOT-23-5 package and a 24°C rise for the
MSOP-8 package.

The power dissipated under heavy load conditions is
approximately equal to the supply voltage minus the output
voltage, times the load current, plus the quiescent power
previously computed. The total power dissipation is then
multiplied by the thermal resistance of the package to find the
temperature rise, above ambient, of the part. The junction
temperature should be kept below 150°C.

The AD8055 in the SOT-23-5 package can dissipate 270 mW,
while the AD8056 in the MSOP-8 package can dissipate
325 mW (at 85°C ambient) without exceeding the maximum
die temperature. In the case of the AD8056, this is greater than

1.5 V rms into 50 Ω, enough to accommodate a 4 V p-p sine
wave signal on both outputs simultaneously. However, because
each output of the AD8055 or AD8056 is capable of supplying
as much as 110 mA into a short circuit, a continuous short­circuit condition will exceed the maximum safe junction
temperature.

5

4

3

V

=0dBm

IN

2

1

0

–1

–2

NORMALIZE D GAIN (dB)

–3

–4

–5

0.3 1 10 100 500

402Ω

402Ω

C

L

50Ω

FREQUENCY (MHz)

100Ω

CL= 20pF

CL= 10pF

CL=30pF

CL=0pF

01063-039

Figure 39. Capacitive Load Drive

In general, to minimize peaking or to ensure the stability for
larger values of capacitive loads, a small series resistor, R
be added between the op amp output and the capacitor, C
the setup depicted in
C

was empirically derived and is shown in Figure 41. RS was

L

Figure 40, the relationship between RS and

, can

S

. For

L

chosen to produce less than 1 dB of peaking in the frequency
response. Note also that after a sharp rise, R

quickly settles to

S

approximately 25 Ω.

402Ω

+5V

RESISTOR SELECTION

Table 3 is a guide for resistor selection for maintaining gain
flatness vs. frequency for various values of gain.

Table 3.

Gain RF (Ω) RG (Ω) −3 dB Bandwidth (MHz)

+1 0 300
[phone]
+5 1 k 249 45
[phone]

DRIVING CAPACITIVE LOADS

When driving a capacitive load, most op amps exhibit peaking
in the frequency response just before the frequency rolls off.
Figure 39 shows the responses for an AD8056 running at a gain
of +2, with an 100 Ω load that is shunted by various values of
capacitance. It can be seen that under these conditions the part
is still stable with capacitive loads of up to 30 pF.

402Ω

2

AD8055

=0dBm

IN

3

50Ω

Figure 40. Setup for R

40

35

30

25

(Ω)

20

S

R

15

10

5

0

0 102030405060270

0.1µF 10µF

7

4

0.1µF 10µF

–5V

C

L

Figure 41. R

6

(pF)

vs. C

S L

vs. C

S L

R

S

FET PRO BE

V

OUT

C

L

01063-040

01063-041

Rev. J | Page 13 of 16

AD8055/AD8056

OUTLINE DIMENSIONS

0.400 (10.16)

0.365 (9.27)

0.355 (9.02)

0.210

(5.33)

0.150 (3.81)

0.130 (3.30)

0.115 (2.92)

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

8

1

PIN 1

MAX

0.070 (1.78)

0.060 (1.52)

0.045 (1.14)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

Figure 42. 8-Lead Plastic Dual In-Line Package [PDIP]

5

0.280 (7.11)

0.250 (6.35)

0.240 (6.10)

4

0.100 (2.54)
BSC

0.005 (0.13)
MIN

COMPLIANT TO JEDEC STANDARDS MS-001-BA

0.015
(0.38)
MIN

SEATING
PLANE

0.060 (1.52)

0.015 (0.38)
GAUGE

PLANE

MAX

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

0.430 (10.92)

Narrow Body (N-8)

Dimensions shown in inches and (millimeters)

MAX

0.195 (4.95)

0.130 (3.30)

0.115 (2.92)

0.014 (0.36)

0.010 (0.25)

0.008 (0.20)

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

0.25 (0.0098)

0.10 (0.0040)

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

85

1.27 (0.0500)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

BSC

6.20 (0.2440)

5.80 (0.2284)

41

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0196)

0.25 (0.0099)

8°

1.27 (0.0500)

0°

0.40 (0.0157)

Figure 43. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body (R-8)

Dimensions shown in millimeters and (inches)

× 45°

Rev. J | Page 14 of 16

AD8055/AD8056

3.20

3.00

2.80

8

5

4

SEATING
PLANE

5.15

4.90

4.65

1.10 MAX

0.23

0.08

8°
0°

0.80

0.60

0.40

3.20

3.00

2.80

PIN 1

0.95

0.85

0.75

0.15

0.00

COPLANARITY

1

0.65 BSC

0.38

0.22

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 44. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

2.90 BSC

1.60 BSC

1.30

1.15

0.90

0.15 MAX

5

123

PIN 1

COMPLIANT TO JEDEC STANDARDS MO-178-AA

1.90

BSC

0.50

0.30

4

0.95 BSC

2.80 BSC

1.45 MAX

SEATING
PLANE

0.22

0.08

10°

5°
0°

0.60

0.45

0.30

Figure 45. 5-Lead Small Outline Transistor Package [SOT-23]

(RJ-5)

Dimensions shown in millimeters

Rev. J | Page 15 of 16

AD8055/AD8056

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding

AD8055AN −40°C to +125°C 8-Lead PDIP N-8
AD8055ANZ
AD8055AR −40°C to +125°C 8-Lead SOIC_N R-8
AD8055AR-REEL −40°C to +125°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8055AR-REEL7 −40°C to +125°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8055ARZ
AD8055ARZ-REEL
AD8055ARZ-REEL7
AD8055ART-R2 −40°C to +85°C 5-Lead SOT-23, Reel RJ-5 H3A
AD8055ART-REEL −40°C to +85°C 5-Lead SOT-23, 13" Tape and Reel RJ-5 H3A
AD8055ART-REEL7 −40°C to +85°C 5-Lead SOT-23, 7" Tape and Reel RJ-5 H3A
AD8055ARTZ-R2
AD8055ARTZ-REEL7
AD8056AN −40°C to +125°C 8-Lead PDIP N-8
AD8056ANZ
AD8056AR −40°C to +125°C 8-Lead SOIC_N R-8
AD8056AR-REEL −40°C to +125°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8056AR-REEL7 −40°C to +125°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8056ARZ
AD8056ARZ-REEL
AD8056ARZ-REEL7
AD8056ARM −40°C to +125°C 8-Lead MSOP RM-8 H5A
AD8056ARM-REEL −40°C to +125°C 8-Lead MSOP, 13" Tape and Reel RM-8 H5A
AD8056ARM-REEL7 −40°C to +125°C 8-Lead MSOP, 7" Tape and Reel RM-8 H5A
AD8056ARMZ
AD8056ARMZ-REEL
AD8056ARMZ-REEL7

1

Z = Pb-free part, # denotes lead-free product may be top or bottom marked.

2

Prior to 0542, parts were branded H3A.

1

1

1

1

1

1

1

1

1

1

1

1

1

−40°C to +125°C 8-Lead PDIP N-8

−40°C to +125°C 8-Lead SOIC_N R-8

−40°C to +125°C 8-Lead SOIC_N, 13" Tape and Reel R-8

−40°C to +125°C 8-Lead SOIC_N, 7" Tape and Reel R-8

−40°C to +85°C 5-Lead SOT-23, Reel RJ-5 H3A

−40°C to +85°C 5-Lead SOT-23, 7" Tape and Reel RJ-5 H07

−40°C to +125°C 8-Lead PDIP N-8

−40°C to +125°C 8-Lead SOIC_N R-8

−40°C to +125°C 8-Lead SOIC_N, 13" Tape and Reel R-8

−40°C to +125°C 8-Lead SOIC_N, 7" Tape and Reel R-8

−40°C to +125°C 8-Lead MSOP RM-8 H5A#

−40°C to +125°C 8-Lead MSOP, 13" Tape and Reel RM-8 H5A#

−40°C to +125°C 8-Lead MSOP, 7" Tape and Reel RM-8 H5A#

2

©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C01063-0-2/06(J)

Rev. J | Page 16 of 16