ANALOG DEVICES AD 8027 ARZ Datasheet

Rail-to-Rail Input/Output Amplifiers
AD8027/AD8028
Rev. D Document Feedback
Trademarks and registered trademarks are the property of their respective owners.
Technical Support www.analog.com
DNC = DO NOT CO NNE C
T. DO NOT
CONNECT T
O THIS PIN.
DNC
1
–IN
2
+IN
3
–V
S
4
+V
S
V
OUT
DNC
8 7 6 5
DISABLE/SELECT
AD8027
03327-101
OUTPUT VOLTAGE (V p-p)
0 1 2 3 4 5 6 7 8 9 10
–140
–120
–100
–80
–60
–40
–20
SFDR (dB)
G = +1 FREQUENCY = 100kHz RL = 1k
VS = ±5V
VS = +3V
VS = +5V
03327-063
Data Sheet

FEATURES

High speed 190 MHz, −3 dB bandwidth (G = +1) 100 V/µs slew rate Low distortion
120 dBc at 1 MHz SFDR
80 dBc at 5 MHz SFDR Selectable input crossover threshold Low noise
4.3 nV/√Hz
1.6 pA/√Hz Low offset voltage: 900 µV maximum Low power: 6.5 mA per amplifier supply current Power-down mode No phase reversal: V Wide supply range: 2.7 V to 12 V Small packaging: 8-lead SOIC, 6-lead SOT-23, 10-lead MSOP Qualified for automotive applications (AD8028WARMZ-R7 only)

APPLICATIONS

Filters ADC drivers Level shifting Buffering Professional video Low voltage instrumentation

GENERAL DESCRIPTION

The AD8027/AD80281 are high speed amplifiers with rail-to-rail input and output that operate on low supply voltages and are optimized for high performance and a wide dynamic signal range. The AD8027/AD8028 have low noise (4.3 nV/√Hz, 1.6 pA/√Hz) and low distortion (120 dBc at 1 MHz). In applications that use a fraction of or use the entire input dynamic range and require low distortion, the AD8027/AD8028 are ideal choices.
Many rail-to-rail input amplifiers have an input stage that switches from one differential pair to another as the input signal crosses a threshold voltage, which causes distortion. The AD8027/AD8028 have a unique feature that allows the user to select the input crossover threshold voltage through the
DISABLE
(
DISABLE
to as
/SELECT x in the 10-lead MSOP, hereafter referred
/SELECT throughout this data sheet). This feature controls the voltage at which the complementary transistor input pairs switch. The AD8027/AD8028 also have intrinsically low crossover distortion.
1
Protected by U.S. patent numbers 6,486,737B1; 6,518,842B1.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
> |VS| + 200 mV
IN
DISABLE
/SELECT pin
Low Distortion, High Speed

PIN CONNECTION DIAGRAM

Figure 1. 8-Lead SOIC, AD8027
See the Pin Configurations and Function Descriptions section for additional pin configurations and information about the pin functions.
With their wide supply voltage range (2.7 V to 12 V) and wide bandwidth (190 MHz), the AD8027/AD8028 amplifiers are designed to work in a variety of applications where speed and performance are needed on low supply voltages. The high per­formance of the AD8027/AD8028 is achieved with a quiescent current of only 6.5 mA (typical) per amplifier. The AD8027/
AD8028 have a shutdown mode that is controlled via
DISABLE
the
/SELECT pin.
The AD8027/AD8028 are available in 8-lead SOIC, 6-lead SOT-23, and 10-lead MSOP packages. The AD8028WARMZ-R7 is an automotive grade version, qualified for automotive applications. See the Automotive Products section for more details. The
AD8027/AD8028 family is designed to work over the extended
temperature range of −40°C to +125°C.
Figure 2. SFDR vs. Output Voltage
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2003–2015 Analog Devices, Inc. All rights reserved.
AD8027/AD8028 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Connection Diagram ................................................................ 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 7
Maximum Power Dissipation ..................................................... 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ........................................... 10
Test Circ uit ...................................................................................... 19
Theory of Operation ...................................................................... 20
Input Stage ................................................................................... 20
Crossover Selection .................................................................... 20
Output Stage ................................................................................ 21
DC Errors .................................................................................... 21
Wideband Operation ..................................................................... 22
Circuit Considerations .............................................................. 22
Applications Information .............................................................. 24
Using the
Driving a 16-Bit ADC ................................................................ 24
Band-Pass Filter .......................................................................... 25
Design Tools and Technical Support ....................................... 25
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 27
Automotive Products ................................................................. 27
DISABLE
/SELECT Pin ............................................ 24

REVISION HISTORY

7/15—Rev. C to Rev. D
Changed SELECT to +V
, and VS− to −VS ....................................................... Throughout
S
Changes to Features Section, Figure 1, and General Description
Section ................................................................................................ 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Changes to Table 3 ............................................................................ 5
Added Pin Configurations and Function Descriptions Section 8 Added Figure 4, Figure 5, Table 5, and Table 6; Renumbered
Sequentially ....................................................................................... 8
Added Figure 6, Figure 7, Table 7, and Table 8 ............................. 9
Changes to Figure 10 Caption and Figure 13 Caption .............. 10
Changes to Figure 16 Caption and Figure 19 Caption .............. 11
Changes to Figure 20 Caption and Figure 21 ............................. 12
Changes to Figure 26 Caption....................................................... 13
Changes to Figure 36 and Figure 37............................................. 14
Changes to Figure 42 ...................................................................... 15
Changes to Figure 50 Caption....................................................... 17
Added Test Circuit Section and Figure 59 .................................. 19
Changes to Theory of Operation Section .................................... 20
Changes to Crossover Selection Section and Figure 61 ............ 21
Changes to Wideband Operation Section, Figure 62, Figure 63,
and Figure 64 ................................................................................... 22
Changes to PCB Layout Section ................................................... 23
DISABLE
/SELECT, NC to DNC, VS+ to
Changes to Using the
Table 6 .............................................................................................. 24
Changes to Figure 67 and Design Tools and Technical Support
Section .............................................................................................. 25
Updated Outline Dimensions ....................................................... 26
Changes to Ordering Guide .......................................................... 27
Added Automotive Products Section .......................................... 27
3/05—Rev. B to Rev. C
Updated Format .................................................................. Universal
Change to Figure 1 ............................................................................ 1
10/03—Rev. A to Rev. B
Changes to Figure 1 ........................................................................... 1
8/03—Rev. 0 to Rev. A
Addition of AD8028 ........................................................... Universal
Changes to General Description ..................................................... 1
Changes to Figure 1, Figure 3, Figure 4, Figure 8, Figure 13,
Figure 15, Figure 17 .......................................................... 1, 6, 7, 8, 9
Changes to Figure 58, Figure 60 ............................................. 18, 20
Changes to Specifications ................................................................. 3
Updated Outline Dimensions ....................................................... 22
Updated Ordering Guide .............................................................. 23
3/03—Revision 0: Initial Version
DISABLE
/SELECT Pin Section and
Rev. D | Page 2 of 27
Data Sheet AD8027/AD8028
OUT
MIN
MAX
OUT
MIN
MAX
OUT
Slew Rate
G = +1, V
OUT
= 2 V step
90 V/µs
OUT
OUT
OUT
OUT
MIN
MAX
AD8028W only: T
MIN
to T
MAX
900
µV
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
OUT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
OUT

SPECIFICATIONS

VS = ±5 V at TA = 25°C, RL = 1 kΩ to midsupply, G = +1, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, V
AD8028W only: T G = +1, V AD8028W only: T
Bandwidth for 0.1 dB Flatness G = +2, V
= 0.2 V p-p 138 190 MHz
to T
138 MHz
= 2 V p-p 20 32 MHz
to T
20 MHz
= 0.2 V p-p 16 MHz
G = −1, V
Settling Time to 0.1% G = +2, V
= 2 V step 100 V/µs
= 2 V step 35 ns
NOISE/DISTORTION PERFORMANCE
Spurious-Free Dynamic Range
fC = 1 MHz, V
= 2 V p-p, RF = 24.9 Ω 120 dBc
OUT
(SFDR)
fC = 5 MHz, V
= 2 V p-p, RF = 24.9 Ω 80 dBc Input Voltage Noise f = 100 kHz 4.3 nV/√Hz Input Current Noise f = 100 kHz 1.6 pA/√Hz Differential Gain Error NTSC, G = +2, RL = 150 Ω 0.1 % Differential Phase Error NTSC, G = +2, RL = 150 Ω 0.2 Degrees Crosstalk, Output to Output G = +1, RL = 100 Ω, V
= 2 V p-p, VS = ±5 V at 1 MHz −93 dB
DC PERFORMANCE
Input Offset Voltage
DISABLE
AD8028W only: T
DISABLE
Input Offset Voltage Drift T
/SELECT = tristate or open, PNP active 200 800 µV
to T
850 µV
/SELECT = high, NPN active 240 900 µV
to T
1.50 µV/°C Input Bias Current1 VCM = 0 V, NPN active 4 6 µA T AD8028W only: T
to T
4 µA
to T
6 µA VCM = 0 V, PNP active −8 −11 µA T AD8028W only: T Input Offset Current AD8028W only: T Open-Loop Gain V
to T
−8 µA to T
−11 µA
to T
±0.1 ±0.9 µA
= ±2.5 V, AD8028W only: T
to T
100 110 dB
INPUT CHARACTERISTICS
Input Impedance 6 MΩ Input Capacitance 2 pF Input Common-Mode Voltage
−5.2 to +5.2
V
Range Common-Mode Rejection Ratio VCM = ±2.5 V 90 110 dB AD8028W only: T
DISABLE
/SELECT PIN
to T
88 dB
Selection Input Voltage
Crossover Low T
Crossover High2 Tristate < ±20 µA, T Disable Input Voltage T Disable Switching Speed 50% of input to <10% of final V
to T
−3.0 V to T
−3.9 to −3.7 V
to T
−4.6 V
980 ns
Enable Switching Speed 45 ns
Rev. D | Page 3 of 27
AD8027/AD8028 Data Sheet
MIN
MAX
POWER SUPPLY
MIN
MAX
MIN
MAX
Power Supply Rejection Ratio
VS ± 1 V, AD8028W only: T
MIN
to T
MAX
90
110 dB
OUT
MIN
MAX
OUT
MIN
MAX
OUT
Slew Rate
G = +1, V
OUT
= 2 V step
85 V/µs
OUT
OUT
OUT
OUT
S
MIN
MAX
AD8028W only: T
MIN
to T
MAX
900
µV
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
OUT
MIN
MAX
Parameter Test Conditions/Comments Min Typ Max Unit
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
(Rising/Falling Edge) Output Voltage Swing AD8028W only: T Short-Circuit Output Sinking and sourcing 120 mA Off Isolation VIN = 0.2 V p-p, f = 1 MHz,
Capacitive Load Drive 30% overshoot 20 pF
Operating Range 2.7 12 V Quiescent Current per Amplifier 6.5 8.5 mA AD8028W only: T Quiescent Current (Disabled)
AD8028W only: T
1
No sign or a plus sign indicates current into the pin; a minus sign indicates current out of the pin.
2
It is recommended to float the
DISABLE
V
= 5 V at TA = 25°C, RL = 1 kΩ to midsupply, G = +1, unless otherwise noted.
S
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, V AD8028W only: T
G = +1, V AD8028W only: T
Bandwidth for 0.1 dB Flatness G = +2, V
VIN = +6 V to −6 V, G = −1 40/45 ns
to T
−4.9 to +4.9 −4.94 to +4.94 V
/SELECT = low −49 dB
9.5 mA
500 µA
to T
DISABLE
/SELECT = low 370 500 µA
to T
/SELECT pin for crossover high mode.
DISABLE
= 0.2 V p-p 131 185 MHz
to T
131 MHz
= 2 V p-p 18 28 MHz
to T
18 MHz
= 0.2 V p-p 12 MHz
G = −1, V Settling Time to 0.1% G = +2, V
= 2 V step 100 V/µs
= 2 V step 40 ns
NOISE/DISTORTION PERFORMANCE
Spurious-Free Dynamic Range (SFDR) fC = 1 MHz, V
fC = 5 MHz, V
= 2 V p-p, RF = 24.9 Ω 90 dBc
= 2 V p-p, RF = 24.9 Ω 64 dBc Input Voltage Noise f = 100 kHz 4.3 nV/√Hz Input Current Noise f = 100 kHz 1.6 pA/√Hz Differential Gain Error NTSC, G = +2, RL = 150 Ω 0.1 % Differential Phase Error NTSC, G = +2, RL = 150 Ω 0.2 Degrees Crosstalk, Output to Output G = +1, RL = 100 Ω, V
V
= ±5 V at 1 MHz
= 2 V p-p,
OUT
−92 dB
DC PERFORMANCE
Input Offset Voltage
DISABLE
AD8028W only: T
DISABLE
Input Offset Voltage Drift T
/SELECT = tristate or open, PNP active 200 800 µV
to T
850 µV
/SELECT = high NPN active 240 900 µV
to T
2 µV/°C Input Bias Current1 VCM = 2.5 V, NPN active 4 6 µA T AD8028W only: T
to T
4 µA
to T
6 µA VCM = 2.5 V, PNP active −8 −11 µA T AD8028W only: T Input Offset Current AD8028W only: T Open-Loop Gain V
to T
−8 µA to T
−11 µA
to T
±0.1 ±0.9 µA
= 1 V to 4 V, AD8028W only: T
Rev. D | Page 4 of 27
to T
96 105 dB
Data Sheet AD8027/AD8028
Common-Mode Rejection Ratio
VCM = 0 V to 2.5 V
90
105 dB
MIN
MAX
Selection Input Voltage
MIN
MAX
MIN
MAX
MIN
MAX
OUT
MIN
MAX
MIN
MAX
Quiescent Current (Disabled)
/SELECT = low
320
450
µA
MIN
MAX
MIN
MAX
OUT
MIN
MAX
OUT
MIN
MAX
OUT
OUT
OUT
OUT
OUT
OUT
Input Current Noise
f = 100 kHz
1.6 pA/√Hz
Parameter Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Input Impedance 6 MΩ Input Capacitance 2 pF Input Common-Mode Voltage Range −0.2 to +5.2 V
AD8028W only: T
DISABLE
/SELECT PIN
Crossover Low T
to T
2.0 V
Crossover High2 Tristate < ±20 µA, T
Disable Input Voltage T
to T
0.4 V
Disable Switching Speed 50% of input to <10% of final V
to T
84 dB
to T
1.1 to 1.3 V
1100 ns
Enable Switching Speed 50 ns
OUTPUT CHARACTERISTICS
Overdrive Recovery Time
VIN = −6 V to +1 V, G = −1 50/50 ns
(Rising/Falling Edge) Output Voltage Swing AD8028W only: T Off Isolation VIN = 0.2 V p-p, f = 1 MHz,
to T
0.08 to 4.92 0.04 to 4.96 V
DISABLE
/SELECT = low −49 dB Short-Circuit Current Sinking and sourcing 105 mA Capacitive Load Drive 30% overshoot 20 pF
POWER SUPPLY
Operating Range 2.7 12 V Quiescent Current per Amplifier 6 8.5 mA AD8028W only: T
to T
9 mA
DISABLE AD8028W only: T Power Supply Rejection Ratio VS ± 1 V, AD8028W only: T
1
No sign or a plus sign indicates current into the pin; a minus sign indicates current out of the pin.
2
It is recommended to float the
DISABLE
/SELECT pin for crossover high mode.
to T
450 µA
to T
90 105 dB
V
= 3 V at TA = 25°C, RL = 1 kΩ to midsupply, G = +1, unless otherwise noted.
S
Table 3.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, V AD8028W only: T
G = +1, V AD8028W only: T
Bandwidth for 0.1 dB Flatness G = +2, V Slew Rate G = +1, V G = −1, V Settling Time to 0.1% G = +2, V
= 0.2 V p-p 125 180 MHz
to T
125 MHz
= 2 V p-p 19 29 MHz
to T
19 MHz = 0.2 V p-p 10 MHz = 2 V step 73 V/µs = 2 V step 100 V/µs = 2 V step 48 ns
NOISE/DISTORTION PERFORMANCE
Spurious-Free Dynamic Range (SFDR) fC = 1 MHz, V
fC = 5 MHz, V
= 2 V p-p, RF = 24.9 Ω 85 dBc = 2 V p-p, RF = 24.9 Ω 64 dBc
Input Voltage Noise f = 100 kHz 4.3 nV/√Hz
Differential Gain Error NTSC, G = +2, RL = 150 Ω 0.15 % Differential Phase Error NTSC, G = +2, RL = 150 Ω 0.20 Degrees Crosstalk, Output to Output G = +1, RL = 100 Ω, V
= 2 V p-p, VS = 3 V at
OUT
−89 dB
1 MHz
Rev. D | Page 5 of 27
AD8027/AD8028 Data Sheet
MIN
MAX
AD8028W only: T
MIN
to T
MAX
900
µV
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
OUT
MIN
MAX
Common-Mode Rejection Ratio
VCM = 0 V to 1.5 V
88
100 dB
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
OUT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
Parameter Test Conditions/Comments Min Typ Max Unit
DC PERFORMANCE
Input Offset Voltage
DISABLE
AD8028W only: T
DISABLE
/SELECT = tristate or open, PNP active 200 800 µV
to T
850 µV
/SELECT = high NPN active 240 900 µV
Input Offset Voltage Drift T
to T
2 µV/°C Input Bias Current1 VCM = 1.5 V, NPN active 4 6 µA T AD8028W only: T
to T
4 µA
to T
6 µA VCM = 1.5 V, PNP active −8 −11 µA T AD8028W only: T
Input Offset Current AD8028W only: T Open-Loop Gain V
to T
−8 µA to T
−11 µA
to T
±0.1 ±0.9 µA
= 1 V to 2 V, AD8028W only: T
to T
90 100 dB
INPUT CHARACTERISTICS
Input Impedance 6 MΩ Input Capacitance 2 pF Input Common-Mode Voltage Range RL = 1 kΩ −0.2 to +3.2 V
AD8028W only: T
DISABLE
/SELECT PIN
to T
78 dB
Selection Input Voltage
Crossover Low T
Crossover High2 Tristate < ±20 µA, T Disable Input Voltage T Disable Switching Speed 50% of input to <10% of final V
to T
2.0 V to T
1.1 to 1.3 V
to T
0.4 V
1150 ns
Enable Switching Speed 50 ns
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
VIN = −4 V to +1 V, G = −1 55/55 ns
(Rising/Falling Edge)
Output Voltage Swing AD8028W only: T
to T
0.07 to 4.93 0.03 to 4.97 V Short-Circuit Current Sinking and sourcing 72 mA Off Isolation VIN = 0.2 V p-p, f = 1 MHz,
DISABLE
/SELECT = low −49 dB
Capacitive Load Drive 30% overshoot 20 pF
POWER SUPPLY
Operating Range 2.7 12 V Quiescent Current per Amplifier 6.0 8.0 mA AD8028W only: T Quiescent Current (Disabled)
DISABLE
/SELECT = low 300 420 µA
AD8028W only: T Power Supply Rejection Ratio VS ± 1 V, AD8028W only: T
1
No sign or a plus sign indicates current into the pin; a minus sign indicates current out of the pin.
2
It is recommended to float the
DISABLE
/SELECT pin for crossover high mode.
to T
9 mA
to T
420 µA
to T
88 100 dB
Rev. D | Page 6 of 27
Data Sheet AD8027/AD8028
Power Dissipation
See Figure 3
( )
L
OUT
L
OUTS
SS
D
R
V
R
V
V
IVP
2
2
 
 
×+×=
( )
( )
L
S
SS
D
R
V
IVP
2
4/
+×=
AMBIENT T E M P E RATURE (°C)
MAXIMUM POWER DISSIPATION (W)
–55 –35 –15 5 25 45 65 85 105 125
0
0.5
1.0
1.5
2.0
6-LEAD SOT-23
8-LEAD SOIC
10-LEAD MSOP
03327-002

ABSOLUTE MAXIMUM RATINGS

Table 4.
Parameter Rating
Supply Voltage 12.6 V
Common-Mode Input Voltage ±VS ± 0.5 V Differential Input Voltage ±1.8 V Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +125°C Lead Temperature Range (Soldering 10 sec) 300°C Junction Temperature 150°C
Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the AD8027/AD8028 package is limited by the associated rise in junction temperature (T
) on the die. The plastic encapsulating the die locally reaches
J
the junction temperature. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8027/AD8028. Exceeding a junction temperature of 175°C for an extended period of time can result in changes in the silicon devices, potentially causing failure.
The still air thermal properties of the package and PCB (θ ambient temperature (T package (P
) determine the junction temperature of the die.
D
The junction temperature can be calculated as
T
= TA + (PD × θJA)
J
The power dissipated in the package (P quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (V quiescent current (I midsupply, the total drive power is V dissipated in the package and some in the load (V The difference between the total drive power and the load power is the drive power dissipated in the package.
P
= Quiescent Power + (Total Drive PowerLoad Power)
D
), and the total power dissipated in the
A
). Assuming the load (RL) is referenced to
S
) is the sum of the
D
) times the
S
/2 × I
S
, some of which is
OUT
OUT
× I
),
JA
).
OUT
Rev. D | Page 7 of 27
It is recommended that rms output voltages be considered. If R is referenced to –V drive power is V
, as in single-supply operation, the total
S
× I
.
S
OUT
If the rms signal levels are indeterminate, consider the worst case, when V
= VS/4 for RL to midsupply.
OUT
In single-supply operation with R is V
= VS/2.
OUT
Airflow increases heat dissipation, effectively reducing θ
referenced to –VS, worst case
L
. Also,
JA
more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes reduces the θ
. Care must be taken to minimize parasitic capacitances
JA
at the input leads of high speed op amps, as described in the PCB Layout section.
Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8-lead SOIC (125°C/W), 6-lead SOT-23 (170°C/W), and 10-lead MSOP (130°C/W) packages on a JEDEC standard 4-layer board.

Output Short Circuit

Shorting the output to ground or drawing excessive current from the AD8027/AD8028 can cause catastrophic failure.
Figure 3. Maximum Power Dissipation vs. Ambient Temperature

ESD CAUTION

L
AD8027/AD8028 Data Sheet

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

AD8027
1
DNC
–IN
2
+IN
3
4
–V
S
DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
Figure 4. 8-Lead SOIC, AD8027 Pin Configuration
Table 5. 8-Lead SOIC, AD8027 Pin Function Descriptions
Pin No. Mnemonic Description
1, 5 DNC Do Not Connect. Do not connect to these pins. 2 −IN Negative Input.
3 +IN Positive Input. 4 −VS Negative Supply. 6 V
Output Voltage.
OUT
7 +VS Positive Supply 8
DISABLE
/SELECT Power-Down/Select. The power-down function places the device into low power
consumption mode. The select function of this pin shifts the crossover point (where the NPN/PNP input differential pairs transition from one to the other) closer to either the positive supply rail or the negative supply rail.
8
DISABLE/SELECT
+V
7
S
V
6
OUT
DNC
5
03327-001
1
V
OUT
2
–V
S
+IN
3
AD8027
+–
6
+V
S
5
DISABLE/SELECT
4
–IN
Figure 5. 6-Lead SOT-23, AD8027 Pin Configuration
Table 6. 6-Lead SOT-23, AD8027 Pin Function Descriptions
Pin No. Mnemonic Description
1 V
Output Voltage.
OUT
2 −VS Negative Supply. 3 +IN Positive Input. 4 −IN Negative Input. 5
DISABLE
/SELECT Power-Down/Select. The power-down function places the device into low power
consumption mode. The select function of this pin shifts the crossover point (where the NPN/PNP input differential pairs transition from one to the other) closer to either the positive supply rail or the negative supply rail.
6 +VS Positive Supply.
03327-102
Rev. D | Page 8 of 27
Data Sheet AD8027/AD8028
1
V
OUTA
–IN A
+IN A
2
+
3
–V
4
S
AD8028
Figure 6. 8-Lead SOIC, AD8028 Pin Configuration
Table 7. 8-Lead SOIC, AD8028 Pin Function Descriptions
Pin No. Mnemonic Description
1 V
Output Voltage, Channel A.
OUTA
2 −IN A Negative Input, Channel A. 3 +IN A Positive Input, Channel A. 4 −VS Negative Supply. 5 +IN B Positive Input, Channel B. 6 −IN B Negative Input, Channel B. 7 V
Output Voltage, Channel B.
OUTB
8 +VS Positive Supply.
1
V
OUTA
–IN A
2
+IN A
DISABLE/SELECT A
Figure 7. 10-Lead MSOP, AD8028 Pin Configuration
+
3
4
–V
S
AD8028
5
8
+V
S
V
7
OUTB
–IN B
6
+
+IN B
5
10
+V
S
9
V
OUTB
–IN B
8
+
+IN B
7
6
DISABLE/SELECT B
03327-103
03327-104
Table 8. 10-Lead MSOP, AD8028 Pin Function Descriptions
Pin No. Mnemonic Description
1 V
Output Voltage, Channel A.
OUTA
2 −IN A Negative Input, Channel A. 3 +IN A Positive Input, Channel A. 4 −VS Negative Supply. 5
DISABLE
/SELECT A Power-Down/Select, Channel A. The power-down function places the device into low power
consumption mode. The select function of this pin shifts the crossover point (where the NPN/PNP input differential pairs transition from one to the other) closer to either the positive supply rail or the negative supply rail.
6
DISABLE
/SELECT B Power-Down/Select, Channel B. The power-down function places the device into low power
consumption mode. The select function of this pin shifts the crossover point (where the NPN/PNP input differential pairs transition from one to the other) closer to either the positive
supply rail or the negative supply rail. 7 +IN B Positive Input, Channel B. 8 −IN B Negative Input, Channel B. 9 V
Output Voltage, Channel B.
OUTB
10 +VS Positive Supply.
Rev. D | Page 9 of 27
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