1 GHz, 5,500 V/s
a
FEATURES
Ultrahigh Speed
5,500 V/s Slew Rate, 4 V Step, G = +2
545 ps Rise Time, 2 V Step, G = +2
Large Signal Bandwidth
440 MHz, G = +2
320 MHz, G = +10
Small Signal Bandwidth (–3 dB)
1 GHz, G = +1
700 MHz, G = +2
Settling Time 10 ns to 0.1%, 2 V Step, G = +2
Low Distortion over Wide Bandwidth
SFDR
–66 dBc @ 20 MHz, Second Harmonic
–75 dBc @ 20 MHz, Third Harmonic
Third Order Intercept (3IP)
26 dBm @ 70 MHz, G = +10
Good Video Specifications
Gain Flatness 0.1 dB to 75 MHz
0.01% Differential Gain Error, R
0.01 Differential Phase Error, R
High Output Drive
175 mA Output Load Drive
10 dBm with –38 dBc SFDR @ 70 MHz, G = +10
Supply Operation
+5 V to 5 V Voltage Supply
14 mA (Typ) Supply Current
APPLICATIONS
Pulse Amplifier
IF/RF Gain Stage/Amplifiers
High Resolution Video Graphics
High Speed Instrumentations
CCD Imaging Amplifier
2
1
0
–1
VO = 2V p-p
–2
–3
–4
–5
NORMALIZED GAIN (dB)
–6
–7
–8
1
FREQUENCY RESPONSE (MHz)
Figure 1. Large Signal Frequency Response; G = +2 and +10
REV. F
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
= 150
L
= 150
L
G = +10
= 200
R
F
= 100
R
L
100
G = +2
= 301
R
F
= 150
R
L
100010
Low Distortion Amplifier
AD8009
FUNCTIONAL BLOCK DIAGRAMS
8-Lead Plastic SOIC (R-8) 5-Lead SOT-23 (RT-5)
AD8009
1
NC
2
–IN
3
+IN
–V
4
S
NC = NO CONNECT
NC
8
7
+V
S
6
OUT
NC
5
V
PRODUCT DESCRIPTION
The AD8009 is an ultrahigh speed current feedback amplifier
with a phenomenal 5,500 V/µs slew rate that results in a rise
time of 545 ps, making it ideal as a pulse amplifier.
The high slew rate reduces the effect of slew rate limiting and
results in the large signal bandwidth of 440 MHz required for
high resolution video graphic systems. Signal quality is maintained over a wide bandwidth with worst-case distortion of
–40 dBc @ 250 MHz (G = +10, 1 V p-p). For applications with
multitone signals, such as IF signal chains, the third order
intercept (3IP) of 12 dBm is achieved at the same frequency. This
distortion performance coupled with the current feedback
architecture make the AD8009 a flexible component for a gain
stage amplifier in IF/RF signal chains.
The AD8009 is capable of delivering over 175 mA of load current
and will drive four back terminated video loads while maintaining
low differential gain and phase error of 0.02% and 0.04°,
respectively. The high drive capability is also reflected in the
ability to deliver 10 dBm of output power @ 70 MHz with
–38 dBc SFDR.
The AD8009 is available in a small SOIC package and will
operate over the industrial temperature range –40°C to +85°C.
The AD8009 is also available in an SOT-23-5 and will operate
over the commercial temperature range of 0°C to 70°C.
–30
G = 2
= 301
R
F
–40
= 2V p-p
V
O
–50
–60
–70
DISTORTION (dBc)
–80
–90
–100
1
SECOND
150 LOAD
FREQUENCY RESPONSE (MHz)
SECOND
100 LOAD
THIRD
150 LOAD
Figure 2. Distortion vs. Frequency; G = +2
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved.
AD8009
1
OUT
2
–V
S
34
+IN
THIRD
100 LOAD
5
7010
+V
–IN
S
AD8009–SPECIFICATIONS
(@ TA = 25C, VS = 5 V, RL = 100 ; for R Package: RF = 301 for G = +1, +2,
RF = 200 for G = +10; for RT Package: RF = 332 for G = +1, RF = 226 for G = +2 and RF = 191 for G = +10, unless otherwise noted.)
AD8009AR/JRT
Model Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth, V
R Package G = +1, R
RT Package G = +1, R
= 0.2 V p-p
O
= 301 Ω 1,000 MHz
F
= 332 Ω 845 MHz
F
G = +2 480 700 MHz
G = +10 300 350 MHz
Large Signal Bandwidth, V
= 2 V p-p G = +2 390 440 MHz
O
G = +10 235 320 MHz
Gain Flatness 0.1 dB, V
Slew Rate G = +2, R
Settling Time to 0.1% G = +2, R
= 0.2 V p-p G = +2, RL = 150 Ω 45 75 MHz
O
= 150 Ω, 4 V Step 4,500 5,500 V/µs
L
= 150 Ω, 2 V Step 10 ns
L
G = +10, 2 V Step 25 ns
Rise and Fall Time G = +2, RL = 150 Ω, 4 V Step 0.725 ns
HARMONIC/NOISE PERFORMANCE
Second Harmonic G = +2, V
= 2 V p-p 10 MHz –73 dBc
O
20 MHz –66 dBc
70 MHz –56 dBc
Third Harmonic 10 MHz –77 dBc
20 MHz –75 dBc
70 MHz –58 dBc
Third Order Intercept (3IP) 70 MHz 26 dBm
W.R.T. Output, G = +10 150 MHz 18 dBm
250 MHz 12 dBm
Input Voltage Noise f = 10 MHz 1.9 nV/√Hz
Input Current Noise f = 10 MHz, +In 46 pA/√Hz
f = 10 MHz, –In 41 pA/√Hz
Differential Gain Error NTSC, G = +2, R
NTSC, G = +2, R
Differential Phase Error NTSC, G = +2, R
= 150 Ω 0.01 0.03 %
L
= 37.5 Ω 0.02 0.05 %
L
= 150 Ω 0.01 0.03 Degrees
L
NTSC, G = +2, RL = 37.5 Ω 0.04 0.08 Degrees
DC PERFORMANCE
Input Offset Voltage 25 mV
T
MIN
to T
MAX
7mV
Offset Voltage Drift 4 µV/°C
–Input Bias Current 50 150 ±µA
to T
T
MIN
MAX
75 ±µA
+Input Bias Voltage 50 150 ±µA
to T
T
MIN
MAX
75 ±µA
Open-Loop Transresistance 90 250 kΩ
T
MIN
to T
MAX
170 kΩ
INPUT CHARACTERISTICS
Input Resistance +Input 110 kΩ
–Input 8 Ω
Input Capacitance +Input 2.6 pF
Input Common-Mode Voltage Range 3.8 ±V
Common-Mode Rejection Ratio VCM = ±2.5 50 52 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing ±3.7 ±3.8 V
Output Current R
= 10 Ω, PD Package = 0.7 W 150 175 mA
L
Short-Circuit Current 330 mA
POWER SUPPLY
Operating Range +5 ±6V
Quiescent Current 14 16 mA
to T
T
MIN
MAX
18 mA
Power Supply Rejection Ratio VS = ±4 V to ±6 V 64 70 dB
Specifications subject to change without notice.
–2–
REV. F
AD8009
(@ TA = 25C, VS = 5 V, RL = 100 , for R Package: RF = 301 for G = +1, +2,
SPECIFICATIONS
Model Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth, V
Large Signal Bandwidth, V
Gain Flatness 0.1 dB, V
Slew Rate G = +2, R
Settling Time to 0.1% G = +2, R
Rise and Fall Time G = +2, RL = 150 Ω, 4 V Step 0.725 ns
HARMONIC/NOISE PERFORMANCE
Second Harmonic G = +2, V
Third Harmonic 10 MHz –76 dBc
Input Voltage Noise f = 10 MHz 1.9 nV/√Hz
Input Current Noise f = 10 MHz, +In 46 pA/√Hz
DC PERFORMANCE
Input Offset Voltage 14 mV
–Input Bias Current 50 150 ±µA
+Input Bias Voltage 50 150 ±µA
INPUT CHARACTERISTICS
Input Resistance +Input 110 kΩ
Input Capacitance +Input 2.6 pF
Input Common-Mode Voltage Range 1.2 to 3.8 V
Common-Mode Rejection Ratio VCM = 1.5 V to 3.5 V 50 52 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing 1.1 to 3.9 V
Output Current R
Short-Circuit Current 330 mA
POWER SUPPLY
Operating Range +5 ±6V
Quiescent Current 10 12 mA
Power Supply Rejection Ratio VS = 4.5 V to 5.5 V 64 70 dB
Specifications subject to change without notice.
O
RF = 200 for G = +10).
AD8009AR/JRT
= 0.2 V p-p
O
G = +1, R
= 301 Ω 630 MHz
F
G = +2 430 MHz
G = +10 300 MHz
= 2 V p-p G = +2 365 MHz
O
G = +10 250 MHz
= 0.2 V p-p G = +2, RL = 150 Ω 65 MHz
= 150 Ω, 4 V Step 2,100 V/µs
L
= 150 Ω, 2 V Step 10 ns
L
G = +10, 2 V Step 25 ns
= 2 V p-p 10 MHz –74 dBc
O
20 MHz –67 dBc
70 MHz –48 dBc
20 MHz –72 dBc
70 MHz –44 dBc
f = 10 MHz, –In 41 pA/√Hz
–Input 8 Ω
= 10 Ω, PD Package = 0.7 W 175 mA
L
REV. F
–3–
AD8009
0
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Internal Power Dissipation
2
1
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . . . 0.75 W
Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . . ±V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±3.5 V
Output Short-Circuit Duration
. . . . . . . . . . . . . . . . . . . . . .Observe Power Derating Curves
Storage Temperature Range R Package . . . . –65°C to +125°C
Operating Temperature Range (A Grade) . . . –40°C to +85°C
Operating Temperature Range (J Grade) . . . . . . . 0°C to 70°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead SOIC Package: θJA = 155°C/W.
5-Lead SOT-23 Package: θJA = 240°C/W.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the AD8009
is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices
is determined by the glass transition temperature of the plastic,
approximately 150°C. Exceeding this limit temporarily may cause
a shift in parametric performance due to a change in the stresses
exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure.
While the AD8009 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure
proper operation, it is necessary to observe the maximum power
derating curves.
2.0
TJ = 150 C
1.5
8-LEAD SOIC PACKAGE
1.0
0.5
MAXIMUM POWER DISSIPATION (W)
5-LEAD SOT-23 PACKAGE
0
–50
AMBIENT TEMPERATURE (ⴗC)
9
80
706050403020100–40 –30 –20 –10
Figure 3. Plot of Maximum Power Dissipation vs.
Temperature
ORDERING GUIDE
Temperature Package Package
Model Range Description Option Branding
AD8009AR –40°C to +85°C 8-Lead SOIC R-8
AD8009AR-REEL –40°C to +85°C 8-Lead SOIC R-8
AD8009AR-REEL7 –40°C to +85°C 8-Lead SOIC R-8
AD8009ARZ* –40°C to +85°C 8-Lead SOIC R-8
AD8009ARZ-REEL* –40°C to +85°C 8-Lead SOIC R-8
AD8009ARZ-REEL7* –40°C to +85°C 8-Lead SOIC R-8
AD8009JRT-R2 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ
AD8009JRT-REEL 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ
AD8009JRT-REEL7 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ
AD8009JRTZ-REEL* 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ
AD8009JRTZ-REEL7* 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ
AD8009ACHIPS Die
*Z = Pb-free part.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8009 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. F
Typical Performance Characteristics–
AD8009
3
2
1
0
R PACKAGE
–1
R
L
V
–2
O
G = +1, +2: R
–3
G = +10: R
RT PACKAGE
–4
G = +1: R
NORMALIZED GAIN (dB)
G = +2: R
–5
G = +10: RF = 191⍀
–6
–7
1
:
= 100⍀
= 200mV p–p
F
= 200⍀
F
= 332⍀
F
= 226⍀
F
G = +1, RT
G = +2, R AND RT
= 301⍀
G = +10, R AND RT
:
10 10 0
FREQUENCY (MHz)
G = +1, R
1000
TPC 1. Frequency Response; G = +1, +2, +10,
R and RT Packages
8
7
6
5
G = +2
4
= 301⍀
R
3
GAIN (dB)
2
1
0
–1
–2
R
V
F
= 150⍀
L
AS SHOWN
O
FREQUENCY (MHz)
4V p-p
2V p-p
1001 100010
TPC 2. Large Signal Frequency Response; G = +2
6.2
6.1
6.0
5.9
G = +2
R
= 301⍀
5.8
F
= 150⍀
R
L
5.7
= 200mV p-p
V
O
5.6
5.5
GAIN FLATNESS (dB)
5.4
5.3
5.2
10 1001
FREQUENCY (MHz)
TPC 4. Gain Flatness; G = +2
0.4
G = +2
= 301⍀
R
0.3
0.2
0.1
0
–0.1
GAIN FLATNESS (dB)
–0.2
–0.3
110100 1000 10000
FREQUENCY (MHz)
F
= 150⍀
R
L
= 200mV p-p
V
O
= 5V
V
S
TPC 5. Gain Flatness; G = +2; VS = 5 V
1000
8
7
6
5
4
3
GAIN (dB)
2
1
0
–1
–2
G = +2
= 301⍀
R
F
= 150⍀
R
L
= 2V p–p
V
O
FREQUENCY (MHz)
–40ⴗC
1001 100010
TPC 3. Large Signal Frequency Response vs.
Temperature; G = +2
REV. F
+85ⴗC
+85ⴗC
–40ⴗC
–5–
22
21
20
19
18
17
GAIN (dB)
16
15
14
13
12
G = +10
R
= 200⍀
F
RL = 100⍀
AS SHOWN
V
O
4V p-p
1001 100010
FREQUENCY (MHz)
2V p-p
TPC 6. Large Signal Frequency Response; G = +10
AD8009
22
21
20
19
18
17
GAIN (dB)
16
15
14
13
12
G = +10
= 200⍀
R
F
RL = 100⍀
= 2V p-p
V
O
FREQUENCY (MHz)
1001 100010
–40ⴗC
+85ⴗC
TPC 7. Large Signal Frequency Response vs.
Temperature; G = +10
–30
G = 2
–40
R
= 301⍀
F
= 2V p-p
V
O
–50
–60
–70
DISTORTION (dBc)
–80
–90
–100
11070
SECOND,
150⍀ LOAD
FREQUENCY RESPONSE (MHz)
SECOND,
100⍀ LOAD
THIRD,
150⍀ LOAD
THIRD,
100⍀ LOAD
TPC 8. Distortion vs. Frequency; G = +2
–35
250MHz
–40
–45
–50
–55
–60
–65
–70
DISTORTION (dBc)
–75
–80
–85
–10 12–6 –4 –2 0 2 4 6 8 10 14
–8
70MHz
P
OUT
(dBm)
22.1⍀
50⍀
5MHz
200⍀
50⍀
50⍀
TPC 10. Second Harmonic Distortion vs. P
0.02
G = +2
= 301⍀
R
0.01
0.00
–0.01
DIFF GAIN (%)
–0.02
0.10
0.05
–0.00
–0.05
–0.10
DIFF PHASE (Degrees)
0
G = +2
= 301⍀
R
F
0
F
RL = 37.5⍀
IRE
RL = 37.5⍀
RL = 150⍀
IRE
TPC 11. Differential Gain and Phase
P
OUT
; (G = +10)
OUT
RL = 150⍀
100
100
–20
G = +2
= 301⍀
R
–30
–40
–50
DISTORTION (dBc)
–60
–70
–80
F
= 100⍀
R
L
= 2V p-p
V
O
= 5V
V
S
1 200
10 100
FREQUENCY (MHz)
THIRD
SECOND
TPC 9. Distortion vs. Frequency; G = +2; VS = 5 V
–6–
–30
G = +1 0
–35
R
= 200⍀
F
–40
–45
–50
–55
–60
DISTORTION (dBc)
–65
–70
–75
–80
R
= 10 0⍀
L
V
= 2V p-p
O
SECOND
THIRD
FREQUENCY (MHz)
TPC 12. Distortion vs. Frequency; G = +10
70105
REV. F
AD8009
–35
–40
–45
–50
–55
–60
–65
–70
–75
DISTORTION (dBc)
–80
–85
–90
–95
–10 –8 12–6 –4 –2 0 2 4 6 8 10
250MHz
70MHz
5MHz
200⍀
22.1⍀
50⍀
P
(dBm)
OUT
TPC 13. Third Harmonic Distortion vs. P
50
45
40
35
30
200⍀
22.1⍀
50⍀
50⍀
50⍀
; (G = +10)
OUT
50⍀
P
OUT
50⍀
10
G = +2
= 301⍀
R
0
F
R
= 100⍀
L
100mV p-p ON TOP OF V
–10
–20
–30
PSRR (dB)
–40
–50
P
OUT
14
–60
–70
0.1 10010
0.03
S
–PSRR
+PSRR
1 500
FREQUENCY (MHz)
TPC 16. PSRR vs. Frequency
300
250
Hz)
200
150
25
INTERCEPT POINT (dBm)
20
15
10
10 250100
FREQUENCY (MHz)
TPC 14. Two Tone, Third Order IMD Intercept vs.
Frequency; G = +10
1M
100k
RL = 100⍀
10k
TRANSRESISTANCE (⍀)
1k
100
0.01 0.1 1001
GAIN
PHASE
FREQUENCY (MHz)
0
–40
–80
–120
–160
100010
TPC 15. Transresistance and Phase vs. Frequency
PHASE (Degrees)
100
INPUT CURRENT (pA/
50
0
10 100 250M1k 10k 100k 1M 10M 100M
NONINVERTING CURRENT
INVERTING CURRENT
FREQUENCY (Hz)
TPC 17. Current Noise vs. Frequency
–10
–15
–20
–25
–30
–35
CMRR (dB)
–40
–45
–50
–55
–60
VIN =
200mV p-p
301⍀
301⍀
154⍀
154⍀
FREQUENCY (MHz)
100⍀
V
O
1001 100010
TPC 18. CMRR vs. Frequency
REV. F
–7–
AD8009
100
10
G = +2
R
= 301⍀
F
2.0
1.8
1.6
1
0.1
OUTPUT RESISTANCE (⍀)
0.01
0.1 100101 500
0.03
FREQUENCY (MHz)
TPC 19. Output Resistance vs. Frequency
10
8
6
4
2
INPUT VOLTAGE NOISE (nV/ Hz)
0
10 100 250M1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
TPC 20. Voltage Noise vs. Frequency
1.4
(VSWR)
1.2
1.0
0
0.1 1 10 010
FREQUENCY (MHz)
500
TPC 22. Input VSWR; G = +10
20
18
16
14
12
10
MAX (dBm)
OUT
8
P
6
4
2
0
5 10010
R
50⍀
G = +10
R
R
F
G
50⍀
P
OUT
50⍀
FREQUENCY (MHz)
= 200⍀
F
G = +2
R
= 301⍀
F
250
TPC 23. Maximum Output Power vs. Frequency
25
20
15
G = +10
R
= 301⍀
F
R
= 100⍀
10
NOISE FIGURE (dB)
5
0
L
SOURCE RESISTANCE (⍀)
100101 500
TPC 21. Noise Figure
–8–
–20
–30
G = +10
R
= 200⍀
F
–40
–50
–60
(dB)
12
S
–70
–80
–90
FREQUENCY (MHz)
1001 100010
TPC 24. Reverse Isolation (S12); G = +10
REV. F
AD8009
2.2
C
2.0
49.9
1.8
1.6
22.1
(VSWR)
1.4
1.2
1.0
0
0.1 1 10010
COMP
49.9
200
FREQUENCY (MHz)
TPC 25. Output VSWR; G = +10
100
90
10
0%
V
OUT
V
= 2V
IN
STEP
2V
2V
C
COMP
C
COMP
250ns
= 0pF
= 3pF
G = +10
= 200
R
F
= 100
R
L
500
G = +2
= 301
R
F
R
= 150
L
= 2V p-p
V
O
500mV
1ns
TPC 28. 2 V Transient Response; G = +2
G = +2
= 301
R
F
= 150
R
L
= 4V p-p
V
O
TPC 26. Overdrive Recovery; G = +10
G = +2
R
= 301
F
= 150
R
L
= 200mV p-p
V
O
50mV
1ns
TPC 27. 2 V Transient Response; G = +2
1.5ns1V
TPC 29. 4 V Transient Response; G = +2
G = +10
= 200
R
F
= 100
R
L
VO = 200mV p-p
50mV
2ns
TPC 30. Small Signal Transient Response; G = +10
REV. F
–9–
AD8009
500mV
G = +10
R
= 200⍀
F
= 100⍀
R
L
= 2V p-p
V
O
2ns
V
O
VS = 5V
G = +2
R
= 301⍀
F
= 150⍀
R
L
50mV 1ns
= 200mV p-p
V
O
TPC 31. 2 V Transient Response; G = +10
G = +10
R
= 200⍀
F
= 100⍀
R
L
= 4V p-p
V
O
1V
3ns
TPC 32. 4 V Transient Response; G = +10
V
O
TPC 34. 2 V Transient Response; VS = 5 V; G = +2
8
7
6
5
4
(dB)
3
GAIN
2
1
0
–1
= 2pF
C
A
3dB/div
C
= 1pF
A
1dB/div
C
= 0pF
A
1dB/div
V
= 200mV p–p
A
50⍀
499⍀
499⍀
10
OUT
100⍀
V
OUT
100
V
IN
C
1
FREQUENCY (MHz)
12
9
6
3
0
–3
–6
–9
–12
–15
1000
TPC 35. Small Signal Frequency Response vs.
Parasitic Capacitance
CA = 1pF
CA = 2pF
CA = 0pF
V
50⍀
C
V
V
IN
A
OUT
= ⴞ5V
S
V
OUT
100⍀
499⍀
499⍀
= 200mV p–p
GAIN (dB)
VS = 5V
G = +2
= 301⍀
R
F
= 150⍀
R
50mV 1ns
L
V
= 200mV p-p
O
TPC 33. Small Signal Transient Response;
= 5 V; G = +2
V
S
–10–
40mV
1.5ns
TPC 36. Small Signal Pulse Response vs.
Parasitic Capacitance
REV. F
AD8009
HP8753D
Z
0.1F
49.9
0.1F
= 50
IN
+
10F
10F
+
WAVETEK 5201
BPF
49.9
3
2
301
+5V
7
–5V
AD8009
6
4
301
= 50
Z
OUT
0.001F
0.001F
TPC 37. AD8009 Driving a Band-Pass RF Filter
APPLICATIONS
All current feedback op amps are affected by stray capacitance
on their –INPUT. TPCs 35 and 36 illustrate the AD8009’s
response to such capacitance.
TPC 35 shows the bandwidth can be extended by placing a
capacitor in parallel with the gain resistor. The small signal pulse
response corresponding to such an increase in capacitance/bandwidth is shown in TPC 36.
As a practical consideration, the higher the capacitance on the
–INPUT to GND, the higher R
needs to be to minimize
F
peaking/ringing.
RF Filter Driver
The output drive capability, wide bandwidth, and low distortion
of the AD8009 are well suited for creating gain blocks that can
drive RF filters. Many of these filters require that the input be
driven by a 50 Ω source, while the output must be terminated in
50 Ω for the filters to exhibit their specified frequency response.
0
–10
–20
–30
–40
–50
–60
REJECTION (dB)
–70
–80
–90
CENTER 50.000 MHz SPAN 80.000 MHz
AD8009
G = 2
R
= RG= 301
F
DRIVING
WAVETEK 5201
TUNABLE BPF
f
= 50MHz
C
TPC 38. Frequency Response of Band-Pass Filter Circuit
TPC 37 shows a circuit for driving and measuring the frequency
response of a filter, a Wavetek 5201 tunable band-pass filter that
is tuned to a 50 MHz center frequency. The HP8753D network
provides a stimulus signal for the measurement. The analyzer has
a 50 Ω source impedance that drives a cable that is terminated in
50 Ω at the high impedance noninverting input of the AD8009.
The AD8009 is set at a gain of +2. The series 50 Ω resistor at the
output, along with the 50 Ω termination provided by the filter and
its termination, yield an overall unity gain for the measured
path. The frequency response plot of TPC 38 shows the circuit
to have an insertion loss of 1.3 dB in the pass band and about
75 dB rejection in the stop band.
REV. F
–11–
AD8009
ADV7160/
ADV7162
I
I
I
OUT
OUT
OUT
75 COAX
R
+
10F
75 COAX
+
RED
GREEN
BLUE
RED
10F0.1F
GREEN
75
G
75
B
75
5V
0.1F
7
3
AD8009
2
301
3
AD8009
2
301
301
301
–5V
75
6
4
75
6
75
75
75
75
75
PRIMARY MONITOR
ADDITIONAL MONITOR
3
AD8009
2
301
6
301
Figure 4. Driving an Additional High Resolution Monitor Using Three AD8009s
RGB Monitor Driver
High resolution computer monitors require very high full power
bandwidth signals to maximize their display resolution. The
RGB signals that drive these monitors are generally provided by
a current-out RAMDAC that can directly drive a 75 Ω doubly
terminated line.
There are times when the same output wants to be delivered to
additional monitors. The termination provided internally by
each monitor prohibits the ability to simply connect a second
monitor in parallel with the first. Additional buffering must be
provided.
Figure 4 shows a connection diagram for two high resolution
monitors being driven by an ADV7160 or ADV7162, a 220 MHz
(Megapixel per second) triple RAMDAC. This pixel rate
requires a driver whose full power bandwidth is at least half the
pixel rate or 110 MHz. This is to provide good resolution for a
worst-case signal that swings between zero scale and full scale
on adjacent pixels.
75
BLUE
75
The primary monitor is connected in the conventional fashion
with a 75 Ω termination to ground at each end of the 75 Ω
cable. Sometimes this configuration is called “doubly terminated” and is used when the driver is a high output impedance
current source.
For the additional monitor, each of the RGB signals close to the
RAMDAC output is applied to a high input impedance, noninverting input of an AD8009 that is configured for a gain of +2. The
outputs each drive a series 75 Ω resistor, cable, and termination
resistor in the monitor that divides the output signal by two, thus
providing an overall unity gain. This scheme is referred to as
“back termination” and is used when the driver is a low output
impedance voltage source. Back termination requires that the
voltage of the signal be double the value that the monitor sees.
Double termination requires that the output current be double the
value that flows in the monitor termination.
–12–
REV. F
AD8009
Driving a Capacitive Load
A capacitive load, like that presented by some A/D converters,
can sometimes be a challenge for an op amp to drive depending
on the architecture of the op amp. Most of the problem is caused
by the pole created by the output impedance of the op amp and
the capacitor that is driven. This creates extra phase shift that
can eventually cause the op amp to become unstable.
One way to prevent instability and improve settling time when
driving a capacitor is to insert a resistor in series between the
op amp output and the capacitor. The feedback resistor is still
connected directly to the output of the op amp, while the series
resistor provides some isolation of the capacitive load from the
op amp output.
G = +2: RF = 301 = R
G = +10: RF = 200, RG = 22.1
G
R
49.9
T
R
+5V
+
10F
0.001F
3
7
AD8009
2
R
G
6
4
F
–5V
0.1F
2V
STEP
R
S
C
50pF
L
10F
0.1F0.001F
+
Figure 5. Capacitive Load Drive Circuit
Figure 5 shows such a circuit with an AD8009 driving a 50 pF
load. With R
gain of +2 and +10, it was found experimentally that setting R
= 0, the AD8009 circuit will be unstable. For a
S
S
to 42.2 Ω will minimize the 0.1% settling time with a 2 V step at
the output. The 0.1% settling time was measured to be 40 ns with
this circuit.
For smaller capacitive loads, a smaller R
settling time, while a larger R
will be required for larger capacitive
S
will yield optimal
S
loads. Of course, a larger capacitance will always require more
time for settling to a given accuracy than a smaller one, and this
will be lengthened by the increase in R
required. At best, a
S
given RC combination will require about seven time constants
by itself to settle to 0.1%, so a limit will be reached where too
large a capacitance cannot be driven by a given op amp and still
meet the system’s required settling time specification.
REV. F
–13–
AD8009
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
85
6.20 (0.2440)
5.80 (0.2284)
41
1.27 (0.0500)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
BSC
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
8
0
1.27 (0.0500)
0.40 (0.0157)
5-Lead Small Outline Transistor Package [SOT-23]
(RT-5)
Dimensions shown in millimeters
2.90 BSC
4 5
0.50
0.30
2.80 BSC
0.95 BSC
1.45 MAX
SEATING
PLANE
0.22
0.08
10
5
0
1.60 BSC
1.30
1.15
0.90
0.15 MAX
1 3
2
PIN 1
1.90
BSC
COMPLIANT TO JEDEC STANDARDS MO-178AA
45
0.60
0.45
0.30
–14–
REV. F
AD8009
Revision History
Location Page
9/04—Data Sheet changed from REV. E to REV. F.
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Change to TPC 37 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3/03—Data Sheet changed from REV. D to REV. E.
Updated Data Sheet Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Deleted AD8009EB from ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Inserted new TPC 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Inserted new TPC 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Inserted new TPC 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Inserted new TPCs 33 and 34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
REV. F
–15–
C01011–0–9/04(F)
–16–
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