0.5 mV Typical Input Offset Voltage
Small Packaging
SOIC-8, MSOP, and SC70 Packages Available
Hz Input Voltage Noise
√
Hz Input Inverting Current Noise
√
High Speed Amplifiers
AD8007/AD8008
CONNECTION DIAGRAMS
SOIC (RN-8)SC70 (KS-5)
AD8007
1
NC
(Top View)
2
–IN
3
+IN
–V
4
S
NC = NO CONNECT
8
NC
7
+V
6
V
5
NC
SOIC (RN) and MSOP (RM)
1
V
OUT1
–IN1
27
36
+IN1
–V
45
S
S
OUT
AD8008
(Top View)
V
1
OUT
–V
2
S
3
+IN
8
+V
V
–IN2
+IN2
AD8007
(Top View)
S
OUT2
5
+V
S
4
–IN
APPLICATIONS
Instrumentation
IF and Baseband Amplifiers
Filters
A/D Drivers
DAC Buffers
GENERAL DESCRIPTION
The AD8007 (single) and AD8008 (dual) are high performance current feedback amplifiers with ultralow distortion
and noise. Unlike other high performance amplifiers, the low
price and low quiescent current allow these amplifiers to be
used in a wide range of applications. ADI’s proprietary second
generation eXtra-Fast Complementary Bipolar (XFCB)
process enables such high performance amplifiers with low
power consumption.
The AD8007/AD8008 have 650 MHz bandwidth, 2.7 nV/√Hz
voltage noise, –83 dB SFDR @ 20 MHz (AD8007), and –77 dBc
SFDR @ 20 MHz (AD8008).
With the wide supply voltage range (5 V to 12 V) and wide bandwidth, the AD8007/AD8008 are designed to work in a variety of
applications. The AD8007/AD8008 amplifiers have a low power
supply current of 9 mA/amplifier.
The AD8007 is available in a tiny SC70 package as well as a
standard 8-lead SOIC. The dual AD8008 is available in both
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
8-lead SOIC and 8-lead MSOP packages. These amplifiers are
rated to work over the industrial temperature range of –40°C
to +85°C.
Figure 1. AD8007 Second and Third Harmonic
Distortion vs. Frequency
G = +1, V
Bandwidth for 0.1 dB FlatnessVo = 0.2 V p-p, G = +2, R
Overdrive Recovery Time2.5 V Input Step, G = +2, R
Slew RateG = +1, V
Settling Time to 0.1%G = +2, V
= 0.2 V p-p, RL = 1 kΩ520580MHz
O
= 0.2 V p-p, RL = 150 Ω350490MHz
O
= 0.2 V p-p, RL = 150 Ω190260MHz
O
= 1 V p-p, RL = 1 kΩ270320MHz
O
= 2 V Step665740V/µs
O
= 2 V Step18ns
O
= 150 Ω72120MHz
L
= 1 kΩ30ns
L
Settling Time to 0.01%G = +2, VO = 2 V Step35ns
NOISE/HARMONIC PERFORMANCE
Second HarmonicfC = 5 MHz, VO = 1 V p-p–96/–95dBc
= 20 MHz, VO = 1 V p-p–83/–80dBc
f
Third Harmonicf
IMDf
Third Order Interceptf
C
= 5 MHz, VO = 1 V p-p–100dBc
C
f
= 20 MHz, VO = 1 V p-p–85/–88dBc
C
= 19.5 MHz to 20.5 MHz, RL = 1 kΩ,–89/–87dBc
C
V
= 1 V p-p
O
= 5 MHz, RL = 1 kΩ43.0dBm
C
= 20 MHz, RL = 1 kΩ42.5/41.5dBm
f
C
Crosstalk (AD8008)Output to Output f = 5 MHz, G = +2–68dB
Input Voltage Noisef = 100 kHz2.7nV/√Hz
Input Current Noise–Input, f = 100 kHz22.5pA/√Hz
+Input, f = 100 kHz2pA/√Hz
DC PERFORMANCE
Input Offset Voltage0.54mV
Input Offset Voltage Drift3µV/°C
Input Bias Current+Input48µA
–Input0.76µA
Input Bias Current Drift+Input15nA/°C
–Input8nA/°C
TransimpedanceV
= 1.5 V to 3.5 V, RL = 1 kΩ0.51.3MΩ
O
RL = 150 Ω0.40.6MΩ
INPUT CHARACTERISTICS
Input Resistance+Input4MΩ
Input Capacitance+Input1pF
Input Common-Mode Voltage Range1.1 to 3.9V
Common-Mode Rejection RatioVCM = 1.75 V to 3.25 V5456dB
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (soldering 10 sec) . . . . . . . . . 300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8007/AD8008
packages is limited by the associated rise in junction temperature
) on the die. The plastic encapsulating the die will locally reach
(T
J
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic will change its properties. Even temporarily exceeding this temperature limit may
change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8007/
AD8008. Exceeding a junction temperature of 175°C for an
extended period of time can result in changes in the silicon
devices, potentially causing failure.
The still-air thermal properties of the package and PCB (θ
ambient temperature (T
package (P
) determine the junction temperature of the die.
D
), and the total power dissipated in the
A
),
JA
The junction temperature can be calculated as follows:
TT P
=+ ×
ADA
JJ
θ
()
The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package
due to the load drive for all outputs. The quiescent power is the
voltage between the supply pins (V
(I
). Assuming the load (RL) is referenced to midsupply, the
S
total drive power is V
/2 ⫻ I
S
package and some in the load (V
) times the quiescent current
S
, some of which is dissipated in the
OUT
OUT
⫻I
). The difference
OUT
between the total drive power and the load power is the drive
power dissipated in the package.
P
= quiescent power + (total drive power – load power):
D
PVI
=×
()
DSS
+×
VVRV
SOUT
2
L
2
OUT
−
R
L
RMS output voltages should be considered. If RL is referenced
to V
, as in single-supply operation, then the total drive power
S
is V
⫻ I
OUT
.
S
If the rms signal levels are indeterminate, then consider the
worst case, when V
= VS/4 for RL to midsupply:
OUT
V
S
4
PVI
=×
()
DSS
+
R
L
2
In single-supply operation, with RL referenced to VS, worst case is:
V
V
OUT
S
=
2
Airflow will increase heat dissipation, effectively reducing θJA.
Also, more metal directly in contact with the package leads from
metal traces, through holes, ground, and power planes will
reduce the θ
. Care must be taken to minimize parasitic capaci-
JA
tances at the input leads of high speed op amps as discussed in
the board layout section.
Figure 2 shows the maximum safe power dissipation in the package versus the ambient temperature for the SOIC-8 (125°C/
W),
MSOP (150°C/W), and SC70 (210°C/W) packages on a
JEDEC standard 4-layer board. θ
2.0
1.5
MSOP-8
1.0
SC70-5
0.5
MAXIMUM POWER DISSIPATION – W
0
–60100–40
–20020406080
AMBIENT TEMPERATURE – ⴗC
values are approximations.
JA
SOIC-8
Figure 2. Maximum Power Dissipation vs.
Temperature for a 4-Layer Board
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current for
the AD8007/AD8008 will likely cause catastrophic failure.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although the AD8007/
AD8008 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. C–4–
AD8007/AD8008
ORDERING GUIDE
ModelTemperature Range
AD8007AR+85ºC8-Lead SOICRN-8
AD8007AR-REEL+85ºC8-Lead SOICRN-8
AD8007AR-REEL7+85ºC8-Lead SOICRN-8
AD8007AKS-REEL+85ºC5-Lead SC70KS-5HTA
AD8007AKS-REEL7–40ºC to +85ºC5-Lead SC70KS-5HTA
AD8008AR –40ºC to +85ºC8-Lead SOICRN-8
AD8008AR-REEL7 –40ºC to +85ºC8-Lead SOICRN-8
AD8008AR-REEL –40ºC to +85ºC8-Lead SOICRN-8
AD8008ARM-REEL+85ºC8-Lead MSOPRM-8H2B
AD8008ARM-REEL7+85ºC8-Lead MSOPRM-8H2B