Datasheet AD8003 Datasheet (ANALOG DEVICES)

Triple, 1.5 GHz Op Amp

FEATURES

High speed

1650 MHz (G = +1)
730 MHz (G = +2, VO = 2 V p-p)
4300 V/μs (G = +2, 4 V step)
Settling time 12 ns to 0.1%, 2 V step

Excellent for QXGA resolution video

Gain flatness 0.1 dB to 190 MHz

0.05% differential gain error, R

0.01° differential phase error, R
Low voltage offset: 0.7 mV (typical)
Low input bias current: 7 μA (typical)
Low noise: 1.8 nV/√Hz
Low distortion over wide bandwidth: SFDR −73 dBc @ 20 MHz
High output drive: 100 mA output load drive
Supply operation: +5 V to ±5 V voltage supply
Supply current: 9.5 mA/amplifier

APPLICATIONS

High resolution video graphics
Professional video
Consumer video
High speed instrumentation
Muxing

GENERAL DESCRIPTION

The AD8003 is a triple ultrahigh speed current feedback amplifier.
Using ADI’s proprietary eXtra Fast Complementary Bipolar
(XFCB) process, the AD8003 achieves a bandwidth of 1.5 GHz
and a slew rate of 4300 V/μs. Additionally, the amplifier provides
excellent dc precision with an input bias current of 50 μA
maximum and a dc input voltage of 0.7 mV.

The AD8003 has excellent video specifications with a frequency
response that remains flat out to 190 MHz and 0.1% settling within
12 ns to ensure that even the most demanding video systems
maintain excellent fidelity. For applications that use NTSC video,
as well as high speed video, the amplifier provides a differential
gain of 0.05% and a differential gain of 0.01°.

The AD8003 has very low spurious-free dynamic range (SFDR)
(−73 dBc @ 20 MHz) and noise (1.8 nV/√Hz). With a supply
range between 5 V and 11 V and ability to source 100 mA of
output current, the AD8003 is ideal for a variety of applications.

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

= 150 Ω

L

= 150 Ω

L

AD8003

CONNECTION DIAGRAM

S2

FEEDBACK 2

+V

19

G=+5

+V

18

FEEDBACK 3

17

–IN 3

16

+IN 3

15

POWER DOWN 3

14

–V

13

G=+1

+V

FEEDBACK 1

–IN 1

+IN 1

POWER DOWN 1

–V

–VS2POWER DOWN 2

24 23 22 21 20

1

S1

2

3

4

5

6

S1

7 8 9 10 11 12

NC

+IN 2

–IN 2

OUT 1NCOUT 2NCOUT 3

Figure 1. 24-Lead, 4 mm × 4 mm LFCSP_VQ (CP-24)

The AD8003 operates on only 9.5 mA of supply current per
amplifier. The independent power-down function of the AD8003
reduces the quiescent current even further to 1.6 mA.

The AD8003 amplifier is available in a compact 4 mm × 4 mm,
24-lead LFCSP_VQ. The AD8003 is rated to work over the
industrial temperature range of −40°C to +85°C.

3

VS=±5V
G=+1,R

2

G=+2,+5,R
R

1

V

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-L OOP GAIN (dB)

–6

–7

1 100 1000

Figure 2. Large Signal Frequency Response for Various Gains

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2005–2008 Analog Devices, Inc. All rights reserved.

=150Ω

L
OUT

=432Ω

F

=2Vp-p

= 464Ω

F

10

FREQUENCY (MHz)

G=+2

S3

S3

05721-001

05721-009

AD8003

TABLE OF CONTENTS

Features .............................................................................................. 1

Gain Configurations .................................................................. 12

Applications ....................................................................................... 1 

Connection Diagram ....................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications with ±5 V Supply ..................................................... 3

Specifications with +5 V Supply ..................................................... 4

Absolute Maximum Ratings ............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution .................................................................................. 5

Typical Performance Characteristics ............................................. 6

Applications Information .............................................................. 12

REVISION HISTORY

9/08—Rev. A to Rev. B

Changes Applications Section ......................................................... 1

Changes to Ordering Guide .......................................................... 15

RGB Video Driver ...................................................................... 12

Printed Circuit Board Layout ....................................................... 13

Low Distortion Pinout ............................................................... 13

Signal Routing ............................................................................. 13

Exposed Paddle ........................................................................... 13

Power Supply Bypassing ............................................................ 13

Grounding ................................................................................... 14

Outline Dimensions ....................................................................... 15

Ordering Guide .......................................................................... 15

2/06—Rev. 0 to Rev. A

Changes to Figure 34 ...................................................................... 11

10/05—Revision 0: Initial Version

Rev. B | Page 2 of 16

AD8003

SPECIFICATIONS WITH ±5 V SUPPLY

TA = 25°C, VS = ±5 V, RL = 150 Ω, Gain = +2, RF = 464 Ω, unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

–3 dB Bandwidth G = +1, Vo = 0.2 V p-p, RF = 432 Ω 1650 MHz
G = +2, Vo = 2 V p-p 730 MHz
G = +10, Vo = 0.2 V p-p 290 MHz
G = +5, Vo = 2 V p-p 330 MHz
Bandwidth for 0.1 dB Flatness Vo = 2 V p-p 190 MHz
Slew Rate G = +2, Vo = 2 V step, RL = 150 Ω 3800 V/μs
Settling Time to 0.1% G = +2, Vo = 2 V step 12 ns
Overload Recovery Input/Output 30/40 ns

NOISE/HARMONIC PERFORMANCE

Second/Third Harmonic @ 5 MHz G = +1, Vo = 2 V p-p 76/97 dBc
Second/Third Harmonic @ 20 MHz G = +1, Vo = 2 V p-p 79/73 dBc
Input Voltage Noise f = 1 MHz 1.8 nV/√Hz

Input Current Noise (I−/I+) f = 1 MHz 36/3 pA/√Hz
Differential Gain Error NTSC, G = +2, RL= 150 Ω 0.05 %
Differential Phase Error NTSC, G = +2, RL= 150 Ω 0.01 Degree

DC PERFORMANCE

Input Offset Voltage −9.3 +0.7 +9.3 mV
T
Input Offset Voltage Drift 7.4 μV/°C
Input Bias Current +IB/−IB −19/−40 −7/−7 +4/+50 μA
T
Input Offset Current ±14.2 μA
Transimpedance Vo = ±2.5 V 400 600 1100 kΩ

INPUT CHARACTERISTICS

Noninverting Input Impedance 1.6/3 MΩ/pF
Input Common-Mode Voltage Range ±3.6 V
Common-Mode Rejection Ratio VCM = ±2.5 V −51 −48 −46 dB

OUTPUT CHARACTERISTICS

Output Voltage Swing RL = 150 Ω ±3.85 ±3.9 ±3.92 V
Linear Output Current VO = 2 V p-p, second harmonic < −50 dBc 100 mA
Capacitive Load Drive 40% over shoot 27 pF

POWER DOWN PINS

Power-Down Input Voltage Power down <VS − 2.5 V
Enable >VS − 2.5 V
Turn-Off Time

Turn-On Time

Input Current

Enabled 0.1 μA
Power-Down −365 −235 −85 μA

POWER SUPPLY

Operating Range 4.5 10 V
Quiescent Current per Amplifier Enabled 8.1 9.5 10.2 mA
Quiescent Current per Amplifier Power down 1.2 1.4 1.6 mA
Power Supply Rejection Ratio (+PSRR/−PSRR) −59/−57 −57/−53 −55/−50 dB

− T

MIN

MIN

1.08 mV

MAX

− T

(+IB/−IB) −3.8/+29.5 μA

MAX

50% of power-down voltage to
10% of V

final, VIN = 0.5 V p-p

OUT

50% of power-down voltage to
90% of V

final, VIN = 0.5 V p-p

OUT

40 ns

130 ns

Rev. B | Page 3 of 16

AD8003

SPECIFICATIONS WITH +5 V SUPPLY

TA = 25°C, VS = 5 V, RL = 150 Ω, Gain = +2, RF = 464 Ω, unless otherwise noted.

Table 2.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

–3 dB Bandwidth G = +1, Vo = 0.2 V p-p, RF = 432 Ω 1050 MHz
G = +2, Vo = 2 V p-p 590 MHz
G = +10, Vo = 0.2 V p-p 290 MHz
G = +5, Vo = 2 V p-p 310 MHz
Bandwidth for 0.1 dB Flatness Vo = 2 V p-p 83 MHz
Slew Rate G = +2, Vo = 2 V step, RL = 150 Ω 2860 V/μs
Settling Time to 0.1% G = +2, Vo = 2 V step 12 ns
Overload Recovery Input/Output 40/60 ns

NOISE/HARMONIC PERFORMANCE

Second/Third Harmonic @ 5 MHz G = +1, Vo = 2 V p-p 75/78 dBc
Second/Third Harmonic @ 20 MHz G = +1, Vo = 2 V p-p 66/61 dBc
Input Voltage Noise f = 1 MHz 1.8 nV/√Hz

Input Current Noise (I−/I+) f = 1 MHz 36/3 pA/√Hz
Differential Gain Error NTSC, G = +2, RL= 150 Ω 0.04 %
Differential Phase Error NTSC, G = +2, RL= 150 Ω 0.01 Degree

DC PERFORMANCE

Input Offset Voltage −6.5 +2.7 +11 mV
T
Input Offset Voltage Drift 14.2 μV/°C
Input Bias Current (+IB/−IB) −21/−50 −7.7/−2.3 +5/+48 μA
T
Input Offset Current ±5.4 μA
Transimpedance 300 530 1500 kΩ

INPUT CHARACTERISTICS

Noninverting Input Impedance 1.6/3 MΩ/pF
Input Common-Mode Voltage Range 1.3 to 3.7 V
Common-Mode Rejection Ratio −50 −48 −45 dB

OUTPUT CHARACTERISTICS

Output Voltage Swing RL = 150 Ω ±1.52 ±1.57 ±1.62 V
Linear Output Current VO = 2 V p-p, second harmonic < −50 dBc 70 mA
Capacitive Load Drive 45% over shoot 27 pF

POWER DOWN PINS

Power-Down Input Voltage Power down <VS − 2.5 V
Enable >VS − 2.5 V
Turn-Off Time

Turn-On Time

Input Current

Enabled 0.1 μA
Power-Down −160 −43 +80 μA

POWER SUPPLY

Operating Range 4.5 10 V
Quiescent Current per Amplifier Enabled 6.3 7.9 9.4 mA
Quiescent Current per Amplifier Power down 0.8 0.9 1.1 mA
Power Supply Rejection Ratio (+PSRR/−PSRR) −59/−56 −57/−53 −55/−50 dB

− T

MIN

MIN

2.06 mV

MAX

− T

(+IB/−IB) −4/−27.8 μA

MAX

50% of power-down voltage to
10% of V

final, VIN = 0.5 V p-p

OUT

50% of power-down voltage to
90% of V

final, VIN = 0.5 V p-p

OUT

125 ns

80 ns

Rev. B | Page 4 of 16

AD8003

(

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage 11 V
Power Dissipation See Figure 3
Common-Mode Input Voltage −VS − 0.7 V to +VS + 0.7 V
Differential Input Voltage

±V

S

Exposed Paddle Voltage −VS
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
Junction Temperature 150°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, θJA is specified
for device soldered in circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type θJA Unit

24-Lead LFCSP_VQ 70 °C/W

Maximum Power Dissipation

The maximum safe power dissipation for the AD8003 is limited
by the associated rise in junction temperature (T
approximately 150°C, which is the glass transition temperature,
the plastic changes its properties. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the AD8003. Exceeding a junction temperature of 175°C for
an extended period can result in changes in silicon devices,
potentially causing degradation or loss of functionality.

) on the die. At

J

RMS output voltages should be considered. If R

, as in single-supply operation, the total drive power is VS ×

−V

S

I

. If the rms signal levels are indeterminate, consider the

OUT

worst case, when V

()

D

In single-supply operation with
is

V

= VS/2.

OUT

= VS/4 for RL to midsupply.

OUT

2

)

4

/V

S

+×=

IVP

SS

R

L

R

referenced to −VS, worst case

L

Airflow increases heat dissipation, effectively reducing θ

is referenced to

L

.

JA

In addition, more metal directly in contact with the package
leads and exposed paddle from metal traces, through holes,
ground, and power planes reduce θ

.

JA

Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the exposed paddle,
4 mm × 4 mm LFCSP_VQ (70°C/W) package on a JEDEC
standard 4-layer board. θ

3.0

2.5

2.0

1.5

1.0

0.5

MAXIMUM POW ER DISSIPATION (W )

0

–35 –15 5 25 45 65 85 105

–55 125

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

values are approximations.

JA

AMBIENT TEMPERATURE (°C)

05721-037

ESD CAUTION

The power dissipated in the package (P

) is the sum of the

D

quiescent power dissipation and the power dissipated in the die
due to the AD8003 drive at the output. The quiescent power is
the voltage between the supply pins (V
current (I

).

S

= Quiescent Power + (Total Drive Power – Load Power)

P

D

⎛

V

V

()

D

⎜

IVP

SS

⎜
⎝

OUTS

×+×=

R

2

L

) times the quiescent

S

⎞
⎟

⎟
⎠

2

V

OUT

–

R

L

Rev. B | Page 5 of 16

AD8003

TYPICAL PERFORMANCE CHARACTERISTICS

3

VS = ±5V
R

= 464Ω

F

2

R

= 150Ω

L

V

= 200mV p-p

OUT

1

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-LOOP GAIN (dB)

–6

–7

1 10 100 1000

FREQUENCY (MHz)

G = –1

G = –2

Figure 4. Small Signal Frequency Response for Various Gains

05721-002

3

VS=±5V
G=+1,R

2

G=+2,+10,R
R

1

V

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-LOOP GAIN (dB)

–6

–7

1 100 1000

= 150Ω

L

= 200mV p -p

OUT

=432Ω

F

= 464Ω

F

10

FREQUENCY (MHz)

G=+2

G=+1

G=+10

Figure 7. Small Signal Frequency Response for Various Gains

05721-003

3

G = +2
R

= 150Ω

L

2

V

= 200mV p-p

OUT

1

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-LOOP GAIN (dB)

–6

–7

1 100 1000

10

FREQUENCY (MHz)

VS = ±5V

VS = +5V

Figure 5. Small Signal Frequency Response for Various Supplies

3

G = +2
V

= ±5V

S

2

R

= 150Ω

L

V

= 200mV p-p

OUT

1

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-LOOP GAIN (dB)

–6

–7

1 100 1000

10

FREQUENCY (MHz)

Figure 6. Small Signal Feedback Resistor (R

RF = 392Ω

RF = 432Ω

RF = 464Ω

RF = 357Ω

) Optimization

F

3

G = +2
V

= ±5V

S

2

R

= 150Ω

L

V

= 200mV p-p

OUT

1

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-LOOP GAIN (dB)

–6

05721-004

–7

1 100 1000

10

FREQUENCY (MHz)

T = +105°C

T = +25°C

T = –40°C

05721-005

Figure 8. Small Signal Frequency Response for Various Temperatures

3

G = +2
V

= ±5V

S

2

R

= 150Ω

L

V

= 2V p-p

OUT

1

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-LOOP GAIN (dB)

–6

05721-007

–7

1 100 1000

10

FREQUENCY (MHz)

RF = 392Ω

RF = 432Ω

RF = 357Ω

RF = 464Ω

05721-008

Figure 9. Large Signal Feedback Resistor (RF) Optimization

Rev. B | Page 6 of 16

AD8003

–

–

6

G = +1
V

=±5V

S

R

= 150Ω

L

V

= 200mV p-p

3

OUT

0

–3

–6

–9

NORMALIZED CL OSED-LOO P GAIN ( dB)

–12

1 10 100 1000 10000

FREQUENCY (MHz)

Figure 10. G = +1 Series Resistor (R

3

VS=±5V
G=+1,R

2

G=+2,+5,R
R

1

V

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-L OOP GAIN (dB)

–6

–7

1 100 1000

=150Ω

L
OUT

=432Ω

F

=2Vp-p

= 464Ω

F

10

FREQUENCY (MHz)

G=+2

RS = 50Ω

) Optimization

S

G=+5

R

0

=

S

RS = 25Ω

G=+1

Ω

Figure 11. Large Signal Frequency Response for Various Gains

30

G=+1
R

= 100Ω

L

–40

–50

–60

–70

–80

–90

DISTORTION (dBc)

–100

–110

–120

=2Vp-p

V

OUT

SECOND

THIRD

0.1 1 10 100
FREQUENCY (MHz)

VS=±5V
V

=+5V

S

Figure 12. Harmonic Distortion vs. Frequency for Various Supplies

05721-006

05721-009

05721-017

0.3
G = +2

R

= 150Ω

0.2

L

V

= 2V p-p

OUT

0.1

0

–0.1

–0.2

–0.3

–0.4

–0.5

–0.6

–0.7

NORMALIZED CL OSED-LOO P GAIN ( dB)

–0.8

–0.9

1 10 100 1000

FREQUENCY (MHz )

VS =±5V

VS =+5V

Figure 13. 0.1 dB Flatness Response

3

VS=±5V
G=+2

2

R

= 150Ω

L

V

=2Vp-p

OUT

1

0

–1

–2

–3

–4

–5

NORMALIZED CLOSED-L OOP GAIN (dB)

–6

–7

1 100 1000

10

FREQUENCY (MHz)

T = + 105°C

T = –40° C

T = +25°C

05721-010

Figure 14. Large Signal Frequency Response for Various Temperatures

30

G=+2
R

=150Ω

L

–40

V

=2Vp-p

OUT

–50

–60

–70

–80

–90

DISTORTION (dBc)

–100

–110

–120

0.1 1 10 100

SECOND

THIRD

FREQUENCY ( MHz)

VS=±5V
V

=+5V

S

05721-018

Figure 15. Harmonic Distortion vs. Frequency for Various Supplies

05721-016

Rev. B | Page 7 of 16

AD8003

–

–20

–30

–40

10

G = +2
V

OUT

f

= 5MHz

C

= 2V p-p

SECOND

VS =±5V
V

=+5V

S

0.20

0.15

0.10

0.05

V

VS=

G=+2
R

= 150Ω

L

V

= 200mV p -p

+

5

V

=

S

±

5

V

OUT

2.70

2.65

2.60

2.55

–50

–60

DISTORTION (dBc)

–70

–80

–90

10 12 14 16 18 20 22 24 26 28 30

THIRD

R

(Ω)

L

Figure 16. Harmonic Distortion vs. R

L

05721-019

0

–0.05

OUTPUT VO LTAGE (V )

–0.10

–0.15

–0.20

01

1234567891011121314

Figure 19. Small Signal Pulse Response for Various Supplies

2.0
G = +2

= 150Ω

R

L

= 2V p-p

V

1.5

OUT

1.0

0.5

0

–0.5

OUTPUT VO LTAGE (V )

–1.0

–1.5

–2.0

015

=

VS

+

5

V

V

±

5

V

=

S

1 2 3 4 5 6 7 8 9 10 11 12 13 14

TIME (ns)

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

OUTPUT VOLTAGE ( V)

05721-012

Figure 17. Large Signal Pulse Response for Various Supplies

0.3

0.2

0.1

0

–0.1

OUTPUT VOLTAGE (V)

G=+2

–0.2

= 150Ω

R

L

V

=±5V

S

= 200mV p -p

V

OUT

–0.3

0 5 10 15 20 25 30 35

Figure 20. Small Signal Pulse Response for Various Capacitive Loads

TIME (ns)

CL=0pF

C

L

TIME (ns)

= 15pF

C

L

= 27pF

2.50

2.45

OUTPUT VO LTAGE (V )

2.40

2.35

2.30

5

5721-011

05721-020

2.8

2.7

2.6

=15pF

C

2.5

CL=0pF

2.4

OUTPUT VOLTAGE (V)

G=+2

2.3

= 150Ω

R

L

=5V

V

S

= 200mV p -p

V

OUT

2.2

0 5 10 15 20 25 30 3 5

L

C

TIME (ns)

= 27pF

L

Figure 18. Small Signal Pulse Response for Various Capacitive Loads

05721-022

Rev. B | Page 8 of 16

AMPLITUDE (V)

–0.5

–1.0

–1.5

1.5
G=+2

V

=±5V

S

R

= 150Ω

L

1.0

0.5

0

–5

0105 152025303540 45

V

V

SETTLE

TIME (ns)

OUT

V

IN

Figure 21. Short-Term 0.1% Settling Time

0.3

0.2

0.1

0

–0.1

–0.2

–0.3

SETTLING (%)

05721-021

AD8003

(

6000

G=+2
R

= 150Ω

L

5000

4000

3000

2000

SLEW RATE (V/µs)

1000

0

123456

07

VS=

V

+

5

V

V

OUT p-p

±

5

V

=

S

(V)

RISE
FALL

05721-013

Figure 22. Slew Rate vs. Output Voltage

5

4

3

2

1

0

–1

AMPLITUDE (V)

–2

–3

–4

–5

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

OUTPUT

INPUT × 2

TIME (µs)

G = +2
V

= ±5V

S

= 150Ω

R

L

05721-024

Figure 23. Output Overdrive Recovery

0

G=0
V

=±5V

S

R

= 150Ω

L

–10

–20

–30

–40

COMMON-MO DE REJECTIO N (dB)

–50

5

4

3

2

1

0

–1

AMPLITUDE (V)

–2

–3

–4

–5

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

OUTPUT

INPUT

TIME (µs)

G = +1
V
R

Figure 25. Input Overdrive Recovery

1000

G=+1/+2
V

=±5V

S

100

Ω)

10

IMPEDANCE

1

0.1

0.1 1 10 100 1000
FREQUENCY (MHz)

Figure 26. Output Impedance vs. Frequency

0

G=+2
V

=±5V

S

R

= 150Ω

L

–10

–20

–30

–40

–50

POWER SUPPLY REJECTI ON (dB)

–60

PSR–

PSR+

= ±5V

S

= 150Ω

L

05721-023

05721-027

–60

0.1 1 10 100
FREQUENCY ( MHz)

Figure 24. Common-Mode Rejection vs. Frequency

05721-026

Rev. B | Page 9 of 16

–70

0.1 1 10 100 1000
FREQUENCY ( MHz)

Figure 27. Power Supply Rejection vs. Frequency

05721-025

AD8003

(

80

20

60

VS=±5V

40

VS=+5V

20

(mV)

OS

0

V

–20

–40

–60

–5 –4 –3 –2 –1 0 1 2 3 4

(V)

V

CM

Figure 28. Offset Voltage vs. Input Common-Mode Range

10

8

VS = +5V

6

4

VS = ±5V

2

0

(μA)

B

I

–2

–4

–6

–8

–10

–5 –4 –3 –2 –1 0 1 2 3 4

V

(V)

OUT

Figure 29. Inverting Input Bias Current Linearity

15

VS=±5V

10

VS=+5V

5

µA)

0

B

I

–5

–10

–15

05721-031

5

–20

–5 –4 –3 –2 –1 0 1 2 3 4

V

(V)

CM

05721-032

5

Figure 31. Noninverting Input Bias Current vs. Common-Mode Range

6

V

D

±

5

V

V

=

S

(

S

I

)

5

4

V

V

(

S

D

I

+

5

V

=

S

3

AMPLITUDE (V)

2

V

V

U

(

T

O

V

O

U

)

+

=

S

5

V

)

±

5

V

=

S

(

T

V

)

1

V

U

(

T

O

±

5

V

V

=

)

05721-033

5

0

01

0.1 0.2 0.3 0.4 0.5 0.6 0. 7 0.8 0.9

S

TIME (µs)

V

O

G=+2
R

=150Ω

L

V

=0.5Vdc

IN

V

U

(

T

+

=

S

5

V

)

05721-014

.0

Figure 32. Disable Switching Time for Various Supplies

10

G=+2
R

=150Ω

L

9

V

=±5V

S

8

7

6

I

S

D

I

5

4

3

2

POSITIVE SUPPLY CURRENT (mA)

I

1

0

–4–3–2–101234

–5 5

POWERDOWNPINVOLTAGE(V

DIS

(V))

Figure 30. POWER DOWN Pin Current and Supply Current vs.

POWER DOWN Pin Voltage

200

150

100

50

0

–50

–100

–150

C

C

–200

POWER DOW N PIN CURRENT (µA)

–250

–300

05721-028

10

G=+2
R

=150Ω

L

9

V

=5V

S

8

7

6

I

C

C

5

4

3

2

POSITIVE SUPPLY CURRENT (mA)

1

0

05

0.51.01.52.02.53.03.54.04.5
POWERDOWNPINVOLTAGE(V

DIS

(V))

40

30

20

10

I

S

D

I

0

–10

–20

–30

–40

POWER DOW N PIN CURRENT (µA)

–50

–60

.0

05721-029

Figure 33. POWER DOWN Pin Current and Supply Current vs.

POWER DOWN Pin Voltage

Rev. B | Page 10 of 16

AD8003

√

1000

VS =±5V
R

= 1kΩ

F

100

10

INPUT VOLTAGE NOISE (nV/√Hz)

1

10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 34. Input Voltage Noise vs. Frequency

0

G=+2
R

= 150Ω

L

–10

DRIVING: CH1 AND CH3
RECEIVING: CH2

–20

–30

–40

–50

–60

–70

–80

NORMALIZE D CLOSED-LOOP GAIN (dB)

–90

–100

0.1 1 10 100 1000
FREQUENCY ( MHz)

VS=

Figure 35. Worst-Case Crosstalk

VS=

05721-034

±

5

V

+

5

V

05721-015

10000

VS=±5V

Hz)

1000

100

10

INPUT CURRENT NOI SE (pA/

1

10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 36. Input Current Noise vs. Frequency

1M

100k

10k

MAGNITUDE (Ω)

1k

100

1k 10k 100k 1M 10M 100M 1G

FREQUENCY (Hz)

Figure 37. Transimpedance

I–

I+

05721-035

200

180

160

140

120

100

80

PHASE (Degrees )

60

40

20

0

05721-030

Rev. B | Page 11 of 16

AD8003

T

APPLICATIONS INFORMATION

GAIN CONFIGURATIONS

Unlike conventional voltage feedback amplifiers, the feedback
resistor has a direct impact on the closed-loop bandwidth and
stability of the current feedback op amp circuit. Reducing the
resistance below the recommended value can make the amplifier
response peak and can even become unstable. Increasing the
size of the feedback resistor reduces the closed-loop bandwidth.

Table 5 provides a convenient reference for quickly determining
the feedback and gain set resistor values, and the small and
large signal bandwidths for common gain configurations. The
feedback resistors in Tab le 5 have been optimized for 0.1 dB
flatness frequency response.

Table 5. Recommended Values and Frequency Response1

Gain RF (Ω) RG (Ω) RS (Ω)

−1 300 300 0 734 668 -­+1 432 N/A 24.9 1650 822 -­[phone] 190
[phone] 165
+10 300 33.2 0 446 422 170

1

Conditions: VS = ±5 V, TA = 25°C, RL = 150 Ω.

Figure 38 and Figure 39 show the typical noninverting and inverting
configurations and recommended bypass capacitor values.

R

G

R

V

IN

V

IN

S

Figure 38. Noninverting Gain

R

G

R

F

–

AD8003

+

–V

R

F

–

AD8003

+

FB

–V

S

FB

–V

−3 dB
SS BW
(MHz)

+V

S

+V

0.1µF

10µF

+V

S

+V

0.1µF

10µF

0.1µF

10µF

0.1µF

Large
Signal

−3 dB
BW

V

O

V

O

Large
Signal

0.1 dB
BW

V

O

R

L

05721-038

V

O

R

L

RGB VIDEO DRIVER

Figure 40 shows a typical RGB driver application using bipolar

75Ω

75Ω

75Ω

= RG =

F

R

OUT

G

OU

B

OUT

supplies. The gain of the amplifier is set at +2, where R
464 Ω. The amplifier inputs are terminated with shunt 75 Ω
resistors, and the outputs have series 75 Ω resistors for proper
video matching. In Figure 40, the POWER DOWN pins are not
shown connected to any signal source for simplicity. If the power­down function is not used, it is recommended that the POWER
DOWN pins be tied to the positive supply and not be left floating
(not connected).

In applications that require a fixed gain of +2, as previously
mentioned, the designer may consider the ADA4862-3.
The ADA4862-3 is another high performance triple current
feedback amplifier. The ADA4862-3 has integrated feedback
and gain set resistors that reduce board area and simplify designs.

PD3

PD2

PD1

+V

14

23

5

1

R

IN

75Ω

G

IN

75Ω

B

IN

75Ω

R

464Ω

R

464Ω

R

464Ω

R

464Ω

R

464Ω

R

464Ω

4

G

3

F

2

AD8003

22

G

21

F

20

15

G

16

F

17

6

19

24

18

13

Figure 40. RGB Video Driver

10µF

0.1µF

10µF

0.1µF

10µF

0.1µF

10µF

0.1µF

10µF

0.1µF

10µF

0.1µF

S

–V

S

+V

S

–V

S

+V

S

–V

S

05721-036

10µF

–V

S

Figure 39. Inverting Gain

05721-039

Rev. B | Page 12 of 16

AD8003

PRINTED CIRCUIT BOARD LAYOUT

Printed circuit board (PCB) layout is usually one of the last
steps in the design process and often proves to be one of the
most critical. A high performance design can be rendered
mediocre due to poor or sloppy layout. Because the AD8003
can operate into the RF frequency spectrum, high frequency
board layout considerations must be taken into account. The
PCB layout, signal routing, power supply bypassing, and
grounding must all be addressed to ensure optimal performance.

LOW DISTORTION PINOUT

The AD8003 LFCSP features ADI’s low distortion pinout. The
pinout lowers the second harmonic distortion and simplifies the
circuit layout. The close proximity of the noninverting input
and the negative supply pin creates a source of second harmonic
distortion. Physical separation of the noninverting input pin
and the negative power supply pin reduces this distortion.

By providing an additional output pin, the feedback resistor
can be connected directly between the feedback pin and the
inverting input. This greatly simplifies the routing of the
feedback resistor and allows a more compact circuit layout,
which reduces its size and helps to minimize parasitics and
increase stability.

SIGNAL ROUTING

To minimize parasitic inductances, ground planes should be
used under high frequency signal traces. However, the ground
plane should be removed from under the input and output pins
to minimize the formation of parasitic capacitors, which degrades
phase margin. Signals that are susceptible to noise pickup should be
run on the internal layers of the PCB, which can provide
maximum shielding.

POWER SUPPLY BYPASSING

Power supply bypassing is a critical aspect of the PCB design
process. For best performance, the AD8003 power supply pins
need to be properly bypassed.

Each amplifier has its own supply pins brought out for the utmost
flexibility. Supply pins can be commoned together or routed to a
dedicated power plane. Commoned supply connections can also
reduce the need for bypass capacitors on each supply line. The
exact number and values of the bypass capacitors are dictated
by the design specifications of the actual circuit.

A parallel combination of different value capacitors from each
of the power supply pins to ground tends to work the best.
Paralleling different values and sizes of capacitors helps to ensure
that the power supply pins see a low ac impedance across a wide
band of frequencies. This is important for minimizing the coupling
of noise into the amplifier. Starting directly at the power supply
pins, the smallest value and physical-sized component should
be placed on the same side of the board as the amplifier, and as
close as possible to the amplifier, and connected to the ground
plane. This process should be repeated for the next largest capacitor
value. It is recommended that a 0.1 μF ceramic 0508 case be used
for the AD8003. The 0508 offers low series inductance and
excellent high frequency performance. The 0.1 μF case provides
low impedance at high frequencies. A 10 μF electrolytic capacitor
should be placed in parallel with the 0.1 μF. The 10 μF capacitor
provides low ac impedance at low frequencies. Smaller values
of electrolytic capacitors can be used depending on the circuit
requirements. Additional smaller value capacitors help provide a
low impedance path for unwanted noise out to higher
frequencies but are not always necessary.

EXPOSED PADDLE

The AD8003 features an exposed paddle, which lowers the
thermal resistance by approximately 40% compared to a
standard SOIC plastic package. The paddle can be soldered
directly to the ground plane of the board. Thermal vias or heat
pipes can also be incorporated into the design of the mounting
pad for the exposed paddle. These additional vias improve the
thermal transfer from the package to the PCB. Using a heavier
weight copper also reduces the overall thermal resistance path
to ground.

Rev. B | Page 13 of 16

Placement of the capacitor returns (grounds), where the capacitors
enter into the ground plane, is also important. Returning the
capacitor grounds close to the amplifier load is critical for
distortion performance. Keeping the capacitors distance short,
but equal from the load, is optimal for performance.

In some cases, bypassing between the two supplies can help
improve PSRR and maintain distortion performance in
crowded or difficult layouts. Designers should note this as
another option for improving performance.

AD8003

Minimizing the trace length and widening the trace from the
capacitors to the amplifier reduces the trace inductance. A
series inductance with the parallel capacitance can form a tank
circuit, which can introduce high frequency ringing at the output.
This additional inductance can also contribute to increased
distortion due to high frequency compression at the output.
The use of vias should be minimized in the direct path to the
amplifier power supply pins because vias can introduce parasitic
inductance, which can lead to instability. When required, use
multiple large diameter vias because this lowers the equivalent
parasitic inductance.

GROUNDING

The use of ground and power planes is encouraged as a method
of proving low impedance returns for power supply and signal
currents. Ground and power planes can also help to reduce stray
trace inductance and provide a low thermal path for the amplifier.
Ground and power planes should not be used under any of the
pins of the AD8003. The mounting pads and the ground or power
planes can form a parasitic capacitance at the amplifiers input.
Stray capacitance on the inverting input and the feedback
resistor form a pole, which degrades the phase margin, leading
to instability. Excessive stray capacitance on the output also forms a
pole, which degrades phase margin.

Rev. B | Page 14 of 16

AD8003

OUTLINE DIMENSIONS

0.60 MAX

19

18

EXPOSED

(BOTTOM VIEW)

13

12

PAD

24

6

7

1

2.50 REF

PIN 1
INDICATOR

2.25

2.10 SQ

1.95

0.25 MIN

PIN 1

INDICATOR

1.00

0.85

0.80

12° MAX

SEATING
PLANE

4.00

BSC SQ

TOP

VIEW

0.80 MAX

0.65 TYP

COMPLIANT TOJEDEC STANDARDS MO-220-VGGD-2

0.30

0.23

0.18

3.75

BSC SQ

0.20 REF

0.05 MAX

0.02 NOM

0.60 MAX

0.50

BSC

0.50

0.40

0.30

COPLANARITY

0.08

Figure 41. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

4 mm × 4 mm Body, Very Thin Quad

(CP-24-1)

Dimensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option Ordering Quantity

AD8003ACPZ-R2
AD8003ACPZ-REEL
AD8003ACPZ-REEL7
EVAL-AD8003-3CPEZ

1

Z = RoHS Compliant Part.

1

–40°C to +85°C 24-Lead LFCSP_VQ CP-24-1 250

1

–40°C to +85°C 24-Lead LFCSP_VQ CP-24-1 5,000

1

–40°C to +85°C 24-Lead LFCSP_VQ CP-24-1 1,500

1

Evaluation Board

Rev. B | Page 15 of 16

AD8003

NOTES

©2005–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05721-0-9/08(B)

Rev. B | Page 16 of 16