Analog Devices AD7891SS-2, AD7891BS-2, AD7891BS-1, AD7891BP-2, AD7891BP-1 Datasheet
...
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
AD7891
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
LC2MOS 8-Channel, 12-Bit
High Speed Data Acquisition System
FUNCTIONAL BLOCK DIAGRAM
2.5V
REFERENCE
TRACK/HOLD
V
IN1A
V
IN1B
V
IN2A
V
IN2B
V
IN3A
V
IN3B
V
IN4A
V
IN4B
V
IN5A
V
IN5B
V
IN6A
V
IN6B
V
IN7A
V
IN7B
V
IN8A
V
IN8B
CONTROL LOGIC
WR CS RD EOC CONVST
MODE AGND
AGND DGND
CLOCK
V
DDVDD
AD7891
12-BIT
ADC
ADDRESS
DECODE
REF OUT/
REF IN
REF GND
STANDBY
M
U
X
DATA/
CONTROL
LINES
FEATURES
Fast 12-Bit ADC with 1.6 s Conversion Time
Eight Single-Ended Analog Input Channels
Overvoltage Protection on Each Channel
Selection of Input Ranges:
ⴞ5 V, ⴞ10 V for AD7891-1
0 to 2.5 V, 0 to 5 V, ⴞ2.5 V for AD7891-2
Parallel and Serial Interface
On-Chip Track/Hold Amplifier
On-Chip Reference
Single Supply, Low Power Operation (100 mW Max)
Power-Down Mode (75 W Typ)
APPLICATIONS
Data Acquisition Systems
Motor Control
Mobile Communication Base Stations
Instrumentation
GENERAL DESCRIPTION
The AD7891 is an eight-channel 12-bit data acquisition system
with a choice of either parallel or serial interface structure. The
part contains an input multiplexer, an on-chip track/hold amplifier, a high speed 12-bit ADC, a 2.5 V reference and a high
speed interface. The part operates from a single 5 V supply and
accepts a variety of analog input ranges across two models, the
AD7891-1 (± 5 V and ±10 V) and the AD7891-2 (0 V to 2.5 V,
0 V to 5 V and ± 2.5 V).
The AD7891 provides the option of either a parallel interface or
serial interface structure determined by the MODE pin. The
part has standard control inputs and fast data access times for
both the serial and parallel interfaces which ensures easy interfacing to modern microprocessors, microcontrollers and digital
signal processors.
In addition to the traditional dc accuracy specifications such as
linearity, full-scale and offset errors, the part is also specified for
dynamic performance parameters including harmonic distortion
and signal-to-noise ratio.
Power dissipation in normal mode is 82 mW typical while in
the standby mode this is reduced to 75 µW typ. The part is
available in a 44-terminal plastic quad flatpack (MQFP) and a
44-lead plastic leaded chip carrier (PLCC).
PRODUCT HIGHLIGHTS
1. The AD7891 is a complete monolithic 12-bit data acquisition
system combining an eight-channel multiplexer, 12-bit ADC,
2.5 V reference and track/hold amplifier on a single chip.
2. The AD7891-2 features a conversion time of 1.6 µs and an
acquisition time of 0.4 µs. This allows a sample rate of
500 kSPS when sampling one channel and 62.5 kSPS when
channel hopping. These sample rates can be achieved using
either a software or hardware convert start. The AD7891-1
has an acquisition time of 0.6 µs when using a hardware
convert start and an acquisition time of 0.7 µs when using a
software convert start. These acquisition times allow sample
rates of 454.5 kSPS and 435 kSPS respectively for hardware
and software convert start.
3. Each channel on the AD7891 has overvoltage protection.
This means that an overvoltage on an unselected channel
does not affect the conversion on a selected channel. The
AD7891-1 can withstand overvoltages of ±17 V.
–2–
REV. C
AD7891–SPECIFICATIONS
(VDD = 5 V ⴞ 5%, AGND = DGND = 0 V, REF IN = 2.5 V. All specifications T
MIN
to T
MAX
unless otherwise noted.)
ABY
Parameter Version1Version Version Unit Test Conditions/Comments
DYNAMIC PERFORMANCE
2
Sample Rate = 454.5 kSPS3 (AD7891-1),
500 kSPS
3
(AD7891-2). Any Channel
Signal to (Noise + Distortion) Ratio
4
@ 25°C 707070dB min
T
MIN
to T
MAX
70 70 70 dB min
Total Harmonic Distortion
4
–78 –78 –78 dB max
Peak Harmonic or Spurious Noise
4
–80 –80 –80 dB max
Intermodulation Distortion
4
fa = 9 kHz, fb = 9.5 kHz
Second Order Terms –80 –80 –80 dB typ
Third Order Terms –80 –80 –80 dB typ
Channel-to-Channel Isolation
4
–80 –80 –80 dB max
DC ACCURACY Any Channel
Resolution 12 12 12 Bits
Minimum Resolution for Which
No Missing Codes Are Guaranteed 12 12 12 Bits
Relative Accuracy
4
± 1 ± 0.75 ± 1 LSB max
Differential Nonlinearity
4
± 1 ± 1 ± 1 LSB max
Positive Full-Scale Error
4
± 3 ± 3 ± 3 LSB max
Positive Full-Scale Error Match
4, 5
0.6 0.6 0.6 LSB typ 1.5 LSB max
Unipolar Offset Error ± 3 ± 3 ± 3 LSB max Input Ranges of 0 V to 2.5 V, 0 V to 5 V
Unipolar Offset Error Match
5
0.1 0.1 0.1 LSB typ 1 LSB max
Negative Full-Scale Error
4
± 3 ± 3 ± 3 LSB max Input Ranges of ± 2.5 V, ± 5V, ± 10 V
Negative Full-Scale Error Match
4, 5
0.6 0.6 0.6 LSB typ 1.5 LSB max
Bipolar Zero Error ± 4 ± 4 ± 4 LSB max Input Ranges of ± 2.5 V, ± 5V, ± 10 V
Bipolar Zero Error Match
5
0.2 0.2 0.2 LSB typ 1.5 LSB max
ANALOG INPUTS
AD7891-1 Input Voltage Range
± 5 ± 5 ± 5 Volts Input Applied to Both V
INXA
and V
INXB
± 10 ± 10 ± 10 Volts Input Applied to V
INXA
, V
INXB
= AGND
AD7891-1 V
INXA
Input Resistance 7.5 7.5 7.5 kΩ min Input Range of ± 5V
AD7891-1 V
INXA
Input Resistance 15 15 15 kΩ min Input Range of ± 10 V
AD7891-2 Input Voltage Range
0 to 2.5 0 to 2.5 0 to 2.5 Volts Input Applied to Both V
INXA
and V
INXB
0 to 5 0 to 5 0 to 5 Volts Input Applied to V
INXA
, V
INXB
= AGND
± 2.5 ± 2.5 ± 2.5 Volts Input Applied to V
INXA
, V
INXB
= REF IN
6
AD7891-2 V
INXA
Input Resistance 1.5 1.5 1.5 kΩ min Input Ranges of ± 2.5 V and 0 V to 5 V
AD7891-2 V
INXA
Input Current ± 50 ± 50 ± 50 nA max Input Range of 0 V to 2.5 V
REFERENCE INPUT/OUTPUT
REF IN Input Voltage Range 2.375/2.625 2.375/2.625 2.375/2.625 V min/V max 2.5 V ± 5%
Input Impedance 1.6 1.6 1.6 kΩ min Resistor Connected to Internal Reference Node
Input Capacitance
5
10 10 10 pF max
REF OUT Output Voltage 2.5 2.5 2.5 V nom
REF OUT Error @ 25°C ± 10 ± 10 ± 10 mV max
T
MIN
to T
MAX
± 20 ± 20 ± 20 mV max
REF OUT Temperature Coefficient 25 25 25 ppm/°C typ
REF OUT Output Impedance 5 5 5 kΩ nom See REF IN Input Impedance
LOGIC INPUTS
Input High Voltage, V
INH
2.4 2.4 2.4 V min VDD = 5 V ± 5%
Input Low Voltage, V
INL
0.8 0.8 0.8 V max VDD = 5 V ± 5%
Input Current, I
INH
± 10 ± 10 ± 10 µA max
Input Capacitance5 C
IN
10 10 10 pF max
–3–REV. C
AD7891
ABY
Parameter Version1Version Version Unit Test Conditions/Comments
LOGIC OUTPUTS
Output High Voltage, V
OH
4.0 4.0 4.0 V min I
SOURCE
= 200 µA
Output Low Voltage, V
OL
0.4 0.4 0.4 V max I
SINK
= 1.6 mA
DB11–DB0
Floating-State Leakage Current ±10 ±10 ± 10 µA max
Floating-State Capacitance
5
15 15 15 pF max
Output Coding
Straight (Natural) Binary Data Format Bit of Control Register = 0
Two’s Complement Data Format Bit of Control Register = 1
CONVERSION RATE
Conversion Time 1.6 1.6 1.6 µs max
Track/Hold Acquisition Time 0.6 0.6 0.6 µs max AD7891-1 Hardware Conversion
0.7 0.7 0.7 µs max AD7891-1 Software Conversion
0.4 0.4 0.4 µs max AD7891-2
POWER REQUIREMENTS
V
DD
555V nom± 5% for Specified Performance
I
DD
Normal Mode 20 20 21 mA max
Standby Mode 80 80 80 µA max Logic Inputs = 0 V or V
DD
Power Dissipation VDD = 5 V
Normal Mode 100 100 105 mW max Typically 82 mW
Standby Mode 400 400 400 µW max Typically 75 µW
NOTES
1
Temperature Ranges for the A and B Versions: –40°C to +85°C. Temperature Range for the Y Version: –55°C to +105°C.
2
The AD7891-1’s dynamic performance (THD and SNR) and the AD7891-2’s THD are measured with an input frequency of 10 kHz. The AD7891-2’s SNR is
evaluated with an input frequency of 100 kHz.
3
This throughput rate can only be achieved when the part is operated in the parallel interface mode. Maximum achievable throughput rate in the serial interface mode
is 357 kSPS.
4
See Terminology.
5
Sample tested during initial release and after any redesign or process change that may affect this parameter.
6
REF IN must be buffered before being applied to V
INXB
.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Input Voltage to AGND
AD7891-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 17 V
AD7891-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 V, +10 V
Reference Input Voltage to AGND . . . . –0.3 V to V
DD
+ 0.3 V
Digital Input Voltage to DGND . . . . . . –0.3 V to V
DD
+ 0.3 V
Digital Output Voltage to DGND . . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Commercial (A, B Version) . . . . . . . . . . . . – 40°C to +85°C
Automotive (Y Version) . . . . . . . . . . . . . . –55°C to +105°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
MQFP Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 95°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
PLCC Package, Power Dissipation . . . . . . . . . . . . . . 500 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 55°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7891 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
AD7891
–4–
REV. C
TIMING CHARACTERISTICS
1, 2
Parameter A, B, Y Versions Unit Test Conditions/Comments
t
CONV
1.6 µs max Conversion Time
Parallel Interface
t
1
0 ns min CS to RD/WR Setup Time
t
2
35 ns min Write Pulsewidth
t
3
25 ns min Data Valid to Write Setup Time
t
4
5 ns min Data Valid to Write Hold Time
t
5
0 ns min CS to RD/WR Hold Time
t
6
35 ns min CONVST Pulsewidth
t
7
55 ns min EOC Pulsewidth
t
8
35 ns min Read Pulsewidth
t
9
3
25 ns min Data Access Time after Falling Edge of RD
t
10
4
5 ns min Bus Relinquish Time after Rising Edge of RD
30 ns max
Serial Interface
t
11
30 ns min RFS Low to SCLK Falling Edge Setup Time
t
12
3
20 ns max RFS Low to Data Valid Delay
t
13
25 ns min SCLK High Pulsewidth
t
14
25 ns min SCLK Low Pulsewidth
t
15
3
5 ns min SCLK Rising Edge to Data Valid Hold Time
t
16
3
15 ns max SCLK Rising Edge to Data Valid Delay
t
17
20 ns min RFS to SCLK Falling Edge Hold Time
t
18
4
0 ns min Bus Relinquish Time after Rising Edge of RFS
30 ns max
t
18A
4
0 ns min Bus Relinquish Time after Rising Edge of SCLK
30 ns max
t
19
20 ns min TFS Low to SCLK Falling Edge Setup Time
t
20
15 ns min Data Valid to SCLK Falling Edge Setup Time
t
21
10 ns min Data Valid to SCLK Falling Edge Hold Time
t
22
30 ns min TFS Low to SCLK Falling Edge Hold Time
NOTES
1
Sample tested during initial release and after any redesign or process change that may affect this parameter. All input signals are measured with tr = tf = 1 ns (10% to
90% of 5 V) and timed from a voltage level of 1.6 V.
2
See Figures 2, 3, and 4.
3
Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
4
These times are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus
relinquish times of the part and as such are independent of external bus loading capacitances.
Specifications subject to change without notice.
1.6mA
200A
1.6V
TO
OUTPUT
PIN
50pF
Figure 1. Load Circuit for Access Time and Bus Relinquish Time
AD7891
–5–REV. C
ORDERING GUIDE
Model Input Ranges Sample Rate Relative Accuracy Temperature Range Package Options*
AD7891AS-1 ± 5 V or ±10 V 454 kSPS ±1 LSB –40°C to +85°CS-44
AD7891AP-1 ± 5 V or ± 10 V 454 kSPS ±1 LSB –40°C to +85°C P-44A
AD7891BS-1 ± 5 V or ± 10 V 454 kSPS ±0.75 LSB –40°C to +85°CS-44
AD7891BP-1 ± 5 V or ± 10 V 454 kSPS ± 0.75 LSB –40°C to +85°C P-44A
AD7891YS-1 ± 5 V or ±10 V 454 kSPS ± 1 LSB –55°C to +105°CS-44
AD7891YP-1 ± 5 V or ± 10 V 454 kSPS ± 1 LSB –55°C to +105°C P-44A
AD7891AS-2 0 V to 5 V, 0 V to 2.5 V 500 kSPS ± 1 LSB –40°C to +85°CS-44
or ± 2.5 V
AD7891AP-2 0 V to 5 V, 0 V to 2.5 V 500 kSPS ± 1 LSB –40°C to +85°C P-44A
or ± 2.5 V
AD7891BS-2 0 V to 5 V, 0 V to 2.5 V 500 kSPS ± 0.75 LSB –40°C to +85°CS-44
or ± 2.5 V
AD7891BP-2 0 V to 5 V, 0 V to 2.5 V 500 kSPS ± 0.75 LSB –40°C to +85°C P-44A
or ± 2.5 V
AD7891YS-2 0 V to 5 V, 0 V to 2.5 V 500 kSPS ±1 LSB –55°C to +105°CS-44
or ± 2.5 V
*S = Plastic Quad Flatpack (MQFP); P = Plastic Leaded Chip Carrier (PLCC).
PIN CONFIGURATIONS
PLCC
7
8
9
10
11
12
13
14
15
16
17
6 5 4 3 2 1 44 43 42 41 40
39
38
37
36
35
34
33
32
31
30
29
18 19 20 21 22 23 24 25 26 27 28
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
NC = NO CONNECT
V
IN6A
AGND
EOC
NC
CONVST
CS
REF GND
NC
REF OUT/REF IN
V
DD
AGND
MODE
DB11/TEST
DB10/TEST
DB9/TFS
DB8/RFS
DB7/DATA IN
STANDBY
V
IN1A
DB6/SCLK
V
DD
DGND
DB5/A2/DATA OUT
DB3/A0
DB2/SWCON
DB1/SWSTBY
DB0/FORMAT
WR
RD
DB4/A1
AD7891
PLCC
V
IN1BVIN2AVIN2BVIN3AVIN3BVIN4AVIN4BVIN5AVIN5B
V
IN6B
V
IN7A
V
IN7B
V
IN8A
V
IN8B
MQFP
V
IN6A
AGND
EOC
NC
CONVST
CS
REF GND
NC
REF OUT/REF IN
V
DD
AGND
MODE
DB11/TEST
DB10/TEST
DB9/TFS
DB8/RFS
DB7/DATA IN
STANDBY
V
IN1A
DB6/SCLK
V
DD
DGND
DB5/A2/DATA OUT
DB3/A0
DB2/SWCON
DB1/SWSTBY
DB0/FORMAT
WR
RD
DB4/A1
V
IN1BVIN2AVIN2BVIN3AVIN3BVIN4AVIN4BVIN5AVIN5B
V
IN6B
V
IN7A
V
IN7B
V
IN8A
V
IN8B
NC = NO CONNECT
44 43 42 41 40 39 38 37 36 35 34
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18 19 20 21 22
33
32
31
30
29
28
27
26
25
24
23
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
AD7891
MQFP
AD7891
–6–
REV. C
PIN FUNCTION DESCRIPTIONS
Mnemonic Description
V
INXA
, V
INXB
Analog Input Channels. The AD7891 contains eight pairs of analog input channels. Each channel contains two input pins to allow a number of different input ranges to be used with the AD7891. There are
two possible input voltage ranges on the AD7891-1. The ± 5 V input range is selected by connecting the
input voltage to both V
INXA
and V
INXB
, while the ± 10 V input range is selected by applying the input
voltage to V
INXA
and connecting V
INXB
to AGND. The AD7891-2 has three possible input ranges. The
0 V to 2.5 V input range is selected by connecting the analog input voltage to both V
INXA
and V
INXB
; the
0 V to 5 V input range is selected by applying the input voltage to V
INXA
and connecting V
INXB
to AGND
while the ±2.5 V input range is selected by connecting the analog input voltage to V
INXA
and connecting
V
INXB
to REF IN (provided this REF IN voltage comes from a low impedance source). The channel to be
converted is selected by the A2, A1 and A0 bits of the control register. In the parallel interface mode,
these bits are available as three data input lines (DB3 to DB5) in a parallel write operation while in the
serial interface mode, these three bits are accessed via the DATA IN line in a serial write operation. The
multiplexer has guaranteed break-before-make operation.
V
DD
Positive supply voltage, 5 V ± 5%.
AGND Analog Ground. Ground reference for track/hold, comparator and DAC.
DGND Digital Ground. Ground reference for digital circuitry.
STANDBY Standby Mode Input. TTL-compatible input which is used to put the device into the power save or standby
mode. The STANDBY input is high for normal operation and low for standby operation.
REF OUT/REF IN Voltage Reference Output/Input. The part can either be used with its own internal reference or with an
external reference source. The on-chip 2.5 V reference voltage is provided at this pin. When using this
internal reference as the reference source for the part, REF OUT should be decoupled to REF GND with
a 0.1 µF disc ceramic capacitor. The output impedance of the reference source is typically 2 kΩ. When
using an external reference source as the reference voltage for the part, the reference source should be
connected to this pin. This overdrives the internal reference and provides the reference source for the
part. The reference pin is buffered on-chip but must be able to sink or source current through this 2 kΩ
resistor to the output of the on-chip reference. The nominal reference voltage for correct operation of the
AD7891 is 2.5 V.
REF GND Reference Ground. Ground reference for the part’s on-chip reference buffer. The REF OUT pin of the
part should be decoupled with a 0.1 µF capacitor to this REF GND pin. If the AD7891 is used with an
external reference, the external reference should also be decoupled to this pin. The REF GND pin should
be connected to the AGND pin or the system’s AGND plane.
CONVST Convert Start. Edge-triggered logic input. A low to high transition on this input puts the track/hold into
hold and initiates conversion. When changing channels on the part, sufficient time should be given for
multiplexer settling and track/hold acquisition between the channel change and the rising edge of CONVST.
EOC End-of-Conversion. Active low logic output indicating converter status. The end of conversion is signified
by a low-going pulse on this line. The duration of this EOC pulse is nominally 80 ns.
MODE Interface Mode. Control input which determines the interface mode for the part. With this pin at a logic
low, the AD7891 is in its serial interface mode; with this pin at a logic high, the device is in its parallel
interface mode.
NC No Connect. The two NC pins on the device can be left unconnected. If they are to be connected to a
voltage it should be to ground potential. To ensure correct operation of the AD7891, neither of the NC
pins should be connected to a logic high potential.
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