Analog Devices AD7484CB, AD7484BST Datasheet

PRELIMINARY TECHNICAL DA T A

3MSPS,

=

Preliminary Technical Data

FEATURES
Fast Throughput Rate: 3Msps

Wide Input Bandwidth: 50MHz
No Pipeline Delays with SAR ADC
Excellent DC Accuracy Performance
Two Parallel Interface Modes
Low Power:

90mW (Full-Power) and 5mW (NAP Mode)
Standby Mode: 1µA max
Single +5V Supply Operation
Internal +2.5V Reference
Full-Scale Overrange Mode (using 15th bit)
System Offset Removal via User Access Offset Register
Nominal 0 to +2.5V Input with Shifted Range Capability
Pin Compatible Upgrade of 12-Bit AD7482

GENERAL DESCRIPTION

The AD7484 is a 14-bit, high speed, low power, succes­sive-approximation ADC. The part features a parallel
interface with throughput rates up to 3Msps. The part
contains a low-noise, wide bandwidth track/hold amplifier
which can handle input frequencies in excess of 50MHz.

The conversion process is a proprietary algorithmic suc­cessive-approximation technique which results in no
pipeline delays. The input signal is sampled and a conver­sion is initiated on the falling edge of the CONVST
signal. The conversion process is controlled via an inter­nally trimmed oscillator. Interfacing is via standard
parallel signal lines making the part directly compatible
with microcontrollers and DSPs.

The AD7484 provides excellent ac and dc performance
specifications. Factory trimming ensures high dc accuracy
resulting in very low INL, offset and gain errors.

The part uses advanced design techniques to achieve very
low power dissipation at high throughput rates. Power
consumption in normal mode of operation is 90mW.
There are two power-saving modes: a NAP mode, which
keeps the reference circuitry alive for a quick power up
while consuming 5mW and a STANDBY mode which
reduces power consumption to a mere 5µW.

14-Bit SAR ADC

AD7484

FUNCTIONAL BLOCK DIAGRAM

AGND

C

BUF

BIASDVDD

14-Bit Error

Correcting SAR

VREF3

VIN

AV

DD

T/H

AD7484

MODE1
MODE2

CLIP
NAP

STBY

RESET

CONVST

V

DRIVE

LOGIC AND I/O

REGISTERS

CS

RD

WRITE

CONTROL

D0

D1

BUSY

The AD7484 features an on-board +2.5V reference but
the part can also accomodate an externally-provided
+2.5V reference source. The nominal analog input range
is 0 to +2.5V but an offset shift capability allows this
nominal range to be offset by +/-200mV. This allows the
user considerable flexibility in setting the bottom end
reference point of the signal range, a useful feature when
using single-supply op-amps.

The AD7484 also provides the user with an 8% overrange
capability via a 15th bit. Thus, if the analog input range
strays outside the nominal by up to 8%, the user can still
accurately resolve the signal by using the 15th bit.

The AD7484 is powered from a +4.75V to +5.25V sup­ply. The part also provides a V
user to set the voltage levels for the digital interface lines.
The range for this V

pin is from +2.7V to +5.25V.

DRIVE

The part is housed in a 48-pin LQFP package and is
specified over a -40°C to +85°C temperature range.

DGND

2.5 V

REFERENCE

D2

D3

D4

D5

D6

pin which allows the

DRIVE

VREF1
VREF2

D14
D13
D12
D11
D10
D9
D8
D7

REV. PrC 7/13/01

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

PRELIMINARY TECHNICAL DA T A

ⴗⴗ

(TA = 25

ⴗC, VDD = 4.75 V to 5.25 V, V

ⴗⴗ

f

AD7484–SPECIFICA TIONS

SAMPLE

= 3MSPS)

Parameter Specification Units Test Conditions/Comments

DYNAMIC PERFORMANCE F

Signal to Noise + Distortion (SINAD)
Signal to Noise Ratio (SNR)

2

Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Intermodulation Distortion (IMD)

2

2

2

78 dB min
78 dB min

-90 dB max

2

TBD dB max

= 100kHz Sine Wave

IN

Second Order Terms TBD dB typ
Third Order Terms TBD dB typ
Aperture Delay 10 ns typ
Aperture Jitter 10 ps typ
Full Power Bandwidth 50 MHz typ @ 3 dB

TBD MHz typ @0.1 dB

DC ACCURACY

Resolution 14 Bits
Integral Nonlinearity

Differential Nonlinearity
Offset Error

Gain Error

2

2

2

2

TBD LSB max
±1 LSB typ
TBD LSB max Guaranteed No Missed Codes to 14 bits
±1 LSB typ
±1.5 LSB max
±1.5 LSB max

ANALOG INPUT

Input Voltage -200 mV min

+2.7 Volts max
DC Leakage Current TBD µA max
Input Capacitance 10 pF typ

REFERENCE INPUT/OUTPUT

V

Input Voltage +2.5 Volts ±1% for specified performance

REF

V

Input DC Leakage Current ±1 µA max

REF

Input Capacitance TBD pF max

V

REF

V

Output Voltage +2.5 V nom

REF

V

Error @ 25°C TBD mV max

REF

Error T

V

REF

V

Output Impedance TBD k⍀ typ

REF

MIN

to T

MAX

TBD mV max

LOGIC INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C

INL

IN

IN

INH

2

TBD V min

0.4 V max

TBD µA max

TBD pF max

LOGIC OUTPUTS

Output High Voltage, V
Output Low Voltage, V
Floating-State Leakage Current TBD µA max
Floating-State Output Capacitance

OH

OL

2,3

V

- 0.2 V min

DRIVE

0.4 V max

TBD pF max
Output Coding Straight (Natural) Binary

CONVERSION RATE

Conversion Time TBD ns max
Track/Hold Acquisition Time TBD ns max Sine Wave Input

TBD ns max Full-Scale Step Input
Throughput Rate 3 MSPS max

POWER REQUIREMENTS

V
V

DD
DRIVE

+ 5 Volts ±5%

+2.7 V min

+5.25 V max

Normal Mode (Static) TBD mA typ

I

DD

Normal Mode (Operational) 18 mA typ
NAP Mode 1 mA typ

Standby Mode 1 µA m ax

= 2.7 V to 5.25 V,

DRIVE

REV. PrC 7/13/01

–2–

PRELIMINARY TECHNICAL DA T A

Parameter Specification Units Test Conditions/Comments

POWER REQUIREMENTS

(continued)

Power Dissipation
Normal Mode (Operational) 90 mW max
NAP Mode 5 mW max
Standby Mode 5 µW max

NOTES

1

Temperature ranges as follows: –40°C to +85°C.

2

See Terminology

3

Sample tested @ +25°C to ensure compliance

Specifications subject to change without notice.

AD7484

TIMING CHARACTERISTICS

(VDD = 5 V ±5%, AGND = DGND = 0 V, V

1,2

All specifications T

MIN

to T

MAX

and valid for V

= Internal;

REF

DRIVE

= 2.7 V to 5.25 V unless otherwise noted)

Parameter Symbol Min Typ Max Units
Data Read

Acquisition Time t
Conversion Time t
Quiet Time before Conversion start t
Quiet Time during Conversion t

CONVST Pulse Width t
CONVST falling edge to BUSY falling edge t
CS falling edge to RD falling edge t

Bus Access Time t

CONVST falling edge to new Data valid t
BUSY rising edge to new Data valid t

Bus Relinquish Time t
RD rising edge to CS rising edge t

ACQ
CONV
QUIET
QUIET 2
1
2
3
4
5
6
7
8

TBD ns

TBD ns
TBD ns
TBD ns
TBD ns
TBD TBD ns
TBD ns

TBD ns

TBD ns

TBD ns

TBD ns

TBD ns

Data Write

WRITE Pulse Width t
Data Setup time t
Data Hold time t
CS falling edge to WRITE rising edge t
WRITE falling edge to CS rising edge t

9
10
11
12
13

TBD ns
TBD ns
TBD ns
TBD ns
TBD ns

REV. PrC 7/13/01

–3–

AD7484

WARNING!

ESD SENSITIVE DEVICE

PRELIMINARY TECHNICAL DA T A

ABSOLUTE MAXIMUM RATINGS

1

(TA = +25°C unless otherwise noted)

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V

V

to GND . . . . . . . . . . . . . . . . . . . . . . . .-0.3 V to +7 V

DRIVE

Analog Input Voltage to GND . . -0.3 V to AV
Digital Input Voltage to GND . . -0.3 V to DV

REF IN to GND . . . . . . . . . . . . . -0.3 V to AV

+ 0.3 V

DD

+ 0.3 V

DD

+ 0.3 V

DD

Input Current to Any Pin Except Supplies . . . . . . . ±10mA

Operating Temperature Range

Commercial . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . +150°C

48-Pin LQFP Package, Power Dissipation . . . . . . . .TBD

Thermal Impedance . . . . . . . . . . . . . . . . . . . . 50°C/W

␪

JA

Thermal Impedance . . . . . . . . . . . . . . . . . . . 10°C/W

␪

JC

Lead Temperature, Soldering

Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . +215°C

Infared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . +220°C

ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TBD

NOTES

1

Stresses above those listed under “Absolute Maximum Ratings” may cause permanent

damage to the device. This is a stress rating only and functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

AVDD

CBIAS

AGND
AGND
AVDD
AGND

VIN
VREF2
VREF1
VREF3

AGND
AGND

PIN CONFIGURATION

AGND

AGND

AVDD

CLIP

MODE1

MODE2

4847464544434241403938

PIN 1 IDENTIFIER

1

2

3

4

5

6

7

8

9

10

11

12

1314151617181920212223

AVDD

AGND

AD7484

TOP VIEW

(Not to Scale)

STBY

AGND

NAP

CS

RESET

CONVST

RD

WRITE

D14

BUSY

D13

D12

D11

37

24

D0D1D2

36

35

34

33

32

31

30

29

28

27

26

25

D10
D9
D8
D7
VDRIVE
DGND
DGND
DVDD
D6
D5
D4
D3

ORDERING GUIDE

Temperature Package

Model Range Description Option

AD7484BST -40°C to +85°C Low-profile Quad Flat Pack ST-48
EVAL-AD7484CB
EVAL-CONTROL BRD2

NOTES

1

This can be used as a stand-alone evaluation board or in conjunction with the EVAL-CONTROL BOARD for evaluation/demonstration purposes.

2

This board is a complete unit allowing a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators.

1

2

Evaluation Board
Controller Board

CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7484 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.

–4–

REV. PrC 7/13/01