12.5 V/s Slew Rate
20 MHz Gain Bandwidth Product
THD = 0.0002% @ 1 kHz
Internally Compensated for Gains of +5 (or –4) or
Greater
EXCELLENT DC PERFORMANCE
0.5 mV Max Offset Voltage
250 pA Max Input Bias Current
2000 V/mV Min Open Loop Gain
Available in Tape and Reel in Accordance with
EIA-481A Standard
APPLICATIONS
Sonar
Photodiode and IR Detector Amplifiers
Accelerometers
Low Noise Preamplifiers
High Performance Audio
PRODUCT DESCRIPTION
The AD745 is an ultralow noise, high-speed, FET input operational amplifier. It offers both the ultralow voltage noise and
high speed generally associated with bipolar input op amps and
the very low input currents of FET input devices. Its 20 MHz
bandwidth and 12.5 V/µs slew rate makes the AD745 an ideal
High Speed, BiFET Op Amp
AD745
CONNECTION DIAGRAM
16-Lead SOIC (R) Package
amplifier for high-speed applications demanding low noise and
high dc precision. Furthermore, the AD745 does not exhibit an
output phase reversal.
The AD745 also has excellent dc performance with 250 pA
maximum input bias current and 0.5 mV maximum offset voltage.
The internal compensation of the AD745 is optimized for higher
gains, providing a much higher bandwidth and a faster slew
rate. This makes the AD745 especially useful as a preamplifier
where low level signals require an amplifier that provides both
high amplification and wide bandwidth at these higher gains.
The AD745 is available in two performance grades. The AD745J
and AD745K are rated over the commercial temperature range
of 0°C to 70°C, and are available in the 16-lead SOIC package.
1000
R
SOURCE
OP37 AND
RESISTOR
AD745 AND
RESISTOR
R
100
INPUT NOISE VOLTAGE – nV/ Hz
SOURCE
AD745 AND RESISTOR
OP37 AND RESISTOR
10
1
100
E
O
OR
RESISTOR NOISE ONLY
1k10k100k1M10M
SOURCE RESISTANCE –
Figure 1.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
Initial Offset0.251.00.10.5mV
Initial OffsetT
vs. Temp.T
vs. Supply (PSRR)12 V to 18 V
vs. Supply (PSRR)T
INPUT BIAS CURRENT
3
MIN
MIN
MIN
to T
to T
to T
MAX
MAX
MAX
2
9096100106dB
22µV/°C
8898105dB
1.51.0mV
Either InputVCM = 0 V150400150250pA
Either Input
@ T
MAX
Either InputVCM = +10 V250600250400pA
VCM = 0 V8.85.5nA
Either Input, VS = ±5 VVCM = 0 V3020030125pA
INPUT OFFSET CURRENTVCM = 0 V401503075pA
Offset Current
@ T
MAX
VCM = 0 V2.21.1nA
FREQUENCY RESPONSE
Gain BW, Small SignalG = –42020MHz
Full Power ResponseVO = 20 V p-p120120kHz
Slew RateG = –412.512.5V/µs
Settling Time to 0.01%55µs
Total Harmonicf = 1 kHz
Input offset voltage specifications are guaranteed after five minutes of operations at TA = 25°C.
2
Test conditions: +VS = 15 V, –VS = 12 V to 18 V and +VS = 12 V to +18 V, –VS = 15 V.
3
Bias current specifications are guaranteed maximum at either input after five minutes of operation at TA = 25°C. For higher temperature, the current doubles every 10°C.
4
Gain = –4, RL = 2 kΩ, CL = 10 pF.
5
Defined as voltage between inputs, such that neither exceeds ± 10 V from common.
6
The AD745 does not exhibit an output phase reversal when the negative common-mode limit is exceeded.
All min and max specifications are guaranteed.
Specifications subject to change without notice.
Storage Temperature Range (R) . . . . . . . . . –65°C to +125°C
ESD SUSCEPTIBILITY
An ESD classification per method 3015.6 of MIL-STD-883C
has been performed on the AD745, which is a class 1 device.
Using an IMCS 5000 automated ESD tester, the two null pins
will pass at voltages up to 1,000 volts, while all other pins will
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
AD745JR-160°C to 70°CR-16
AD745KR-160°C to 70°CR-16
*
R = Small Outline IC.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD745 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
Package
*
REV. D
–3–
AD745
–Typical Performance Characteristics
(@ + 25C, VS = 15 V, unless otherwise noted.)
20
R
= 10k
LOAD
15
+V
IN
10
–V
IN
5
INPUT VOLTAGE SWING – V
0
0
5101520
SUPPLY VOLTAGE VOLTS
TPC 1. Input Voltage Swing vs.
Supply Voltage
12
9
6
3
QUIESCENT CURRENT – mA
20
R
= 10k
LOAD
15
POSITIVE
SUPPLY
10
NEGATIVE
SUPPLY
5
INPUT VOLTAGE SWING – V
0
0
5101520
SUPPLY VOLTAGE VOLTS
TPC 2. Output Voltage Swing vs.
Supply Voltage
–6
10
–7
10
–8
10
–9
10
–10
10
–11
INPUT BIAS CURRENT – Amps
10
35
30
25
20
15
10
5
OUTPUT VOLTAGE SWING – V p-p
0
10
1001k10k
LOAD RESISTANCE –
TPC 3. Output Voltage Swing vs.
Load Resistance
200
100
10
1
CLOSED LOOP GAIN = –5
0.1
OUTPUT IMPEDANCE –
0
0
5101520
SUPPLY VOLTAGE VOLTS
TPC 4. Quiescent Current vs.
Supply Voltage
300
200
100
INPUT BIAS CURRENT – pA
0
–9 –6 –303 6 912
–12
COMMON-MODE VOLTAGE – V
TPC 7. Input Bias Current vs.
Common-Mode Voltage
–12
10
–60
–40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – C
TPC 5. Input Bias Current vs.
Temperature
–6
10
–7
10
–8
10
–9
10
–10
10
–11
INPUT BIAS CURRENT – Amps
10
–12
10
–60
–40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – C
TPC 8. Short Circuit Current Limit vs.
Temperature
0.01
100k1M10M100M
10k
FREQUENCY – Hz
TPC 6. Output Impedance vs.
Frequency
28
26
24
22
20
18
16
GAIN BANDWIDTH PRODUCT – MHz
14
–60
–40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – C
TPC 9. Gain Bandwidth Product vs.
Temperature
–4–
REV. D
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