10 MHz clock rate
Second-order modulator
16 bits no missing codes
±2 LSB INL typical at 16 bits
3.5 μV/°C maximum offset drift
On-board digital isolator
On-board reference
Low power operation: 18 mA maximum at 5.25 V
−40°C to +105°C operating range
16-lead SOIC package
Safety and regulatory approvals
UL recognition
3750 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V
= 891 V peak
IORM
APPLICATIONS
AC motor controls
Data acquisition systems
A/D + opto-isolator replacements
AD7400
GENERAL DESCRIPTION
The AD74001 is a second-order, sigma-delta (Σ-Δ) modulator
that converts an analog input signal to a high speed, 1-bit data
stream with on-chip digital isolation based on Analog Devices,
Inc. iCoupler® technology. The AD7400 operates from a 5 V
power supply and accepts a differential input signal of ±200 mV
(±320 mV full scale). The analog input is continuously sampled
by the analog modulator, eliminating the need for external
sample-and-hold circuitry. The input information is contained
in the output stream as a density of ones with a data rate of
10 MHz. The original information can be reconstructed with an
appropriate digital filter. The serial I/O can use a 5 V or a 3 V
supply (V
The serial interface is digitally isolated. High speed CMOS,
ombined with monolithic air core transformer technology,
c
means the on-chip isolation provides outstanding performance
characteristics superior to alternatives such as optocoupler
devices. The part contains an on-chip reference. The AD7400 is
offered in a 16-lead SOIC and has an operating temperature
range of −40°C to +105°C.
An external clock version, AD7401, is also available.
1
Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents
pending.
DD2
).
FUNCTIONAL BLOCK DIAGRAM
DD1
+
IN
VIN–
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Changes to Table 6.............................................................................7
Changes to Analog Input Section................................................. 13
Changes to Figure 26...................................................................... 15
1/06—Revision 0: Initial Version
Rev. B | Page 2 of 20
AD7400
www.BDTIC.com/ADI
SPECIFICATIONS
V
= 4.5 V to 5.25 V, V
DD1
f
= 10 MHz, tested with Sinc3 filter, 256 decimation rate, as defined by Verilog code, unless otherwise noted.
MCLK
= 3 V to 5.5 V, VIN+ = −200 mV to +200 mV, and VIN− = 0 V (single-ended); TA = T
DD2
MIN
1
to T
MAX
,
Table 1.
Parameter Y Version
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
3
16 Bits min Filter output truncated to 16 bits
±15 LSB max −40°C to +85°C; ±2 LSB typical
1, 2
Unit Test Conditions/Comments
±25 LSB max >85°C to 105°C
Differential Nonlinearity
Offset Error
3
3
±0.9 LSB max Guaranteed no missing codes to 16 bits
±0.5 mV max
±50 μV typ TA = 25°C
Offset Drift vs. Temperature
3.5 μV/°C max −40°C to +105°C
1 μV/°C typ
Offset Drift vs. V
Gain Error
3
DD1
120 μV/V typ
±1 mV max
Gain Error Drift vs. Temperature 23 μV/°C typ −40°C to +105°C
Gain Error Drift vs. V
110 μV/V typ
DD1
ANALOG INPUT
Input Voltage Range
±200 mV min/mV max For specified performance; full range ±320 mV
Dynamic Input Current ±7 μA max VIN+ = 400 mV, VIN− = 0 V
±0.5 μA typ VIN+ = VIN− = 0 V
Input Capacitance 10 pF typ
DYNAMIC SPECIFICATIONS VIN+ = 35 Hz, 400 mV p-p sine
Signal-to-(Noise + Distortion) Ratio (SINAD)
3
70 dB min −40°C to +85°C
65 dB min >85°C to 105°C
79 dB typ
Signal-to-Noise Ratio (SNR) 71 dB min −40°C to +105°C
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Effective Number of Bits (ENOB)
Isolation Transient Immunity
3
3
3
3
−88 dB typ
−88 dB typ
11.5 Bits
25 kV/μs min
30 kV/μs typ
LOGIC OUTPUTS
Output High Voltage, VOH V
− 0.1 V min IO = −200 μA
DD2
Output Low Voltage, VOL 0.4 V max IO = +200 μA
POWER REQUIREMENTS
V
4.5/5.25 V min/V max
DD1
V
3/5.5 V min/V max
DD2
4
I
DD1
5
I
DD2
4 mA max V
1
Temperature range is −40°C to +85°C.
2
All voltages are relative to their respective ground.
3
See the Terminology section.
4
See Figure 14.
5
See Figure 15.
12 mA max V
6 mA max V
= 5.25 V
DD1
= 5.5 V
DD2
= 3.3 V
DD2
Rev. B | Page 3 of 20
AD7400
www.BDTIC.com/ADI
TIMING SPECIFICATIONS
V
= 4.5 V to 5.25 V, V
DD1
= 3 V to 5.5 V, TA = T
DD2
MAX
to T
, unless otherwise noted.
MIN
Table 2.
Parameter Limit at T
2
f
MCLKOUT
10 MHz typ Master clock output frequency
MIN
, T
MAX
Unit Description
9/11 MHz min/MHz max Master clock output frequency
3
t
1
3
t
2
t3 0.4 × t
t
4
1
Sample tested during initial release to ensure compliance.
2
Mark space ratio for clock output is 40/60 to 60/40.
3
Measured with the load circuit of Figure 2 and defined as the time required for the output to cross 0.8 V or 2.0 V.
40 ns max Data access time after MCLK rising edge
10 ns min Data hold time after MCLK rising edge
ns min Master clock low time
MCLKOUT
0.4 × t
ns min Master clock high time
MCLKOUT
1
200µAI
TO OUTPUT
PIN
C
L
25pF
200µAI
Figure 2. Load Circuit for Digital Out
OL
+1.6V
OH
04718-002
put Timing Specifications
t
4
MCLKOUT
MDAT
t
1
t
2
t
3
04718-003
Figure 3. Data Timing
Rev. B | Page 4 of 20
AD7400
www.BDTIC.com/ADI
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 3.
Parameter Symbol Value Unit Conditions
Input-to-Output Momentary Withstand Voltage V
Minimum External Air Gap (Clearance) L(I01) 7.46 min mm
Minimum External Tracking (Creepage) L(I02) 8.1 min mm
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa Material group (DIN VDE 0110, 1/89, Table 1)
REGULATORY INFORMATION
3750 min V rms 1-minute duration
ISO
Measured from input terminals to output
minals, shortest distance through air
ter
Measured from input terminals to output
minals, shortest distance path along body
ter
0.017
min
mm Insulation distance through insulation
Table 4.
UL1 CSA VDE
Recognized Under 1577
Component Recognition Program
3750 V rms Isolation Voltage
File E214100 File 205078 File 2471900-4880-0001
1
In accordance with UL 1577, each AD7400 is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (current leakage detection limit = 7.5 μA).
2
In accordance with DIN V VDE V 0884-10, each AD7400 is proof tested by applying an insulation test voltage ≥ 1671 V peak for 1 second (partial discharge detection
limit = 5 pC).
Approved under CSA Component
1
Acceptance Notice #5A
Reinforced insulation per CSA
60950-1-03 and
rms maximum working voltage
IEC 60950-1, 630 V
2
Certified according to DIN V VDE V 0884-10 (VDE V 0884-
10):2006-12
Reinforced insulation per DIN V VDE V 0884-10 (VDE V 0884-
10):2006-12, 891V peak
2
Rev. B | Page 5 of 20
AD7400
www.BDTIC.com/ADI
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
This isolator is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
means of protective circuits.
Table 5.
Description Symbol Characteristic Unit
INSTALLATION CLASSIFICATION PER DIN VDE 0110
For Rated Mains Voltage ≤ 300 V rms I–IV
For Rated Mains Voltage ≤ 450 V rms I–II
For Rated Mains Voltage ≤ 600 V rms I–II
CLIMATIC CLASSIFICATION 40/105/21
POLLUTION DEGREE (DIN VDE 0110, Tabl e 1) 2
MAXIMUM WORKING INSULATION VOLTAGE V
891 V peak
IORM
INPUT-TO-OUTPUT TEST VOLTAGE, METHOD B1
V
× 1.875 = VPR, 100% Production Test, tm = 1 sec, Partial Discharge < 5 pC VPR 1671 V peak