ANALOG DEVICES AD7357 Service Manual
Differential Input,Dual,Simultaneous
V
V
V
V
www.BDTIC.com/ADI
Sampling, 4.25 MSPS, 14-Bit, SAR ADC
Preliminary Technical Data
FEATURES
Dual 14-bit SAR ADC
Simultaneous Sampling
Throughput rate: 4.25 MSPS Per Channel
Specified for V
Power dissipation:
35 mW at 4.25 MSPS
On-chip reference:
2.048 V ± 0.5% max @ 25°C, 10ppm/°C
Dual conversion with read
High speed serial interface:
SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible
−40°C to +125°C operation
Shutdown mode: 10 µA max
16-lead TSSOP package
GENERAL DESCRIPTION
The AD73571 is a dual, 14-bit, high speed, low power, successive
approximation ADC that operates from a single 2.5 V power supply
and features throughput rates up to 4.25 MSPS. The part contains
two ADCs, each preceded by a low noise, wide bandwidth trackand-hold circuit that can handle input frequencies in excess of
200 MHz.
The conversion process and data acquisition use standard control
inputs allowing for easy interfacing to microprocessors or DSPs.
The input signal is sampled on the falling edge of
also initiated at this point. The conversion time is determined by
the SCLK frequency.
The AD7357 uses advanced design techniques to achieve very low
power dissipation at high throughput rates. With 2.5 V supply and
a 4.25 MSPS throughput rate, the part consumes 14 mA typically.
The part also offers flexible power/throughput rate management
when operating in normal mode as the quiescent current
consumption is so low.
The analog input range for the part is the differential common
mode +/- Vref/2. The AD7357 has an on-chip 2.048 V reference
that can be overdriven when an external reference is preferred.
The AD7357 is available in a 16-lead thin shrink small outline
package (TSSOP).
of 2.5 V
DD
CS
; conversion is
AD7357
FUNCTIONAL BLOCK DIAGRAM
Vdd
IN
A+
IN
A-
REF
IN
B+
V
IN
B-
BUF
BUF
AGND
T/H
T/H
AGND
PRODUCT HIGHLIGHTS
1. Two Complete ADC Functions Allow Simultaneous Sampling
and Conversion of Two Channels.
The conversion result of both channels is simultaneously
available on separate data lines or in succession on one data
line if only one serial port is available.
2. High Throughput with Low Power Consumption.
The AD7357 offers a 4.25 MSPS throughput rate with 35 mW
power consumption.
3.
The part features two standard successive approximation
ADCs with accurate control of the sampling instant via a
CS
input and once off conversion control.
1
Protected by U.S. Patent No. 6,681,332
Table 1: Related Devices.
Generic Resolution Throughput Analog Input
AD7356 12 5MSPS Differential
AD7352 12 3MSPS Differential
drive
14-BIT
SUCCESSIVE
APPROXIMATION
ADC
CONTROL
LOGIC
14-BIT
SUCCESSIVE
APPROXIMATION
ADC
REFGND
Figure 1.
DGND
AD7357
SDATA
SCLK
CS
SDATA
A
B
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of p atents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
AD7357 Preliminary Technical Data
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TABLE OF CONTENTS
Revision Historyx ............................................................................. 2
ADC Transfer Function............................................................. 11
Specifications..................................................................................... 3
AD7357 Specifications................................................................. 3
Timing Specifications .................................................................. 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 8
Terminology ...................................................................................... 9
Theory of Operation ...................................................................... 11
Circuit Information.................................................................... 11
Converter Operation.................................................................. 11
REVISION HISTORYX
09/07—Revision PrD
Analog Input Structure.............................................................. 11
Analog Inputs ............................................................................. 12
Modes of Operation ....................................................................... 13
Normal Mode.............................................................................. 13
Partial Power-Down Mode ....................................................... 13
Full Power-Down Mode............................................................ 13
Power-Up Times......................................................................... 15
Serial Interface ................................................................................ 16
Outline Dimensions....................................................................... 17
Ordering Guide............................................................................... 17
Rev. PrD | Page 2 of 17
Preliminary Technical Data AD7357
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SPECIFICATIONS
AD7357 SPECIFICATIONS
VDD = 2.5 +/-10% V, V
T
= T
MIN
to T
A
1
, unless otherwise noted.
MAX
Table 1.
Parameter Specification Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 1 MHz sine wave
Signal-to-Noise Ratio (SNR) 78 dB min
Signal-to-Noise and Distortion (SINAD) 77 dB min
Total Harmonic Distortion (THD) TBD
Spurious Free Dynamic Range (SFDR) TBD dB max
Intermodulation Distortion (IMD) fa = TBD Hz, fb = TBD Hz
Second Order Terms TBD dB typ
Third Order Terms TBD dB typ
Channel-to-Channel Isolation −85 dB typ f
SAMPLE AND HOLD
Aperture Delay 5 ns max
Aperture Delay Matching 40 ps max
Aperture Jitter 15 ps typ
Full Power Bandwidth 200 MHz typ @ 3 dB
30 MHz typ @ 0.1 dB
DC ACCURACY
Resolution 14 Bits
Integral Nonlinearity ±2 LSB max
Differential Nonlinearity ±0.99 LSB max Guaranteed no missed codes to 14 bits
Offset Error ±10 LSB max
Offset Error Match ±1 LSB typ
±6 LSB max
Gain Error ±10 LSB max
Gain Error Match ±1 LSB typ
±6 LSB max
ANALOG INPUT
Fully Differential Input Range: V
DC Leakage Current ±1 µA max
Input Capacitance 35 pF typ When in track
10 pF typ When in hold
REFERENCE INPUT/OUTPUT
V
Input Voltage Range 2.048+100mV / Vdd V min / V max
REF
DC Leakage Current ±1 µA max
V
Output Voltage 2.048 V ±0.5% max @ 25°C
REF
V
Temperature Coefficient 10 ppm⁄°C typ
REF
V
Long Term Stability 100 ppm typ For 1000 hours
REF
V
Output Voltage Hysteresis2 50 ppm typ
REF
V
Noise TBD
REF
V
Output Impedance TBD
REF
V
Input Capacitance TBD pF typ When in track
REF
LOGIC INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, IIN ±1 µA max VIN = 0 V or V
Input Capacitance, CIN 10 pF typ
= 2.5 V to 3.3 +10% V, internal V
DRIVE
in+
and V
VCM ± V
in−
= 2.048 V, unless otherwise noted, F
REF
dB max
⁄2 V
REF
µV Typ
Ω Typ
0.6 × Vdrive V min
INH
0.3 × Vdrive V max
INL
= 80 MHz, F
CLKIN
= TBD kHz, f
IN
= common-mode voltage , V
V
CM
remain within GND⁄V
NOISE
= TBD kHz
DD
DRIVE
= 4.25 MSPS;
SAMPLE
in+
and V
in−
must
Rev. PrD | Page 3 of 17
AD7357 Preliminary Technical Data
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Parameter Specification Unit Test Conditions/Comments
LOGIC OUTPUTS
Output High Voltage, VOH Vdrive-0.2 V min
Output Low Voltage, VOL 0.2 V max
Floating-State Leakage Current ±1 µA max
Floating-State Output Capacitance TBD pF typ
Output Coding Straight Binary
CONVERSION RATE
Conversion Time t2 + 15.5 × t
Track-and-Hold Acquisition Time 30 ns max Full-scale step input
Throughput Rate 4.25 MSPS max
POWER REQUIREMENTS
VDD 2.5 V
V
2.5/3.3 V min/max
DRIVE
IDD Digital I⁄PS = 0 V or V
Normal Mode (Operational) 14 mA typ
Normal Mode (Static) 7 mA typ SCLK off
Partial Power-Down Mode 5 mA typ
Full Power-Down Mode 10 µA typ SCLK on or off
Power Dissipation
Normal Mode (Operational) 35 mW typ
Normal Mode (Static) 17.5 mW typ SCLK off
Partial Power-Down Mode 12.5 mW typ
Full Power-Down Mode 2.5 µW typ SCLK on or off
1
Temperature ranges are as follows: Y Grade: −40°C to +125°C, B Grade: −40°C to +85°C.
2
See theTerminology section.
ns
SCLK
DRIVE
Rev. PrD | Page 4 of 17
Preliminary Technical Data AD7357
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TIMING SPECIFICATIONS
VDD = 2.5 +/-10%V, V
= 2.5 V to 3.3 +10% V, internal reference = 2.048 V, TA = T
DRIVE
Table 2.
Parameter Limit at T
f
SCLK
50 kHz min
80 MHz max
t
CONVERT
t
5 ns min
QUIET
t
2
t
3
t
42
t2 +15.5 × t
5 ns min
TBD ns max
TBD ns max Data access time after SCLK falling edge
t5 0.40 t
t6 0.40 t
t
7
t
8
TBD ns min SCLK to data valid hold time
TBD ns max
t9 TBD ns min
t
10
TBD ns min SCLK falling edge to D
TBD ns max SCLK falling edge to D
Latency 1 Conversion Latency
1
Temperature ranges are as follows: Y Grade: −40°C to +125°C, B Grade: −40°C to +85°C.
2
The time required for the output to cross 0.4 V or 2.4 V.
, T
MIN
MAX
ns max 14 bit resolution, t
SCLK
Unit Description
Minimum time between end of serial read and next falling edge of
CS
to SCLK setup time
Delay from
SCLK
ns min SCLK high pulse width
SCLK
ns min SCLK low pulse width
CS
rising edge to D
CS
rising edge to falling edge pulse width
CS
until D
SCLK
OUT
MAX
= 1/f
A and D
OUT
A, D
OUT
OUT
SCLK
OUT
A, D
A, D
1
to T
, unless otherwise noted.
MIN
B are three-state disabled
OUT
B, high impedance
B, high impedance
OUT
B, high impedance
OUT
CS
Rev. PrD | Page 5 of 17
AD7357 Preliminary Technical Data
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ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
VDD to AGND, DGND, REFGND
V
to AGND, DGND, REFGND −0.3 V to +3.8V
DRIVE
VDD to V
+2.8V to −3.8V
DRIVE
AGND to DGND to REFGND
Analog Input Voltages1 to AGND
Digital Input Voltages2 to DGND −0.3V to V
Digital Output Voltages3 to DGND
Input Current to Any Pin Except
Supplies
4
−0.3 V to +2.8V
−0.3 V to +0.3 V
−0.3 V to V
−0.3 V to V
+ 0.3 V
DD
DRIVE
DRIVE
+ 0.3V
±10 mA
+ 0.3 V
Operating Temperature Range
Y Grade
B Grade
Storage Temperature Range
−40°C to +125°C
−40°C to +85°C
−65°C to +150°C
Junction Temperature 150°C
TSSOP Package
θJA Thermal Impedance 143°C/W
θJC Thermal Impedance 45°C/W
Lead Temperature, Soldering
Reflow Temperature (10 to 30 sec) 255°C
ESD TBD kV
1
Analog input voltages are V
2
Digital input voltages are CS and SCLK.
3
Digital output voltages are SDATAA and SDATAB.
4
Transient currents of up to 100 mA will not cause SCR latch up.
INA+
, V
, V
, V
INB+
INB-
, REFA and REFB.
INA-
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product
features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to
high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid
performance degradation or loss of functionality.
Rev. PrD | Page 6 of 17
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