ANALOG DEVICES AD7291 Service Manual

8-Channel, I2C, 12-Bit SAR ADC

V

Data Sheet

FEATURES

12-bit SAR ADC

8 single-ended analog input channels Analog input range: 0 V to 2.5 V

12-bit temperature-to-digital converter

Temperature sensor accuracy of ±1°C typical Channel sequencer operation Specified for V Logic voltage V Internal 2.5 V reference

2

I

C-compatible serial interface supports standard and

fast speed modes Out of range indicator/alert function Autocycle mode Power-down current: 12 μA maximum Temperature range: −40°C to +125°C 20-lead LFCSP package

GENERAL DESCRIPTION

The AD7291 is a 12-bit, low power, 8-channel, successive approximation analog-to-digital converter (ADC) with an internal temperature sensor.

The part operates from a single 3.3 V power supply and features

2

an I

C-compatible interface. The part contains a 9-channel multiplexer and a track-and-hold amplifier than can handle frequencies up to 30 MHz. The device has an on-chip 2.5 V reference that can be disabled to allow the use of an external reference.

The AD7291 provides a 2-wire serial interface compatible with

2

I

C interfaces. The I2C interface supports standard and fast I2C interface modes. The AD7291 normally remains in a partial power-down state while not converting and powers up for conversions. The conversion process can be controlled by a command mode where conversions occur across I operations or an autocycle mode selected through software control.

The AD7291 includes a high accuracy band gap temperature sensor, which is monitored and digitized by the 12-bit ADC to give a resolution of 0.25°C.

The AD7291 offers a programmable sequencer, which enables the selection of a preprogrammable sequence of channels for conversion.

of 2.8 V to 3.6 V

DD

= 1.65 V to 3.6 V

DRIVE

2

C write

with Temperature Sensor

AD7291

FUNCTIONAL BLOCK DIAGRAM

DD

REF

BUFREF

V

IN0

V

INPUT

IN7

MUX

PD/RST

T/H

AD7291

TEMP

SENSOR

SUCCESSIVE

APPROXIMATION

SEQUENCER

CONTRO L LOG IC

2

I

C INTERFACE

ALERT

Figure 1.

On-chip limit registers can be programmed with high and low limits for the conversion results; an out-of-range indicator output (ALERT) becomes active when the programmed high or low limits are violated by the conversion result. This output can be used as an interrupt.

PRODUCT HIGHLIGHTS

1. Ideally suited to monitoring system variables in a variety

of systems including telecommunications, process control, and industrial control.

2

2. I

C-compatible serial interface, which supports standard

and fast modes.

3. Automatic partial power-down while not converting to

maximize power efficiency.

4. Channel sequencer operation.

5. Integrated temperature sensor with 0.25°C resolution.

6. Out of range indicator that can be software disabled or

enabled.

Table 1. AD7291 and Related Products

Device Resolution Interface Features

AD7291

12-bit I

AD7298 12-bit SPI 8-channel, 1 MSPS, 12-bit SAR

2

C 8-channel, I2C, 12-bit SAR

GND

12-BIT

ADC

SCL SDA AS1

AS0

V

DRIVE

08711-001

ADC with temperature sensor

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

AD7291 Data Sheet

REVISION HISTORY

10/11—Rev. A to Rev. B

Changes to Table 9.......................................................................... 16

8/11—Rev. 0 to Rev. A

Changes to Temperature Sensor—Internal, Accuracy Parameter,

Table 2 ................................................................................................ 3

1/11—Revision 0: Initial Version

Rev. B | Page 2 of 28

Data Sheet AD7291

SPECIFICATIONS

VDD = 2.8 V to 3.6 V; V unless otherwise noted.

Table 2.

Parameter Min Typ Max Unit1 Test Conditions/Comments

DYNAMIC PERFORMANCE fIN = 1 kHz sine wave

Signal-to-Noise Ratio (SNR) Signal-to-Noise (+ Distortion) Ratio (SINAD) Total Harmonic Distortion (THD) Spurious-Free Dynamic Range (SFDR) Intermodulation Distortion (IMD)

Second-Order Terms −88 dB

Third-Order Terms Channel-to-Channel Isolation −100 dB fIN = 10 kHz Full Power Bandwidth3 30 MHz At 3 dB 10 MHz At 0.1 dB

DC ACCURACY

Resolution 12 Bits Integral Nonlinearity (INL) Differential Nonlinearity (DNL) Offset Error2 ±2 ±4.5 LSB Offset Error Matching2 ±2.5 ±4.5 LSB Offset Temperature Drift 4 ppm/°C Gain Error2 ±1 ±4 LSB Gain Error Matching2 ±1 ±2.5 LSB Gain Temperature Drift 0.5 ppm/°C

ANALOG INPUT

Input Voltage Ranges 0 V DC Leakage Current ±0.01 ±1 µA Input Capacitance3 34 pF When in track 8 pF When in hold

REFERENCE INPUT/OUTPUT

Reference Output Voltage Long-Term Stability 150 ppm For 1000 hours Output Voltage Hysteresis 50 ppm Reference Input Voltage Range5 1 2.5 V DC Leakage Current ±0.01 ±1 µA External reference applied to Pin V V

Output Impedance

REF

Reference Temperature Coefficient 12 35 ppm/°C V

Noise3 60 µV rms Bandwidth = 10 MHz

REF

LOGIC INPUTS (SDA, SCL)

Input High Voltage, V Input Low Voltage, V Input Current, IIN ±0.01 ±1 µA VIN = 0 V or V Input Capacitance, C Input Hysteresis, V

= 1.65 V to 3.6 V; f

DRIVE

2

4

0.7 × V

INH

0.3 × V

INL

3

IN

0.1 × V

HYST

= 400 kHz, fast SCLK mode; V

SCL

70 71 dB

2

70 71 dB

−84 −78 dB

−85 −80 dB f

−88 dB

±0.5 ±1 LSB ±0.5 ±0.99 LSB Guaranteed no missed codes to 12 bits

2.4925 2.5 2.5075 V ±0.3% maximum at 25°C

1 Ω

V

DRIVE

6 pF

V

DRIVE

= 2.5 V internal/external; TA = −40°C to +125°C,

REF

= 5.4 kHz, fB = 4.6 kHz

A

V

REF

V

DRIVE

REF

Rev. B | Page 3 of 28

AD7291 Data Sheet

Parameter Min Typ Max Unit1 Test Conditions/Comments

LOGIC OUTPUTS

Output High Voltage, VOH V V

Output Low Voltage, VOL 0.4 V I

0.6 V I Floating State Leakage Current ±0.01 ±1 µA Floating State Output Capacitance

3

TEMPERATURE SENSOR—INTERNAL

Operating Range −40 +125 °C Accuracy ±1 ±2 °C TA = −40°C to +85°C ±1 ±3 °C TA = 85°C to 125°C Resolution 0.25 °C LSB size

CONVERSION RATE

Conversion Time 3.2 s Autocycle Update Rate

6

Throughput Rate 22.22 kSPS f

POWER REQUIREMENTS Digital inputs = 0 V or V

V

DD

V

1.65 3 3.6 V

DRIVE

7, 8

I

TOTAL

Normal Mode (Operational) 2.9 3.5 mA Normal Mode (Static) 2.9 3.3 mA Full Power-Down Mode 0.3 1.6 A TA = −40°C to +25°C

1.6 4.5 A TA = >25°C to 85°C

4.9 12 A TA = >85°C to 125°C

Power Dissipation

8

Normal Mode (Operational) 8.7 10.5 mW VDD = 3 V, V

10.4 12.6 mW Normal Mode (Static) 10.4 11.9 mW Full Power-Down Mode 1.1 5.8 µW TA = −40°C to +25°C

5.8 16.2 µW TA = >25°C to 85°C

17.6 43.2 µW TA = >85°C to 125°C

1

All specifications expressed in decibels are referred to full-scale input, FSR, and tested with an input signal at 0.5 dB below full scale, unless otherwise specified.

2

See the Terminology section.

3

Sample tested during initial release to ensure compliance.

4

Refers to Pin V

5

A correction factor may be required on the temperature sensor results when using an external V

6

Sampled during initial release to ensure compliance; not subject to production testing.

7

I

is the total current flowing in VDD and V

TOTAL

8

I

and power dissipation are specified with VDD = V

TOTAL

specified for 25

REF

o

C.

.

DRIVE

= 3.6 V, unless otherwise noted.

DRIVE

− 0.3 V V

DRIVE

− 0.2 V V

DRIVE

= 3 mA

SINK

= 6 mA

SINK

< 1.8 ≥ 1.8

8 pF

50 s

= 400 kHz

SCL

2.8 3 3.6 V

DRIVE

(see the Temperature Sensor Averaging section).

REF

= 3 V

DRIVE

Rev. B | Page 4 of 28

Data Sheet AD7291

I2C TIMING SPECIFICATIONS

Guaranteed by initial characterization. All values were measured with the input filtering enabled. CB refers to the capacitive load on the bus line, with t

2.5 V internal/external; T

and tF measured between 0.3 × V

R

= −40°C to +125°C, unless otherwise noted.

A

Table 3.

Limit at T Parameter Conditions Min Typ Max Unit Description

f

SCL

Standard mode 100 kHz Serial clock frequency Fast mode 400 kHz t

1

Standard mode 4 µs t Fast mode 0.6 µs t

2

Standard mode 4.7 µs t Fast mode 1.3 µs t

3

Standard mode 250 ns t Fast mode 100 ns

1

t

4

Standard mode 0 3.45 µs t Fast mode 0 0.9 µs t

5

Standard mode 4.7 µs t Fast mode 0.6 µs t

6

Standard mode 4 µs t Fast mode 0.6 µs t

7

Standard mode 4.7 µs t Fast mode 1.3 µs t

8

Standard mode 4 µs t Fast mode 0.6 µs t9 Standard mode 1000 ns t Fast mode 20 + 0.1 CB 300 ns t10 Standard mode 300 ns t Fast mode 20 + 0.1 CB 300 ns t11 Standard mode 1000 ns t Fast mode 20 + 0.1 CB 300 ns t

Standard mode 1000 ns t

11A

Fast mode 20 + 0.1 CB 300 ns start condition and after an acknowledge bit t12 Standard mode 300 ns t Fast mode 20 + 0.1 CB 300 ns t

SP

t

POWER-UP

1

A device must provide a data hold time for SDA to bridge the undefined region of the SCL falling edge.

Fast mode 0 50 ns Pulse width of the suppressed spike

6 ms Power-up and acquisition time

t

11

t

2

and 0.7 × V

DRIVE

(see Figure 2). VDD = 2.8 V to 3.6 V; V

DRIVE

, T

MIN

MAX

, SCL high time

HIGH

, SCL low time

LOW

, data setup time

SU;DAT

, data hold time

HD;DAT

, setup time for a repeated start condition

SU;STA

, hold time for a repeated start condition

HD;STA

, bus-free time between a stop and a start condition

BUF

, setup time for a stop condition

SU;STO

, rise time of the SDA signal

RDA

, fall time of the SDA signal

FDA

, rise time of the SCL signal

RCL

, rise time of the SCL signal after a repeated

RCL1

, fall time of the SCL signal

FCL

t

12

t

6

= 1.65 V to 3.6 V; V

DRIVE

REF

=

SCL

SDA

t

P PS

S = START CONDITION P = STOP CONDITI ON

t

6

7

t

4

t

3

t

1

t

5

t

10

S

t

8

t

9

8711-002

Figure 2. 2-Wire Serial Interface Timing Diagram

Rev. B | Page 5 of 28

AD7291 Data Sheet

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter Rating

VDD to GND1, GND V

to GND1, GND −0.3 V to +5 V

DRIVE

−0.3 V to +5 V

Analog Input Voltage to GND1 −0.3 V to +3 V Digital Input Voltage to GND1

−0.3 V to V

Digital Output Voltage to GND1 −0.3 V to V V

to GND1 −0.3 V to +3 V

REF

DRIVE

+ 0.3 V + 0.3 V

GND to GND1 −0.3 V to +0.3 V Input Current to Any Pin Except Supplies1 ±10 mA Operating Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C Pb-free Temperature, Soldering

Reflow 260(+0)°C

ESD 2 kV

1

Transient currents of up to 100 mA do not cause latch-up.

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

Table 5. Thermal Resistance

Package Type θJA θ

Unit

JC

20-Lead LFCSP 52 6.5 °C/W

ESD CAUTION

Rev. B | Page 6 of 28

Data Sheet AD7291

T

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

IN1

IN2

IN0

V

19

20

1

V

IN3

2

V

IN4

3

V

IN5

4

V

IN6

5

V

IN7

NOTES

1. THE EXPOSED METAL PADDLE ON THE BOTTOM OF THE LFCSP PACKAGE SHOULD BE SOLDERED TO PCB GROUND FOR PROPER HEAT DISSIPATION AND PERFORMANCE.

AD7291

TOP VIEW

(Not to Scale)

6

7

REF

V

GND1

Figure 3. Pin Configuration

Table 6. Pin Function Descriptions

Pin No. Mnemonic Description

1 to 5, 18 to 20

6 GND1

V

, V

,

IN3

IN4

, V

V

IN5

IN6

V

, V

IN7

IN0

V

, V

IN1

IN2

Analog Inputs. The AD7291 has eight single-ended analog inputs that are multiplexed into the on-chip track-and-

,

hold amplifier. Each input channel can accept analog inputs from 0 V to 2.5 V. Any unused input channels should

,

be connected to GND1 to avoid noise pickup.

Ground. Ground reference point for the internal reference circuitry on the AD7291. All analog input signals and the external reference signals should be referred to this GND1 voltage. The GND1 pin should be connected to the ground plane of a system. All ground pins should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. The V

REF

capacitor.

7 V

REF

Internal Reference/External Reference Supply. The nominal internal reference voltage of 2.5 V appears at this pin. Provided the output is buffered, the on-chip reference can be taken from this pin and applied externally to the rest of a system. Decoupling capacitors should be connected to this pin to decouple the reference buffer. For best performance, it is recommended to use a 10 F decoupling capacitor on this pin to GND1. The internal reference can be disabled and an external reference supplied to this pin if required. The input voltage range for the external reference is 2.0 V to 2.5 V.

8 D

CAP

Decoupling Capacitor Pin. Decoupling capacitors (1 F recommended) are connected to this pin to decouple the internal LDO.

9 GND

Ground. Ground reference point for all analog and digital circuitry on the AD7291. The GND pin should be connected to the ground plane of the system. All ground pins should ideally be at the same potential and must not be

more than 0.3 V apart, even on a transient basis. Both D 10 VDD Supply Voltage, 2.8 V to 3.6 V. This supply should be decoupled to GND with 10 F and 100 nF decoupling capacitors. 11, 13 AS0, AS1

Logic Input. Together, the logic state of these two inputs selects a unique I

for details. The device address depends on the voltage applied to these pins. 12 ALERT

14 SDA

Digital Output. This pin acts as an out-of-range indicator and, if enabled, becomes active when the conversion

result violates the DATA

or DATA

HIGH

register values. See the Limit Registers (0x04 to 0x1E) section.

LOW

Digital Input/Output. Serial bus bidirectional data. This open-drain output requires a pull-up resistor. The output coding

is straight binary for the voltage channels and twos complement for the temperature sensor result. 15 SCL

Digital Input. Serial I

2

C Bus Clock. This input requires a pull-up resistor. The data transfer rate in I2C mode is

compatible with both 100 kHz and 400 kHz operating modes. 16 V

DRIVE

Logic Power Supply Input. The voltage supplied at this pin determines the voltage at which the interface operates.

This pin should be decoupled to GND. The voltage range on this pin is 1.65 V to 3.6 V and may be less than the

but should never exceed it by more than 0.3 V.

DD

17

voltage at V

/RST Power-Down Pin. This pin places the part into a full power-down mode and enables power conservation when

PD

operation is not required. This pin can be used to reset the device by toggling the pin low for a minimum of 1 ns and a

maximum of 100 ns. If the maximum time is exceeded, the part enters power-down mode. When placing the device in

full power-down mode, the analog inputs must be returned to 0 V. EPAD EPAD

Exposed Paddle. The exposed metal paddle on the bottom of the LFCSP package should be soldered to PCB

ground for proper functionality and heat dissipation.

DRIVE

V

PD/RS

V

16

18

17

15

SCL

14

SDA

13

AS1 ALERT

12 11

AS0

9

8

10

DD

CAP

V

GND

D

08711-003

pin should be decoupled to this ground pin via a 10 F decoupling

and VDD pins should be decoupled to this GND pin.

CAP

2

C address for the AD7291. See Tab le 31

Rev. B | Page 7 of 28

AD7291 Data Sheet

TYPICAL PERFORMANCE CHARACTERISTICS

0

VDD = V

f

= 22.22ksps

S

f

–20

SCL

f

IN

SNR = 71.209 THD = –81.66

–40

–60

AMPLI TUDE (dB)

–80

–100

–120

02k

DRIVE

= 400kHz

= 10kHz

= 3V

4k 6k 8k 10k

FREQUENCY (Hz)

Figure 4. Typical FFT

1.0 TA = 25°C

V

0.8

0.6

0.4

0.2

INL (LSB)

–0.2

–0.4

–0.6

–0.8

–1.0

= 3V

DRIVE

V

= 2.5V

REF

V

= 3V

DD

f

= 22.22ksps

S

f

= 400kHz

SCL

0

0 500 1000 1500 2000 2500 3000 3500 4096

ADC CODE

Figure 5. Typical ADC INL

1.0

0.8

0.6

0.4

0.2

0

DNL (LSB)

–0.2

–0.4

–0.6

–0.8

–1.0

0 500 1000 1500 2000 2500 3000 3500 4096

ADC CODE

TA = 25°C

V V V f f

Figure 6. Typical ADC DNL

= 3V

DRIVE

= 2.5V

REF

= 3V

DD

= 22.22ksps

S

= 400kHz

SCL

1.0

0.8

0.6

0.4 TA = 25°C

0.2

V

= 3V

DRIVE

V

= 3V

DD

0

f

= 22.22ksps

S

f

INL (LSB)

–0.2

–0.4

–0.6

–0.8

–1.0

08711-009

= 400kHz

SCL

INL (POSITIVE) INL (NEGATIVE)

0 0.5 1.0 1.5 2.0 2.5 3.0

Figure 7. INL vs. External V

V

(V)

REF

08711-012

1.0

0.8

0.6

0.4

TA = 25°C

0.2

V

= 3V

DRIVE

V

= 3V

0

DD

f

= 22.22ksps

DNL (LSB)

08711-010

S

–0.2

f

= 400kHz

SCL

–0.4

–0.6

–0.8

–1.0

0 0.5 1.0 1.5 2.0 2.5 3.0

V

(V)

REF

Figure 8. DNL vs. External V

DNL (POSITIVE) DNL (NEGATIVE)

REF

08711-013

11.7

11.6

11.5

11.4

EFFECTIVE NUMBER OF BITS

11.3

11.2

08711-011

0 0.5 1.0 1.5 2.0 2.5

Figure 9. Effective Number of Bits vs. V

EXTERNAL REF ERENCE (V)

REF

, f

= 400 kHz

SCL

08711-035

Rev. B | Page 8 of 28

Data Sheet AD7291

R

A

–

3.0 VDD = V

2.5

2.0

(V)

1.5

REF

V

1.0

0.5

0

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

= 3V

DRIVE

Figure 10. V

CURRENT LOAD (mA)

vs. Reference Output Drive

REF

55

50

08711-021

125

120

115

110

105 100

95

90 85

80

CHANNEL-TO-CHANNEL ISOLATION (d B)

75

1 10 100 1k

f

NOISE

(kHz)

Figure 13. Channel-to-Channel Isolation, f

VDD = V

f

= 400kHz

SCL

= 10 kHz

IN

72

V

= 3V

DRIVE

V

= 3V

DD

DRIVE

= 3V

08711-018

45

40

35

TURE READING (°C)

30

TEMPE

25

20

0 20406080100

TIME (Seconds)

08711-014

Figure 11. Response to Thermal Shock from Room Temperature into 50°C

Stirred Oil

90

VDD = 3V V

= 3V

DRIVE

–92

–94

–96

–98

–100

PSRR (dB)

–102

–104

–106

–108

–110

1k 10k 100k 1M 10M 100M

RIPPLE FREQUENCY (Hz)

Figure 12. PSRR vs. Supply Ripple Frequency Without Supply Decoupling

71

SINAD (dB)

70

69

022.01.51.00.5

Figure 14. SINAD vs. Reference Voltage, f

EXTERNAL REF E RENCE (V)

= 400 kHz, fs = 22.22 kSPS

SCL

.5

08711-036

1.5

1.0

0.5

0

–0.5

–1.0

TEMPERATURE ERROR (°C)

–1.5

–2.0

–40 –25 –10 5 20 35 50 65 80 95 110 125

08711-061

TEMPERATURE (°C)

08711-017

Figure 15. Temperature Accuracy at 3 V

Rev. B | Page 9 of 28

ANALOG DEVICES AD7291 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

GENERAL DESCRIPTION

FUNCTIONAL BLOCK DIAGRAM

PRODUCT HIGHLIGHTS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

I2C TIMING SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS