Internally Trimmed
Data Sheet
FEATURES
Pretrimmed to ±0.5% maximum 4-quadrant error
All inputs (X, Y, and Z) differential, high impedance for
[(X
− X2)(Y1 − Y2)/10] + Z2 transfer function
1
Scale-factor adjustable to provide up to ×10 gain
Low noise design: 90 mV rms, 10 Hz to 10 kHz
Low cost, monolithic construction
Excellent long-term stability
APPLICATIONS
High quality analog signal processing
Differential ratio and percentage computations
Algebraic and trigonometric function synthesis
Accurate voltage controlled oscillators and filters
GENERAL DESCRIPTION
The AD632 is an internally trimmed monolithic four-quadrant
multiplier/divider. The AD632B has a maximum multiplying
error of ±0.5% without external trims.
Excellent supply rejection, low temperature coefficients, and
long-term stability of the on-chip thin film resistors and buried
zener reference preserve accuracy even under adverse conditions.
The simplicity and flexibility of use provide an attractive alternative
approach to the solution of complex control functions.
The AD632 is pin-for-pin compatible with the industry
standard AD532 but with improved specifications and a fully
differential high impedance Z input. The AD632 is capable of
providing gains of up to ×10, frequently eliminating the need
for separate instrumentation amplifiers to precondition the
inputs. The AD632 can be effectively employed as a variable
gain differential input amplifier with high common-mode
Precision IC Multiplier
AD632
FUNCTIONAL BLOCK DIAGRAM
STABLE
REFERENCE
AND BIAS
X
1
2
1
2
1
25kΩ
V-I
V-I
V-I
TRANSLINE AR
MULTIPLIER
ELEMENT
0.75 ATTEN
X
Y
Y
Z
Z
2
2.7kΩ
V
OS
TRANSFER FUNCT ION
V
Figure 1.
(X
– X2) (Y1 – Y2)
1
= A – (Z1 – Z2)
O
A
HIGH GAIN
OUTPUT
AMPLIFIER
rejection. The effectiveness of the variable gain capability is
enhanced by the inherent low noise of the AD632 at 90 μV rms.
PRODUCT HIGHLIGHTS
1. Guaranteed performance over temperature.
2. The AD632A and AD632B are specified for maximum
multiplying errors of ±1.0% and ±0.5% of full scale,
respectively, at +25°C and are rated for operation from
−25°C to +85°C.
3. Maximum multiplying errors of ±2.0% (AD632S) and
±1.0% (AD632T) are guaranteed over the extended
temperature range of −55°C to +125°C.
4. High reliability.
5. The AD632S and AD632T series are available with MIL-
STD-883 Level B screening.
6. All devices are available in either the hermetically sealed
TO-100 metal can or ceramic DIP package.
+V
S
–V
S
10
OUT
09040-007
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©1979–2011 Analog Devices, Inc. All rights reserved.
AD632 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
REVISION HISTORY
12/11—Rev. B to Rev. C
Updated Format .................................................................. Universal
Added Figure 1, Renumbered Sequentially .................................. 1
Deleted Chip Dimensions and Pad Layout Section ..................... 5
Changes to Figure 3 and Figure 4 ................................................... 6
Added Table 3 and Table 4 .............................................................. 6
Changes to the Operations as a Divider Section .......................... 9
Updated Outline Dimensions ....................................................... 10
Thermal Resistance .......................................................................5
Pin Configurations and Function Descriptions ............................6
Typical Performance Characteristics ..............................................7
Operation As a Multiplier ................................................................8
Operation As a Divider .....................................................................9
Outline Dimensions ....................................................................... 10
Ordering Guide .......................................................................... 11
4/10—Rev. A to Rev. B
Changes to Pin Configurations and Product Highlights
Sections .............................................................................................. 1
Changes to Thermal Characteristics Section ................................ 3
Updated Outline Dimensions ......................................................... 6
Changes to Ordering Guide ............................................................ 6
Rev. C | Page 2 of 12
Data Sheet AD632
2
2121
Z
YYXX
+
−−
V10
)()(
2
2121
Z
YYXX
+
−−
V10
)()(
2
2121
Z
YYXX
+
−−
V10
)()(
2
2121
Z
YYXX
+
−−
V10
)()(
SPECIFICATIONS
@ +25°C, VS = ±15 V, R ≥ 2 kΩ, unless otherwise noted. Specifications shown in boldface are tested on all production units at final
electrical test. Results from those tests are used to calculate outgoing quality levels.
Table 1.
AD632A AD632B AD632S AD632T
Parameter Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units
MULTIPLIER PERFORMANCE
Transfer Function
Total Error1 (−10 V ≤ X, Y ≤ +10 V)
TA = Min to Max
±1.5
Total Error vs. Temperature ±0.022 ±0.015
±1.0
±1.0
±0.5
±1.0
±2.0
±0.02
±0.5
±1.0
±0.01
Scale Factor Error
(SF = 10,000 V Nominal)2 ±0.25 ±0.1 ±0.25 ±0.1 %
Temperature Coefficient of
±0.02
±0.01
±0.2
±0.005
Scaling Voltage
Supply Rejection (±15 V ± 1 V) ±0.01 ±0.01 ±0.01 ±0.01 %
Nonlinearity
X (X = 20 V p-p, Y = 10 V) ±0.4 ±0.2 ±0.3 ±0.4 ±0.2 ±0.3 %
Y (Y = 20 V p-p, X = 10 V) ±0.2 ±0.1 ±0.1 ±0.2 ±0.1 ±0.1 %
Feedthrough3
X (Y Nulled, X = 20 V p-p 50 Hz) ±0.3 ±0.15 ±0.3 ±0.3 ±0.15 ±0.3 %
Y (X Nulled, Y = 20 V p-p 50 Hz) ±0.01 ±0.01 ±0.1 ±0.01 ±0.01 ±0.1 %
Output Offset Voltage ±5
Output Offset Voltage Drift 200 100
±2 ±15 ±5
±30
±30
500
±2 ±15 mV
300
DYNAMICS
Small Signal BW, (V
1% Amplitude Error
(C
= 1000 pF)
LOAD
Slew Rate (V
OUT
Settling Time (to 1%, ΔV
= 0.1 rms) 1 1 1 1 MHz
OUT
50 50 50 50 kHz
20 p-p) 20 20 20 20 V/µs
= 20 V) 2 2 2 2 µs
OUT
NOISE
Noise Spectral Density
SF = 10 V 0.8 0.8 0.8 0.8 µV/√Hz
SF = 3 V4 0.4 0.4 0.4 0.4 µV/√Hz
Wideband Noise
A = 10 Hz to 5 MHz 1.0 1.0 1.0 1.0 mV/rms
P = 10 Hz to 10 kHz 90 90 90 90 µV/rms
OUTPUT
Output Voltage Swing
±11
±11
±11
V
±11
Output Impedance (f ≤ 1 kHz) 0.1 0.1 0.1 0.1 Ω
Output Short-Circuit Current
(RL = 0, TA = Min to Max) 30 30 30 30 mA
Amplifier Open-Loop Gain
70 70 70 70 dB
(f = 50 Hz)
INPUT AMPLIFIERS (X, Y, and Z)5
Signal Voltage Range
±10 ±10 ±10 ±10 V
(Differential or CommonMode Operating Diff.)
Offset Voltage X, Y ±12 ±12 ±12 ±12 V
Offset Voltage Drift X, Y ±5
±20
±2
±10
±5
±20
±2
±10
Offset Voltage Z 100 50 100 150 µV/°C
Offset Voltage Z ±5
±30
±2
±15
±5
±30
±2
±15
Offset Voltage Drift Z 200 100 500 300 µV/°C
%
%
%/°C
%/°C
µV/°C
mV
mV
Rev. C | Page 3 of 12
AD632 Data Sheet
1
21
12
Y
XX
ZZ
+
−−)(
)(
V10
1
21
12
Y
XX
ZZ
+
−−)(
)(
V10
1
21
12
Y
XX
ZZ
+
−−)(
)(
V10
1
21
12
Y
XX
ZZ
+
−−)(
)(
V10
2
21
ZXX+
−
V10
)(
2
2
21
ZXX+
−
V10
)(
2
2
21
ZXX+
−
V10
)(
2
2
21
ZXX+
−
V10
)(
2
SQUARE-ROOTER PERFORMANCE
212
XZZ +− )(V10
212
XZZ +− )(V10
212
XZZ +− )(V10
212
XZZ +− )(V10
AD632A AD632B AD632S AD632T
Parameter Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units
CMRR
Bias Current 0.8
Offset Current 0.1 0.1 0.1 0.1 µA
Differential Resistance 10 10 10 10 MΩ
DIVIDER PERFORMANCE
Transfer Function(X1 > X2)
60
80
2.0
90
70
0.8
2.0
80
60
0.8
2.0
90 dM
70
0.8
2.0
µA
Total Error1
(X = 10 V, −10 V ≤ Z ≤ +10 V) ±0.75 ±0.35 ±0.75 ±0.35 %
(X = 1 V, −1 V ≤ Z ≤ +1 V) ±2.0 ±1.0 ±2.0 ±1.0 %
(0.1 V ≤ X ≤ 10 V, −10 V ≤ Z ≤
±2.5 ±1.0 ±2.5 ±1.0 %
10 V)
SQUARER PERFORMANCE
Transfer Function
Total Error (−10 V ≤ X ≤ 10 V) ±0.6 ±0.3 ±0.6 ±0.3 %
Transfer Function, (Z1 ≤ Z2)
Total Error1 (1 V ≤ Z ≤ 10 V)
±1.0 ±0.5 ±1.0 ±0.5 %
POWER SUPPLY SPECIFICATIONS
Supply Voltage
Rated Performance ±15 ±15 ±15 ±15 V
Operating ±8
±18
±8
±18
±8
±22
±8
±22
Supply Current
Quiescent 4
1
Figures given are percent of full-scale, ±10 V (that is, 0.01% = 1 mV).
2
Can be reduced to 3 V using an external resistor between –VS and SF.
3
Irreducible component due to nonlinearity: excludes effect of offsets.
4
Using an external resistor adjusted to give a value of SF = 3 V.
5
See the functional block diagram (Figure 1) for definition of sections.
4 6 4
6
6
4 6 mA
V
Rev. C | Page 4 of 12
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