ANALOG DEVICES AD 630 JNZ Datasheet

Balanced Modulator/Demodulator

AD630

Rev. F Document Feedback

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CM OFF

ADJ

CM OFF

ADJ

DIFF OFF

ADJ

DIFF OFF

ADJ

2.5kΩ

AMP A

2.5kΩ

AMP B

–V

10kΩ

10kΩ

5kΩ

COMP

RINA

CH A+
CH A–

R

IN

B

CH B+
CH B–

SEL B
SEL A

COMP
+V

S

V

OUT

R

B

R

F

R

A

CHANNEL
STATUS
B/A

–V

S

A

B

00784-001

BIAS

+V

S

Data Sheet

FEATURES

Recovers signal from 100 dB noise
2 MHz channel bandwidth
45 V/µs slew rate
Low crosstalk: −120 dB at 1 kHz, −100 dB at 10 kHz
Pin programmable, closed-loop gains of ±1 and ±2

0.05% closed-loop gain accuracy and match
100 µV channel offset voltage (AD630)
350 kHz full power bandwidth
Chips available

APPLICATIONS

Balanced modulation and demodulation
Synchronous detection
Phase detection
Quadrature detection
Phase sensitive detection
Lock in amplification
Square wave multiplication

FUNCTIONAL BLOCK DIAGRAM

Figure 1.

GENERAL DESCRIPTION

The AD630 is a high precision balanced modulator/demodulator
that combines a flexible commutating architecture with the
accuracy and temperature stability afforded by laser wafer trimmed
thin film resistors. A network of on-board applications resistors
provides precision closed-loop gains of ±1 and ±2 with 0.05%
accuracy (AD630B). These resistors may also be used to accurately
configure multiplexer gains of 1, 2, 3, or 4. External feedback
enables high gain or complex switched feedback topologies.

The AD630 can be thought of as a precision op amp with two
independent differential input stages and a precision compara­tor that is used to select the active front end. The rapid response
time of this comparator coupled with the high slew rate and fast
settling of the linear amplifiers minimize switching distortion.

The AD630 is used in precision signal processing and instru­mentation applications that require wide dynamic range. When
used as a synchronous demodulator in a lock-in amplifier
configuration, the AD630 can recover a small signal from
100 dB of interfering noise (see the Lock-In Amplifier
Applications section). Although optimized for operation up to
1 kHz, the circuit is useful at frequencies up to several hundred
kilohertz.

Information furnishe d by
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Other features of the AD630 include pin programmable fre­quency compensation; optional input bias current compensation
resistors, common-mode and differential-offset voltage adjust­ment, and a channel status output that indicates which of the
two differential inputs is active.

PRODUCT HIGHLIGHTS

1. The application flexibility of the AD630 makes it the best

choice for applications that require precisely fixed gain,
switched gain, multiplexing, integrating-switching
functions, and high speed precision amplification.

2. The 100 dB dynamic range of the AD630 exceeds that of

any hybrid or IC balanced modulator/demodulator and is
comparable to that of costly signal processing instruments.

3. The op amp format of the AD630 ensures easy imple-

mentation of high gain or complex switched feedback
functions. The application resistors facilitate the implemen­tation of most common applications with no additional parts.

4. The AD630 can be used as a 2-channel multiplexer with gains

of 1, 2, 3, or 4. The channel separation of 100 dB at 10 kHz
approaches the limit achievable with an empty IC package.

5. Laser trimming of the comparator and amplifying channel

offsets eliminate the need for external nulling in most cases.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] ©2015 Analog Devices, Inc. All rights reserved.

AD630* Product Page Quick Links

Comparable Parts

View a parametric search of comparable parts

Documentation

Application Notes

• AN-214: Ground Rules for High Speed Circuits

• AN-306: Synchronous System Measures µs

• AN-307: Modem-Circuit Techniques Simplify
Instrumentation Designs

• AN-308: Commutating Amp Multiplies Precisely

• AN-349: Keys to Longer Life for CMOS

• AN-683: Strain Gage Measurement Using an AC Excitation

• AN-924: Digital Quadrature Modulator Gain

Data Sheet

• AD630: Balanced Modulator/Demodulator Data Sheet

• AD630: Military Data Sheet

Last Content Update: 08/30/2016

Tools and Simulations

• AD630 SPICE Macro Model

Design Resources

• AD630 Material Declaration

• PCN-PDN Information

• Quality And Reliability

• Symbols and Footprints

Discussions

View all AD630 EngineerZone Discussions

Sample and Buy

Visit the product page to see pricing options

Technical Support

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AD630 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Absolute Maximum Ratings ............................................................ 4

Thermal Resistance ...................................................................... 4

Chip Availability ........................................................................... 4

ESD Caution .................................................................................. 4

Pin Configurations and Function Descriptions ........................... 5

Typical Performance Characteristics ............................................. 9

Test Circuits ..................................................................................... 11

Theory of Operation ...................................................................... 12

Two Wa y s To Look At The AD630 .......................................... 12

How the AD630 Works .............................................................. 12

Circuit Description .................................................................... 13

Other Gain Configurations ....................................................... 14

Switched Input Impedance........................................................ 14

Frequency Compensation ......................................................... 14

Offset Voltage Nulling ............................................................... 15

Channel Status Output .............................................................. 15

Applications Information .............................................................. 16

Balanced Modulator ................................................................... 16

Balanced Demodulator .............................................................. 16

Precision Phase Comparator .................................................... 16

Precision Rectifier Absolute Value ........................................... 16

LVDT Signal Conditioner ......................................................... 17

AC Bridge .................................................................................... 17

Lock-In Amplifier Applications ............................................... 18

Outline Dimensions ....................................................................... 19

Ordering Guide .......................................................................... 20

REVISION HISTORY

7/15—Rev. E to Rev. F

Updated Format .................................................................. Universal

Changes to Features Section, General Description Section,

Product Highlights Section, and Figure 1 ..................................... 1

Added Applications Section ............................................................ 1

Changes to Table 3 ............................................................................ 4

Added Table 4; Renumbered Sequentially .................................... 5

Added Figure 4; Renumbered Sequentially and Table 5 ............. 6

Added Figure 5 and Table 6 ............................................................. 7

Added Table 7 .................................................................................... 8

Changes to Figure 7, Figure 8, and Figure 9.................................. 9

Changes to Figure 13, Figure 14, and Figure 15 ......................... 10

Added Test Circuits Section and Figure 16 to Figure 19 ........... 11

Added Theory of Operation Section............................................ 12

Change to Figure 24 ....................................................................... 13

Updated Outline Dimensions ....................................................... 19

Changes to Ordering Guide .......................................................... 20

6/04—Rev. D to Rev. E

Changes to Ordering Guide ............................................................. 3

Replaced Figure 12 ............................................................................ 9

Changes to AC Bridge Section ......................................................... 9

Replaced Figure 13 ......................................................................... 10

Changes to Lock-In Amplifier Applications ............................... 10

Updated Outline Dimensions ....................................................... 11

6/01—Rev. C to Rev. D

Changes to Specification Table ........................................................ 2

Changes to Thermal Characteristics ............................................... 3

Changes to Ordering Guide ............................................................. 3

Changes to Pin Configurations ....................................................... 3

Changes to Outline Dimensions .................................................. 11

Rev. F | Page 2 of 20

Data Sheet AD630

Settling Time to 0.1% (20 V Step)

3 3 3

µs

SPECIFICATIONS

At 25°C and ±VS = ±15 V, unless otherwise noted.

Table 1.

AD630J/AD630A AD630K/AD630B AD630S

Parameter

GAIN

Open-Loop Gain 90 110 100 120 90 110 dB
±1, ±2 Closed-Loop Gain Error 0.1 0.05 0.1 %
Closed-Loop Gain Match 0.1 0.05 0.1 %
Closed-Loop Gain Drift 2 2 2 ppm/°C

CHANNEL INPUTS

VIN Operational Limit1 (−VS + 4) to (+VS − 1) (−VS + 4) to (+VS − 1) (−VS + 4) to (+VS − 1) V
Input Offset Voltage 500 100 500 µV

T

to T

MIN

800 160 1000 µV

MAX

Input Bias Current 100 300 100 300 100 300 nA
Input Offset Current 10 50 10 50 10 50 nA
Channel Separation at 10 kHz 100 100 100 dB

CO MPARATO R

VIN Operational Limit1 (−VS + 3) to (+VS − 1.5) (−VS + 3) to (+VS − 1.5) (−VS + 3) to (+VS − 1.3) V
Switching Window ±1.5 ±1.5 ±1.5 mV

T

to T

MIN

±2.0 ±2.0 ±2.5 mV

MAX

Input Bias Current 100 300 100 300 100 300 nA
Response Time (−5 mV to +5 mV Step) 200 200 200 ns
Channel Status

I

at VOL = −VS + 0.4 V2 1.6 1.6 1.6 mA

SINK

Pull-Up Voltage (−VS + 33) (−VS + 33) (−VS + 33) V

DYNAMIC PERFORMANCE

Unity Gain Bandwidth 2 2 2 MHz
Slew Rate3 45 45 45 V/µs

Unit Min Typ Max Min Typ Max Min Typ Max

OPERATING CHARACTERISTICS

Common-Mode Rejection 85 105 90 110 90 110 dB
Power Supply Rejection 90 110 90 110 90 110 dB
Supply Voltage Range ±5 ±16.5 ±5 ±16.5 ±5 ±16.5 V
Supply Current 4 5 4 5 4 5 mA

OUTPUT VOLTAGE, AT RL = 2 kΩ

T

to T

MIN

±10 ±10 ±10 V

MAX

Output Short-Circuit Current 25 25 25 mA

TEMPERATURE RANGES

N Package 0 70 0 70 °C
D Package −25 +85 −25 +85 −55 +125 °C

1

If one terminal of each differential channel or comparator input is kept within these limits the other terminal may be taken to the positive supply.

2

I

at VOL = (−VS + 1 V) is typically 4 mA.

SINK

3

Pin 12 open. Slew rate with Pin 12 and Pin 13 shorted is typically 35 V/µs.

Rev. F | Page 3 of 20

AD630 Data Sheet

Maximum Junction Temperature

150°C

00784-002

14

15

16

17

18

7 8

65

4

19
20

1
2

3

13

12

0.089

(2.260)

0.99

(2.515)

1

1
10
9

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage ±18 V
Internal Power Dissipation 600 mW
Output Short-Circuit to Ground Indefinite
Storage Temperature

Ceramic Package −65°C to +150°C
Plastic Package −55°C to +125°C

Lead Temperature Range (Soldering, 10 sec) 300°C

Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.

THERMAL RESISTANCE

Table 3. Thermal Resistance

Package Type θJC θJA Unit

20-Lead PDIP (N-20) 24 61 °C/W
20-Lead SBDIP (D-20) 35 120 °C/W
20-Lead LCC (E-20-4) 35 120 °C/W
20-Lead SOIC_W (RW-20) 38 75 °C/W

CHIP AVAILABILITY

The AD630 is available in laser trimmed, passivated chip form.
Figure 2 shows the AD630 metallization pattern, bonding pads,
and dimensions. AD630 chips are available; consult factory for
details.

Figure 2. Chip Metallization and Pinout

Dimensions shown in inches and (millimeters)

Contact factory for latest dimensions

ESD CAUTION

Rev. F | Page 4 of 20

Data Sheet AD630

00784-030

R

IN

A

1

CH A+

2

DIFF OFF ADJ

3

DIFF OFF ADJ

4

CH A–

20

CH B–

19

CH B+

18

R

IN

B

17

CM OFF ADJ

5

R

A

16

CM OFF ADJ

6

R

F

15

CHANNEL STAT US B/A

7

R

B

14

–V

S

8

V

OUT

13

SEL B

9

COMP

12

SEL A

10

+V

S

11

AD630

TOP VIEW

(Not to S cale)

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Figure 3. 20-Lead SOIC Pin Configuration

Table 4. 20-Lead SOIC Pin Function Descriptions

Pin No. Mnemonic Description

1 RINA 2.5 kΩ Resistor to Noninverting Input of Op Amp A
2 CH A+ Noninverting Input of Op Amp A
3 DIFF OFF ADJ Differential Offset Adjustment
4 DIFF OFF ADJ Differential Offset Adjustment
5 CM OFF ADJ Common-Mode Offset Adjustment
6 CM OFF ADJ Common-Mode Offset Adjustment
7 CHANNEL STAT US B/A B or A Channel Status

8 −VS Negative Supply
9 SEL B B Channel Comparator Input
10 SEL A A Channel Comparator Input
11 +VS Positive Supply
12 COMP Pin to Connect Internal Compensation Capacitor
13 V

Output Voltage

OUT

14 RB 10 kΩ Gain Setting Resistor
15 RF 10 kΩ Feedback Resistor
16 RA 5 kΩ Feedback Resistor
17 RINB 2.5 kΩ Resistor to Noninverting Input of Op Amp B
18 CH B+ Noninverting Input of Op Amp B
19 CH B− Inverting Input of Op Amp B
20 CH A− Inverting Input of Op Amp A

Rev. F | Page 5 of 20

AD630 Data Sheet

00784-031

R

IN

A

CH A+
DIFF OFF ADJ
DIFF OFF ADJ

CH A–
CH B–
CH B+
R

IN

B

CM OFF ADJ

R

A

CM OFF ADJ

R

F

CHANNEL STATUS B/A

R

B

–V

S

V

OUT

SEL B

COMP

SEL A

+V

S

1
2
3
4

20

19
18

17
5
6
7

16

15

14
8

13
9

12

10

1

1

AD630

TOP VIEW

(Not to S cale)

7

CHANNEL STATUS B/A

B or A Channel Status

18

CH B+

Noninverting Input of Op Amp B

Figure 4. 20-Lead PDIP Pin Configuration

Table 5. 20-Lead PDIP Pin Function Descriptions

Pin No. Mnemonic Description

1 RINA 2.5 kΩ Resistor to Noninverting Input of Op Amp A
2 CH A+ Noninverting Input of Op Amp A
3 DIFF OFF ADJ Differential Offset Adjustment
4 DIFF OFF ADJ Differential Offset Adjustment
5 CM OFF ADJ Common-Mode Offset Adjustment
6 CM OFF ADJ Common-Mode Offset Adjustment

8 −VS Negative Supply
9 SEL B B Channel Comparator Input
10 SEL A A Channel Comparator Input
11 +VS Positive Supply
12 COMP Pin to Connect Internal Compensation Capacitor
13 V

Output Voltage

OUT

14 RB 10 kΩ Gain Setting Resistor
15 RF 10 kΩ Feedback Resistor
16 RA 5 kΩ Feedback Resistor
17 RINB 2.5 kΩ Resistor to Noninverting Input of Op Amp B

19 CH B− Inverting Input of Op Amp B
20 CH A− Inverting Input of Op Amp A

Rev. F | Page 6 of 20