ANALOG DEVICES AD 628 ARMZ Datasheet

High Common-Mode Voltage,

Programmable Gain Difference Amplifier

FEATURES

High common-mode input voltage range

±120 V at V
Gain range 0.1 to 100
Operating temperature range: −40°C to +85°C
Supply voltage range

Dual supply: ±2.25 V to ±18 V

Single supply: 4.5 V to 36 V
Excellent ac and dc performance
Offset temperature stability RTI: 10 μV/°C maximum
Offset: ±1.5 V mV maximum
CMRR RTI: 75 dB minimum, dc to 500 Hz, G = +1

APPLICATIONS

High voltage current shunt sensing
Programmable logic controllers
Analog input front end signal conditioning

+5 V, +10 V, ±5 V, ±10 V, and 4 to 20 mA
Isolation
Sensor signal conditioning
Power supply monitoring
Electrohydraulic controls
Motor controls

GENERAL DESCRIPTION

The AD628 is a precision difference amplifier that combines
excellent dc performance with high common-mode rejection
over a wide range of frequencies. When used to scale high
voltages, it allows simple conversion of standard control
voltages or currents for use with single-supply ADCs. A
wideband feedback loop minimizes distortion effects due to
capacitor charging of Σ- ADCs.

A reference pin (V
to single-sided signals. The AD628 converts +5 V, +10 V, ±5 V,
±10 V, and 4 to 20 mA input signals to a single-ended output
within the input range of single-supply ADCs.

The AD628 has an input common mode and differential mode
operating range of ±120 V. The high common mode, input
impedance makes the device well suited for high voltage
measurements across a shunt resistor. The inverting input of
the buffer amplifier is available for making a remote Kelvin
connection.

= ±15 V

S

) provides a dc offset for converting bipolar

REF

AD628

FUNCTIONAL BLOCK DIAGRAM

EXT2

R

EXT1

R

G

67

–IN

+IN

AD628

VS = ±2.5V

A2

OUT

5

R

+V

S

–IN

+IN

100k

8

100k

1

10k

G = +0.1

–IN

A1

+IN

10k

2 3 4

–V

S

10k

V

REF

C

FILT

Figure 1.

130

120

110

100

90

80

CMRR (dB)

70

60

50

40

30

10010 1k 10k 100k

VS = ±15V

FREQUENCY (Hz)

Figure 2. CMRR vs. Frequency of the AD628

A precision 10 kΩ resistor connected to an external pin is
provided for either a low-pass filter or to attenuate large
differential input signals. A single capacitor implements a low­pass filter. The AD628 operates from single and dual supplies
and is available in an 8-lead SOIC_N or an 8-lead MSOP. It
operates over the standard industrial temperature range of

−40°C to +85°C.

2992-001

02992-002

Rev. G

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2002–2007 Analog Devices, Inc. All rights reserved.

AD628

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 7

Thermal Characteristics .............................................................. 7

ESD Caution.................................................................................. 7

Pin Configuration and Function Descriptions............................. 8

Typical Performance Characteristics ............................................. 9

Test Cir c ui t s .....................................................................................13

REVISION HISTORY

4/07—Rev. F to Rev. G

Changes to Features.......................................................................... 1

Changes to Figure 22...................................................................... 11

Changes to Figure 25...................................................................... 13

Changes to Voltage Level Conversion Section............................ 17

Changes to Monitoring Battery Voltages Section ...................... 18

Changes to Figure 34...................................................................... 18

Changes to Figure 35...................................................................... 19

Updated Outline Dimensions....................................................... 20

3/06—Rev. E to Rev. F

Changes to Table 1............................................................................ 3

Changes to Figure 3.......................................................................... 7

Replaced Voltage Level Conversion Section ............................... 16

Changes to Figure 32 and Figure 33............................................. 17

Updated Outline Dimensions....................................................... 19

Changes to Ordering Guide.......................................................... 19

5/05—Rev. D to Rev. E

Changes to Table 1........................................................................... 3

Changes to Table 2........................................................................... 5

Changes to Figure 33.....................................................................18

3/05—Rev. C to Rev. D

Updated Format................................................................ Universal

Changes to Table 1........................................................................... 3

Changes to Table 2........................................................................... 5

4/04—Rev. B to Rev. C

Updated Format................................................................ Universal

Changes to Specifications............................................................... 3

Theory of Operation ...................................................................... 15

Applications Information.............................................................. 16

Gain Adjustment........................................................................ 16

Input Voltage Range................................................................... 16

Voltage Level Conversion.......................................................... 17

Current Loop Receiver .............................................................. 18

Monitoring Battery Voltages..................................................... 18

Filter Capacitor Values............................................................... 19

Kelvin Connection ..................................................................... 19

Outline Dimensions ....................................................................... 20

Ordering Guide .......................................................................... 20

Changes to Absolute Maximum Ratings...................................... 7

Changes to Figure 3......................................................................... 7

Changes to Figure 26.....................................................................13

Changes to Figure 27.....................................................................13

Changes to Theory of Operation................................................. 14

Changes to Figure 29.....................................................................14

Changes to Table 5.........................................................................15

Changes to Gain Adjustment Section......................................... 15

Added the Input Voltage Range Section..................................... 15

Added Figure 30 ............................................................................15

Added Figure 31 ............................................................................15

Changes to Voltage Level Conversion Section ..........................16

Changes to Figure 32.....................................................................16

Changes to Table 6.........................................................................16

Changes to Figure 33 and Figure 34............................................ 17

Changes to Figure 35.....................................................................18

Changes to Kelvin Connection Section...................................... 18

6/03—Rev. A to Rev. B

Changes to General Description ...................................................1

Changes to Specifications............................................................... 2

Changes to Ordering Guide........................................................... 4

Changes to TPCs 4, 5, and 6 .......................................................... 5

Changes to TPC 9............................................................................ 6

Updated Outline Dimensions...................................................... 14

1/03—Rev. 0 to Rev. A

Change to Ordering Guide............................................................. 4

11/02—Rev. 0: Initial Version

Rev. G | Page 2 of 20

AD628

SPECIFICATIONS

TA = 25°C, VS = ±15 V, RL = 2 kΩ, R

Table 1.

AD628AR AD628ARM
Parameter Conditions Min Typ Max Min Typ Max Unit

DIFFERENTIAL AND OUTPUT AMPLIFIER

Gain Equation G = +0.1 (1 + R
Gain Range See Figure 29 0.11 100 0.11 100 V/V
Offset Voltage

vs. Temperature 4 8 4 8 μV/°C

3

CMRR

500 Hz 75 75 dB

Minimum CMRR Over Temperature −40°C to +85°C 70 70 dB

vs. Temperature 1 4 1 4 (μV/V)/°C
PSRR (RTI) VS = ±10 V to ±18 V 77 94 77 94 dB
Input Voltage Range

Common Mode −120 +120 −120 +120 V
Differential −120 +120 −120 +120 V

Dynamic Response

Small Signal Bandwidth −3 dB G = +0.1 600 600 kHz
Full Power Bandwidth 5 5 kHz
Settling Time G = +0.1, to 0.01%, 100 V step 40 40 μs
Slew Rate 0.3 0.3 V/μs

Noise (RTI)

Spectral Density 1 kHz 300 300 nV/√Hz

0.1 Hz to 10 Hz 15 15 μV p-p
DIFFERENTIAL AMPLIFIER

Gain 0.1 0.1 V/V

Error −0.1 +0.01 +0.1 −0.1 +0.01 +0.1 %

vs. Temperature 5 5 ppm/°C

Nonlinearity 5 5 ppm

vs. Temperature 3 10 3 10 ppm
Offset Voltage RTI of input pins −1.5 +1.5 −1.5 +1.5 mV

vs. Temperature 8 8 μV/°C

Input Impedance

Differential 220 220 kΩ
Common Mode 55 55 kΩ

4

CMRR

500 Hz 75 75 dB

Minimum CMRR Over Temperature −40°C to +85°C 70 70 dB

vs. Temperature 1 4 1 4 (μV/V)/°C
Output Resistance 10 10 kΩ

Error −0.1 +0.1 −0.1 +0.1 %

= 10 kΩ, R

EXT1

V

EXT2

= 0 V; RTI of input pins2;

CM

output amplifier G = +1

RTI of input pins;
G = +0.1 to +100

RTI of input pins;
G = +0.1 to +100

= ∞, V

EXT1/REXT2

= 0 V, unless otherwise noted.

REF

) V/V

−1.5 +1.5 −1.5 +1.5 mV

75 75 dB

75 75 dB

Rev. G | Page 3 of 20

AD628

AD628AR AD628ARM
Parameter Conditions Min Typ Max Min Typ Max Unit

OUTPUT AMPLIFIER

Gain Equation G = (1 + R

Nonlinearity G = +1, V

EXT1/REXT2

OUT

Offset Voltage RTI of output amp −0.15 +0.15 −0.15 +0.15 mV

vs. Temperature 0.6 0.6 μV/°C

Output Voltage Swing RL = 10 kΩ −14.2 +14.1 −14.2 +14.1 V

R

= 2 kΩ −13.8 +13.6 −13.8 +13.6 V

L

Bias Current 1.5 3 1.5 3 nA
Offset Current 0.2 0.5 0.2 0.5 nA
CMRR VCM = ±13 V 130 130 dB
Open-Loop Gain V

= ±13 V 130 130 dB

OUT

POWER SUPPLY

Operating Range ±2.25 ±18 ±2.25 ±18 V
Quiescent Current 1.6 1.6 mA

TEMPERATURE RANGE −40 +85 −40 +85 °C

1

To use a lower gain, see the Ga section. in Adjustment

2

The addition of the difference amplifier and output amplifier offset voltage does not exceed this specification.

⎡

3

Error due to common mode as seen at the output:

4

Error due to common mode as seen at the output of A1:

OUT

⎢

=V

⎢
⎢

⎣

V

OUT

) V/V

= ±10 V 0.5 0.5 ppm

⎤

)(0.1)(

V

⎥

10

A1

CM

×

⎥

75

⎥

20

⎦

⎡
⎢

=

⎢
⎢

⎣

⎤

)(0.1)(

V

⎥

CM

.

⎥

75

⎥

20

10

⎦

][

GainAmplifierOutput

.

Rev. G | Page 4 of 20

AD628

TA = 25°C, VS = 5 V, RL = 2 kΩ, R

Table 2.

AD628AR AD628ARM
Parameter Conditions Min Typ Max Min Typ Max Unit

DIFFERENTIAL AND OUTPUT AMPLIFIER

Gain Equation G = +0.1(1+ R
Gain Range See Figure 29 0.11 100 0.11 100 V/V
Offset Voltage

vs. Temperature 6 15 6 15 μV/°C

3

CMRR
500 Hz 75 75 dB

Minimum CMRR Over Temperature −40°C to +85°C 70 70 dB

vs. Temperature 1 4 1 4 (μV/V)/°C

PSRR (RTI) VS = 4.5 V to 10 V 77 94 77 94 dB
Input Voltage Range

Common Mode

4

Differential −15 +15 −15 +15 V

Dynamic Response

Small Signal Bandwidth – 3 dB G = +0.1 440 440 kHz
Full Power Bandwidth 30 30 kHz
Settling Time G = +0.1; to 0.01%, 30 V step 15 15 μs
Slew Rate 0.3 0.3 V/μs

Noise (RTI)

Spectral Density 1 kHz 350 350 nV/√Hz

0.1 Hz to 10 Hz 15 15 μV p-p
DIFFERENTIAL AMPLIFIER

Gain 0.1 0.1 V/V

Error –0.1 +0.01 +0.1 –0.1 +0.01 +0.1 %
Nonlinearity 3 3 ppm

vs. Temperature 3 10 3 10 ppm

Offset Voltage RTI of input pins −2.5 +2.5 −2.5 +2.5 mV

vs. Temperature 10 10 μV/°C

Input Impedance

Differential 220 220 kΩ
Common Mode 55 55 kΩ

5

CMRR
500 Hz 75 75 dB

Minimum CMRR Over Temperature −40°C to +85°C 70 70 dB

vs. Temperature 1 4 1 4 (μV/V)/°C

Output Resistance 10 10 kΩ

Error −0.1 +0.1 −0.1 +0.1 %

OUTPUT AMPLIFIER

Gain Equation G = (1 + R

Nonlinearity G = +1, V

Output Offset Voltage RTI of output amplifier −0.15 +0.15 −0.15 +0.15 mV

vs. Temperature 0.6 0.6 μV/°C
Output Voltage Swing RL = 10 kΩ 0.9 4.1 0.9 4.1 V
R
Bias Current 1.5 3 1.5 3 nA
Offset Current 0.2 0.5 0.2 0.5 nA
CMRR VCM = 1 V to 4 V 130 130 dB
Open-Loop Gain V

= 10 kΩ, R

EXT1

= ∞, V

EXT2

= 2.25 V; RTI of input pins2;

V

CM

= 2.5 V, unless otherwise noted.

REF

EXT1/REXT2

) V/V

−3.0 +3.0 −3.0 +3.0 mV

output amplifier G = +1

RTI of input pins; G = +0.1 to +100 75 75 dB

−12 +17 −12 +17 V

RTI of input pins; G = +0.1 to +100 75 75 dB

EXT1/REXT2

OUT

= 2 kΩ 1 4 1 4 V

L

= 1 V to 4 V 130 130 dB

OUT

) V/V

= 1 V to 4 V 0.5 0.5 ppm

Rev. G | Page 5 of 20

AD628

AD628AR AD628ARM
Parameter Conditions Min Typ Max Min Typ Max Unit

POWER SUPPLY

Operating Range ±2.25 +36 ±2.25 +36 V
Quiescent Current 1.6 1.6 mA

TEMPERATURE RANGE −40 +85 −40 +85 °C

1

To use a lower gain, see the Gain Adjustment section.

2

The addition of the difference amplifier and output amplifier offset voltage does not exceed this specification.

10

A1

⎤

)(0.1)(

V

⎥

CM

×

⎥

75

⎥

20

⎦

.

REF

⎡
⎢

=

⎢
⎢

⎣

⎤

)(0.1)(

V

⎥

CM

.

⎥

75

⎥

20

10

⎦

GainAmplifierOutput

⎡

3

Error due to common mode as seen at the output: ][

4

Greater values of voltage are possible with greater or lesser values of V

5

Error due to common mode as seen at the output of A1:

⎢

V .

=

OUT

⎢
⎢

⎣

V

OUT

Rev. G | Page 6 of 20

AD628

A

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage ±18 V
Internal Power Dissipation See Figure 3
Input Voltage (Common Mode) ±120 V
Differential Input Voltage ±120 V

1

1

Output Short-Circuit Duration Indefinite
Storage Temperature Range −65°C to +125°C
Operating Temperature Range –40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C

1

When using ±12 V supplies or higher, see the section. Input Voltage Range

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL CHARACTERISTICS

1.6

1.4

1.2

1.0

TION (W)

0.8

0.6

POWER DISSIP

0.4

0.2

8-LEAD SOIC PACKAGE

MSOP 
SOIC 

0

(JEDEC; 4-L AYER BOARD) = 132.54°C/W

JA

(JEDEC; 4-L AYER BOARD) = 154°C/W

JA

AMBIENT TEMPERATURE (°C)

8-LEAD MSOP PACKAGE

200–40 –20–60 40 60 80 100

Figure 3. Maximum Power Dissipation vs. Temperature

TJ = 150°C

02992-003

ESD CAUTION

Rev. G | Page 7 of 20

AD628

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

8

–IN

7

+V

S

6

R

G

5

OUT

02992-004

V

C

+IN

–V

REF

FILT

S

1

2

AD628

TOP VIEW

3

(Not to Scale)

4

Figure 4. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 +IN Noninverting Input
2 −VS Negative Supply Voltage
3 V
4 C

Reference Voltage Input

REF

Filter Capacitor Connection

FILT

5 OUT Amplifier Output
6 RG Output Amplifier Inverting Input
7 +VS Positive Supply Voltage
8 −IN Inverting Input

Rev. G | Page 8 of 20

AD628

TYPICAL PERFORMANCE CHARACTERISTICS

140

G = +0.1

120

100

80

60

PSRR (d B)

40

20

–15V +15V

+2.5V

% OF UNIT S

40

8440 UNITS

35

30

25

20

15

10

5

0

–1.6 –1. 2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0

INPUT OFFSET VOLTAGE (mV)

Figure 5. Typical Distribution of Input Offset Voltage,

= ±15 V, SOIC_N Package

V

S

25

8440 UNITS

20

15

10

% OF UNITS

5

0

–74 –78 –82 –86 –90 –94 –98 –102 –106 –110

CMRR (dB)

Figure 6. Typical Distribution of CMRR, SOIC_N Package

130

120

110

100

90

80

CMRR (dB)

70

60

50

40

30

10010 1k 10k 100k

VS = ±15V

VS = ±2.5V

FREQUENCY (Hz)

Figure 7. CMRR vs. Frequency

0

0.1 1 10 100 1k 10k 100k 1M

02992-005

FREQUENCY ( Hz)

02992-008

Figure 8. PSRR vs. Frequency, Single and Dual Supplies

1000

VOLTAGE NOISE DENSITY (nV/ Hz)

100

1 10 100 1k 10k 100k

02992-006

Figure 9. Voltage Noise Spectral Density, RTI, V

FREQUENCY (Hz)

= ±15 V

S

02992-009

1000

VOLTAGE NOISE DENSITY (nV/Hz )

100

1 10 100 1k 10k 100k

02992-007

Figure 10. Voltage Noise Spectral Density, RTI, V

FREQUENCY ( Hz)

= ±2.5 V

S

02992-010

Rev. G | Page 9 of 20

AD628

40

1s

100

90

9638 UNITS

35

30

25

20

NOISE (5µV/DIV)

10

0

0

5

TIME (S econds)

Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI

60

50

G = +100

40

30

G = +10

20

10

G = +1

GAIN (dB)

0

–10

G = +0.1

–20

–30

–40

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 12. Small Signal Frequency Response,

V

= 200 mV p-p, G = +0.1, +1, +10, and +100

OUT

60

50

G = +100

40

30

G = +10

20

10

G = +1

GAIN (dB)

0

–10

G = +0.1

–20

–30

–40

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

Figure 13. Large Signal Frequency Response,

V

= 20 V p-p, G = +0.1, +1, +10, and +100

OUT

15

% OF DEVICES

10

5

10

02992-011

0

012345678910

GAIN ERROR (ppm)

02992-014

Figure 14. Typical Distribution of +1 Gain Error

150

UPPER CMV LIMIT

100

–40°C

50

0

+25°C

–50

COMMON-MODE VOLTAGE (V)

–100

–150

02992-012

+85°C

–40°C

+85°C

501015

VS (±V)

V

= 0V

REF

LOWER CMV LIMIT

20

02992-015

Figure 15. Common-Mode Operating Range vs.

Power Supply Voltage for Three Temperatures

500µV

100

90

OUTPUT ERROR ( µV)

10

0

02992-013

Figure 16. Normalized Gain Error vs. V

VS= ±15V

RL = 1k

RL = 2k

RL = 10k

OUTPUT VOLTAGE (V)

, VS = ±15 V

OUT

4.0V

02992-016

Rev. G | Page 10 of 20

AD628

100µV

100

90

OUTPUT ERROR (µ V)

10

0

Figure 17. Normalized Gain Error vs. V

VS= ±2.5V

RL = 1k

RL = 2k

RL = 10k

OUTPUT VOLTAGE (V)

, VS = ±2.5 V

OUT

4

3

2

BIAS CURRENT (nA)

1

0

–40 –20 0 20 40 60 80 100

TEMPERATURE (°C)

Figure 18. Bias Current vs. Temperature Buffer

15

10

5

–40°C

–25°C

+85°C

+25°C

500mV

500mV

100

90

10

0

50mV

02992-017

4µs

02992-020

Figure 20. Small Signal Pulse Response,

= 2 kΩ, CL = 0 pF, Top: Input, Bottom: Output

R

L

500mV

100

90

10

0

50mV

02992-018

4µs

02992-021

Figure 21. Small Signal Pulse Response,

= 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output

R

L

100

90

10.0V

0

–5

OUTPUT VOLTAGE SWING (V)

–10

–15

0 5 10 15 2 0 25

OUTPUT CURRENT ( mA)

+85°C

+25°C

–40°C

–25°C

Figure 19. Output Voltage Operating Range vs. Output Current

02992-019

Rev. G | Page 11 of 20

10.0V

10

0

Figure 22. Large Signal Pulse Response,

= 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output

R

L

40µs

02992-022

AD628

100

90

5V

10mV

10

0

100µs

Figure 23. Settling Time to 0.01%, 0 V to 10 V Step

02992-023

100

90

5V

10mV

10

0

100µs

Figure 24. Settling Time to 0.01% 0 V to −10 V Step

02992-024

Rev. G | Page 12 of 20

AD628

TEST CIRCUITS

HP3589A

SPECTRUM ANALYZER

+V

S

7

–IN

8

100k

+IN

1

100k

–IN

8

100k

+IN

1

100k

–

10k 10k

–IN

G = +0.1

+IN

10k

C

V

REF

3246

FILT

–V

S

OP177

+

Figure 25. CMRR vs. Frequency

+V

S

7

10k 10k 

–IN

G = +0.1

+IN

10k

G = +100

+IN

–IN

AD628

+IN

–IN

R

G

AD628

OUT

5

OUT

5

1VAC

+15V

20

–

AD829

+

G = +100

G = +100

+

AD829

–

FET

PROBE

SCOPE

02992-025

32 46

V

REF

C

FILT

–V

S

R

G

Figure 26. PSRR vs. Frequency

Rev. G | Page 13 of 20

02992-026

AD628

HP3561A

SPECTRUM ANALYZER

+V

S

C

FILT

7

4

–IN

+IN

100k

8

100k

1

V

REF

10k 10k

–IN

G = +0.1

+IN

10k

–V

S

10k

+IN

–IN

5

OUT

AD628

623

R

G

10k

02992-027

Figure 27. Noise Tests

Rev. G | Page 14 of 20

AD628

THEORY OF OPERATION

The AD628 is a high common-mode voltage difference
amplifier, combined with a user-configurable output amplifier
(see

Figure 28 and Figure 29). Differential mode voltages in
excess of 120 V are accurately scaled by a precision 11:1 voltage
divider at the input. A reference voltage input is available to the
user at Pin 3 (V

). The output common-mode voltage of the

REF

difference amplifier is the same as the voltage applied to the
reference pin. If the uncommitted amplifier is configured for
gain, connect Pin 3 to one end of the external gain resistor to
establish the output common-mode voltage at Pin 5 (OUT).

The output of the difference amplifier is internally connected to
a 10 kΩ resistor trimmed to better than ±0.1% absolute accuracy.
The resistor is connected to the noninverting input of the
output amplifier and is accessible at Pin 4 (C

). A capacitor

FILT

can be connected to implement a low-pass filter, a resistor can
be connected to further reduce the output voltage, or a clamp
circuit can be connected to limit the output swing.

The uncommitted amplifier is a high open-loop gain, low offset,
low drift op amp, with its noninverting input connected to the
internal 10 kΩ resistor. Both inputs are accessible to the user.

Careful layout design has resulted in exceptional common­mode rejection at higher frequencies. The inputs are connected
to Pin 1 (+IN) and Pin 8 (−IN), which are adjacent to the power
pins, Pin 2 (−V

) and Pin 7 (+VS). Because the power pins are at

S

ac ground, input impedance balance and, therefore, common­mode rejection are preserved at higher frequencies.

R

G

6

–IN

+IN

10k

10k

G = +0.1

A1

V

REF

10k

–IN

A2

+IN

43

C

FILT

5

OUT

–IN

+IN

100k

8

100k

1

Figure 28. Simplified Schematic

02992-028

C

FILT

47

AD628

+IN

A2

–IN

6

G

R

EXT3

R

EXT1

5

OUT

02992-029

–IN

+IN

+V

S

S

REFERENCE

10k

G = +0.1

–IN

A1

+IN

10k

VOLTAGE

10k

32

V

REF

R

R

EXT2

100k

8

100k

1

–V

Figure 29. Circuit Connections

Rev. G | Page 15 of 20

AD628

≤

+

APPLICATIONS INFORMATION

GAIN ADJUSTMENT

The AD628 system gain is provided by an architecture
consisting of two amplifiers (see
input stage is fixed at 0.1; the output buffer is user adjustable
as G

= 1 + R

A2

G 10.1

TOTAL

EXT1/REXT2

. The system gain is then

⎛

R

⎜

+×=

⎜

R

⎝

At a 2 nA maximum, the input bias current of the buffer amplifier
is very low and any offset voltage induced at the buffer amplifier
by its bias current may be neglected (2 nA × 10 kΩ = 20 µV).
However, to absolutely minimize bias current effects, select
R

EXT1

and R

so that their parallel combination is 10 kΩ. If

EXT2

practical resistor values force the parallel combination of R
and R
for the difference.

below 10 kΩ, add a series resistor (R

EXT2

Table 5 lists several values of gain and

corresponding resistor values.

Table 5. Nearest Standard 1% Resistor Values for
Various Gains (see

Total Gai n
(V/V)

Figure 29)

A2 Gain
(V/V)

0.1 1 10 k ∞ 0

0.2 2 20 k 20 k 0

0.25 2.5 25.9 k 18.7 k 0

0.5 5 49.9 k 12.4 k 0
1 10 100 k 11 k 0
2 20 200 k 10.5 k 0
5 50 499 k 10.2 k 0
10 100 1 M 10.2 k 0

To set the system gain to <0.1, create an attenuator by placing
Resistor R

from Pin 4 (C

EXT4

divider is formed by the 10 kΩ resistor that is in series with the
positive input of A2 and Resistor R
unity gain.

Using a divider and setting A2 to unity gain yields

⎛

G

/

DIVIDERW

0.1

⎜

×=

⎜
⎝

Figure 29). The gain of the

⎞

EXT1

⎟

(1)

⎟

EXT2

⎠

EXT1

) to make up

EXT3

(Ω) R

R

EXT1

) to the reference voltage. A

FILT

EXT4

R

EXT4

R

k10

+

EXT4

(Ω) R

EXT2

EXT3

. A2 is configured for

⎞
⎟

1

×

⎟
⎠

(Ω)

INPUT VOLTAGE RANGE

VREF and the supply voltage determine the common-mode
input voltage range. The relation is expressed by

VVV

10)V2.1–(11 −

(2)

+

UPPER

LOWER

SCM

≥

−

SCM

where:

V

is the positive supply.

S+

is the negative supply.

V

S−

1.2 V is the headroom needed for suitable performance.

Equation 2 provides a general formula for calculating the
common-mode input voltage range. However, keep the AD628
within the maximum limits listed in
optimal performance. This is illustrated in
maximum common-mode input voltage is limited to ±120 V.
Figure 31 shows the common-mode input voltage bounds for
single-supply voltages.

200

150

100

50

0

–50

–100

INPUT COMMON-MODE VOLTAGE (V)

–150

–200

Figure 30. Input Common-Mode Voltage vs. Supply Voltage

100

80

60

40

20

0

–20

–40

INPUT COMMON-MODE VOLTAGE (V)

–60

–80

Figure 31. Input Common-Mode Voltage vs.

Supply Voltage for Single Supplies

MAXIMUM INPUT COMMON-MODE

SUPPLY VOLTAGE (±V)

for Dual Supplies

VOLTAGE WHEN V

SINGLE- SUPPLY VOLTAGE (V)

REF

VV 10)V2.1(11V

−

REF

Tabl e 1 to maintain

Figure 30 where the

VOLTAGE WHEN V

862401012

MAXIMUM INPUT COMMON-MODE

862401012

= GND

REF

1416

02992-035

= MIDSUPPLY

REF

1416

02992-034

Rev. G | Page 16 of 20

AD628

V

–12V

The differential input voltage range is constrained to the linear
operation of the internal amplifiers, A1 and A2. The voltage
applied to the inputs of A1 and A2 should be between

+ 1.2 V and VS+ − 1.2 V. Similarly, the outputs of A1 and A2

V

S−

should be kept between V

+ 0.9 V and VS+ − 0.9 V.

S−

VOLTAGE LEVEL CONVERSION

Industrial signal conditioning and control applications typically
require connections between remote sensors or amplifiers and
centrally located control modules. Signal conditioners provide
output voltages of up to ±10 V full scale. However, ADCs or
microprocessors operating on single 3.3 V to 5 V logic supplies
are now the norm. Thus, the controller voltages require further
reduction in amplitude and reference.

Furthermore, voltage potentials between locations are seldom
compatible, and power line peaks and surges can generate
destructive energy between utility grids. The AD628 offers an
ideal solution to both problems. It attenuates otherwise destruc­tive signal voltage peaks and surges by a factor of 10 and shifts
the differential input signal to the desired output voltage.

Conversion from voltage-driven or current-loop systems is
easily accomplished using the circuit shown in
shows a circuit for converting inputs of various polarities and
amplitudes to the input of a single-supply ADC.

To adjust common-mode output voltage, connect Pin 3 (V
and the lower end of the 10 kΩ resistor to the desired voltage.
The output common-mode voltage is the same as the reference
voltage.

Figure 32. This

REF

)

Designing such an application can be done in a few simple
steps, which includes the following:

• Determine the required gain. For example, if the input

voltage must be changed from ±10 V to +5 V, the gain now
needs to be +5/+20 or +0.25.

• Determine if the circuit common-mode voltage should be

changed. An

AD7940 ADC is illustrated for this example.

When operating from a 5 V supply, the common-mode
voltage of the

AD7940 is half the supply, or 2.5 V. If the

AD628 reference pin and the lower terminal of the 10 kΩ
resistor are connected to a 2.5 V voltage source, the output
common-mode voltage is 2.5 V.

Tabl e 6 shows resistor and reference values for commonly used
single-supply converter voltages. R

is included as an option

EXT3

to balance the source impedance into A2. This is described in
more detail in the

Gain Adjustment section.

Table 6. Nearest 1% Resistor Values for Voltage Level
Conversion Applications

Input
Voltage (V)

ADC
Supply
Voltage (V)

Desired
Output
Voltage (V)

V
(V)

REF

R

EXT1

(kΩ)

R

EXT2

kΩ)

±10 5 2.5 2.5 15 10
±5 5 2.5 2.5 39.7 10
+10 5 2.5 0 39.7 10
+5 5 2.5 0 89.8 10
±10 3 1.25 1.25 2.49 10
±5 3 1.25 1.25 15 10
+10 3 1.25 0 15 10
+5 3 1.25 0 39.7 10

+12

10F0.1F 10F0.1F

±10V

7

–IN

8

100k

+IN

1

100k

+V

S

10k

A1

10k

V

REF

3 4

AD628 REFERENCE VO LTAGE

15nF

10k

C

FILT

R

10k

–V

EXT2

2

S

6

AD628

A2

R

G

R

1

1

OUT

E

1

T

X

5

k



AD8606

1/2

SERIAL DATA

SCLK

49.9

5

33nF

2

3

10k

10k

7

AD8606

2/2

AD7940

3

V

IN

GND

2

10F

8

5

6

4

SDATA

V

DD

1

0.1F

V

0.1F

CS

OUT

4

5

6

6

10F

REF195

4

V

IN

+12V

2

3

02992-030

Figure 32. Level Shifter

Rev. G | Page 17 of 20

AD628

249

CURRENT LOOP RECEIVER

Analog data transmitted on a 4 to 20 mA current loop can be
detected with the receiver shown in
ideal choice for such a function because the current loop is
driven with a compliance voltage sufficient to stabilize the loop,
and the resultant common-mode voltage often exceeds commonly
used supply voltages. Note that with large shunt values, a resistance
of equal value must be inserted in series with the inverting
input to compensate for an error at the noninverting input.

Figure 33. The AD628 is an

MONITORING BATTERY VOLTAGES

Figure 34 illustrates how the AD628 is used to monitor a battery
charger. Voltages approximately eight times the power supply
voltage can be applied to the input with no damage. The resistor
divider action is well suited for the measurement of many
power supply applications, such as those found in battery
chargers or similar equipment.

For proper operation, the common-mode voltage must satisfy
the input specifications in

Tabl e 1, as well as Equation 2.

V

= 15V

CM

100k249

1

100k

8

I = 4 TO 20mA

10k

+15V

–15V

7 23

10k

10k

210k 100k

+2.5V 9.53k

4

6

AD628

0V TO 5V

5

TO ADC

02992-031

Figure 33. Level Shifter for 4 to 20 mA Current Loop

+5V

nV

(V)

CHARGING

CIRCUIT

BAT

+1.5V

BATTERY

OTHER

BATTERIES IN

CHARGING

CIRCUIT

–IN

+IN

100k

100k

10k

–IN

+IN

10k

G=+0.1

A1

10k

+IN

–IN

AD628

TO ADC

A2

OUT

R

R

EXT1

10k

G

V

–5V

REF

Figure 34. Battery Voltage Monitor

Rev. G | Page 18 of 20

C

FILT

02992-032

AD628

FILTER CAPACITOR VALUES

Connect a capacitor to Pin 4 (C
filter. The capacitor value is

C = 15.9/f

where f

(µF)

t

is the desired 3 dB filter frequency.

t

Tabl e 7 shows several frequencies and their closest standard
capacitor values.

Table 7. Capacitor Values for Various Filter Frequencies

Frequency (Hz) Capacitor Value (μF)

10 1.5
50 0.33
60 0.27
100 0.15
400 0.039
1 k 0.015
5 k 0.0033
10 k 0.0015

) to implement a low-pass

FILT

+V

S

KELVIN CONNECTION

In certain applications, it may be desirable to connect the
inverting input of an amplifier to a remote reference point.
This eliminates errors resulting in circuit losses in inter­connecting wiring. The AD628 is particularly suited for this
type of connection. In
feedback matches the source impedance of A2. This is
described in more detail in the

Figure 35, a 10 kΩ resistor added in the

Gain Adjustment section.

–IN

+IN

100k

10k

–IN

+IN

G = +0.1

A1

10k10k100k

+IN

–IN

A2

OUT

R

G

CIRCUIT

LOSS

10k

LOAD

AD628

V

–V

S

REF

VS/2

C

FILT

02992-033

Figure 35. Kelvin Connection

Rev. G | Page 19 of 20

AD628

OUTLINE DIMENSIONS

3.20

3.00

2.80

8

5

4

SEATING
PLANE

5.15

4.90

4.65

1.10 MAX

0.23

0.08

8°
0°

3.20

3.00

1

2.80

PIN 1

0.95

0.85

0.75

0.65 BSC

0.15

0.38

0.00

0.22

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 36. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

0.25 (0.0098)

0.10 (0.0040)

COPLANARI TY

0.10

CONTROL LING DIMENSI ONS ARE IN MIL LIMET ERS; IN CH DIMENSI ONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

85

1

1.27 (0.0500)

SEATING

PLANE

COMPLIANT TO JEDE C STANDARDS MS-012-A A

BSC

6.20 (0. 2441)

5.80 (0. 2284)

4

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

8°
0°

0.25 (0.0098)

0.17 (0.0067)

Figure 37. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body (R-8)

Dimensions shown in millimeters and (inches)

0.80

0.60

0.40

0.50 (0. 0196)

0.25 (0. 0099)

1.27 (0. 0500)

0.40 (0. 0157)

45°

012407-A

ORDERING GUIDE

Model Temperature Range Description Package Option Branding

AD628AR −40°C to +85°C 8-Lead SOIC_N R-8
AD628AR-REEL −40°C to +85°C 8-Lead SOIC_N 13" Reel R-8
AD628AR-REEL7 −40°C to +85°C 8-Lead SOIC_N 7" Reel R-8
AD628ARZ
AD628ARZ-RL
AD628ARZ-R7
AD628ARM −40°C to +85°C 8-Lead MSOP RM-8 JGA
AD628ARM-REEL −40°C to +85°C 8-Lead MSOP 13" Reel RM-8 JGA
AD628ARM-REEL7 −40°C to +85°C 8-Lead MSOP 7" Reel RM-8 JGA
AD628ARMZ
AD628ARMZ-RL
AD628ARMZ-R7
AD628-EVAL Evaluation Board

1

Z = RoHS Compliant Part.

©2002–2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02992-0-4/07(G)

1

1

1

1

1

1

−40°C to +85°C 8-Lead SOIC_N R-8

−40°C to +85°C 8-Lead SOIC_N 13" Reel R-8

−40°C to +85°C 8-Lead SOIC_N 7" Reel R-8

−40°C to +85°C 8-Lead MSOP RM-8 JGZ

−40°C to +85°C 8-Lead MSOP 13" Reel RM-8 JGZ

−40°C to +85°C 8-Lead MSOP 7" Reel RM-8 JGZ

Rev. G | Page 20 of 20