Datasheet AD628 Datasheet (Analog Devices)

High Common-Mode Voltage

+IN–

Programmable Gain Difference Amplifier

FEATURES

High common-mode input voltage range

±120 V at V
Gain range 0.1 to 100
Operating temperature range: −40°C to ±85°C
Supply voltage range

Dual supply: ±2.25 V to ±18 V

Single supply: 4.5 V to 36 V
Excellent ac and dc performance
Offset temperature stability RTI: 10 µV/°C max
Offset: ±1.5 V mV max
CMRR RTI: 75 dB min, dc to 500 Hz, G = +1

APPLICATIONS

High voltage current shunt sensing
Programmable logic controllers
Analog input front end signal conditioning

+5 V, +10 V, ±5 V, ±10 V, and 4 to 20 mA
Isolation
Sensor signal conditioning
Power supply monitoring
Electrohydraulic control
Motor control

GENERAL DESCRIPTION

The AD628 is a precision difference amplifier that combines
excellent dc performance with high common-mode rejection
over a wide range of frequencies. When used to scale high
voltages, it allows simple conversion of standard control
voltages or currents for use with single-supply ADCs. A
wideband feedback loop minimizes distortion effects due to
capacitor charging of Σ-Δ ADCs.

A reference pin (V
bipolar to single-sided signals. The AD628 converts +5 V,
+10 V, ±5 V, ±10 V, and 4 to 20 mA input signals to a single­ended output within the input range of single-supply ADCs.

The AD628 has an input common-mode and differential
mode operating range of ±120 V. The high common-mode
input impedance makes the device well-suited for high voltage
measurements across a shunt resistor. The buffer amplifier’s
inverting input is available for making a remote Kelvin
connection.

= ±15 V

S

) provides a dc offset for converting

REF

AD628

FUNCTIONAL BLOCK DIAGRAM

R

+V

S

100kΩ

IN

100kΩ

–V

10kΩ

G = +0.1

–IN

A1

+IN

10kΩ

V

S

REF

10kΩ

C

FILT

Figure 1.

130

120

110

100

90

80

CMRR (dB)

70

60

50

40

30

10010 1k 10k 100k

VS = ±15V

FREQUENCY (Hz)

Figure 2. CMRR vs. Frequency of the AD628

A precision 10 kΩ resistor connected to an external pin is
provided for either a low-pass filter or to attenuate large
differential input signals. A single capacitor implements a low­pass filter. The AD628 operates from single and dual supplies and
is available in an 8-lead SOIC or MSOP package. It operates over
the standard industrial temperature range of −40°C to +85°C.

EXT2

R

VS = ±2.5V

R

EXT1

G

–IN

+IN

AD628

A2

OUT

02992-C-001

02992-C-002

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone]

www.analog.com

©2005 Analog Devices, Inc. All rights reserved.

AD628

TABLE OF CONTENTS

Specifications..................................................................................... 3

REVISION HISTORY

Absolute Maximum Ratings............................................................ 7

ESD Caution.................................................................................. 7

Pin Configuration and Function Descriptions............................. 8

Typical Performance Characteristics ............................................. 9

Test C ir c uits ..................................................................................... 13

Theory of Operation ...................................................................... 15

Applications..................................................................................... 16

Gain Adjustment ........................................................................ 16

Input Voltage Range ................................................................... 16

Voltage Level Conversion.......................................................... 17

Current Loop Receiver............................................................... 18

Monitoring Battery Voltages..................................................... 18

Filter Capacitor Values............................................................... 19

Kelvin Connection ..................................................................... 19

Outline Dimensions ....................................................................... 20

Ordering Guide........................................................................... 20

3/05—Rev. C to Rev. D

Updated Format.................................................................Universal

Changes to Table 1........................................................................... 3

Changes to Table 2........................................................................... 5

4/04—Rev. B to Rev. C

Updated Format.................................................................Universal

Changes to Specifications............................................................... 3

Changes to Absolute Maximum Ratings...................................... 7

Changes to Figure 3......................................................................... 7

Changes to Figure 26.....................................................................13

Changes to Figure 27.....................................................................13

Changes to Theory of Operation................................................. 14

Changes to Figure 29.....................................................................14

Changes to Table 5......................................................................... 15

Changes to Gain Adjustment Section......................................... 15

Added the Input Voltage Range Section..................................... 15

Added Figure 30 ............................................................................15

Added Figure 31 ............................................................................15

Changes to Voltage Level Conversion Section .......................... 16

Changes to Figure 32.....................................................................16

Changes to Table 6......................................................................... 16

Changes to Figure 33 and Figure 34............................................ 17

Changes to Figure 35.....................................................................18

Changes to Kelvin Connection Section...................................... 18

6/03—Rev. A to Rev. B

Changes to General Description ...................................................1

Changes to Specifications............................................................... 2

Changes to Ordering Guide........................................................... 4

Changes to TPCs 4, 5, and 6 .......................................................... 5

Changes to TPC 9............................................................................ 6

Updated Outline Dimensions...................................................... 14

1/03—Rev. 0 to Rev. A

Change to Ordering Guide............................................................. 4

11/02—Rev. 0: Initial Version

Rev. D | Page 2 of 20

AD628

SPECIFICATIONS

TA = 25°C, VS = ±15 V, RL = 2 kΩ, R

Table 1.

AD628AR AD628ARM
Parameter Conditions Min Typ Max Min Typ Max Unit

DIFFERENTIAL AMP + OUTPUT AMP

Gain Equation G = +0.1(1+ R

Gain Range See Figure 29 0.11 100 0.11 100 V/V

Offset Voltage

vs. Temperature 4 8 4 8 µV/°C

3

CMRR

500 Hz 75 75 dB

Minimum CMRR Over Temperature −40°C to +85°C 70 70 dB

vs. Temperature 1 4 1 4 (µV/V)/°C
PSRR (RTI) VS = ±10 V to ±18 V 77 94 77 94 dB
Input Voltage Range

Common Mode −120 +120 −120 +120 V
Differential −120 +120 −120 +120 V

Dynamic Response

Small Signal BW –3 dB G = +0.1 600 600 kHz
Full Power Bandwidth 5 5 kHz
Settling Time G = +0.1, to 0.01%, 100 V step 40 40 µs
Slew Rate 0.3 0.3 V/µs

Noise (RTI)

Spectral Density 1 kHz 300 300 nV/√Hz

0.1 Hz to 10 Hz 15 15 µV p-p

DIFFERENTIAL AMP

Gain 0.1 0.1 V/V

Error −0.1 +0.01 +0.1 −0.1 +0.01 +0.1 %

vs. Temperature 5 5 ppm/°C

Nonlinearity 5 5 ppm

vs. Temperature 3 10 3 10 ppm
Offset Voltage RTI of input pins −1.5 +1.5 −1.5 +1.5 mV

vs. Temperature 8 8 µV/°C

Input Impedance

Differential 220 220 kΩ
Common Mode 55 55 kΩ

4

CMRR

500 Hz 75 75 dB

Minimum CMRR Over Temperature −40°C to +85°C 70 70 dB

vs. Temperature 1 4 1 4 (µV/V)/°C
Output Resistance 10 10 kΩ

Error −0.1 +0.1 −0.1 +0.1 %

= 10 kΩ, R

EXT1

V

OCM

EXT2

= ∞, V

= 0, unless otherwise noted.

REF

EXT1/REXT2

) V/V

= 0 V; RTI of input pins2;

−1.5 +1.5 −1.5 +1.5 mV

Output amp G = +1

RTI of input pins;

75 75 dB

G = +0.1 to +100

RTI of input pins;

75 75 dB

G = +0.1 to +100

Rev. D | Page 3 of 20

AD628

AD628AR AD628ARM
Parameter Conditions Min Typ Max Min Typ Max Unit

OUTPUT AMPLIFIER

Gain Equation G = (1 + R

Nonlinearity G = +1, V

EXT1/REXT2

OUT

Offset Voltage RTI of output amp −0.15 +0.15 −0.15 +0.15 mV

vs. Temperature 0.6 0.6 µV/°C
Output Voltage Swing RL = 10 kΩ −14.2 +14.1 −14.2 +14.1 V
R

= 2 kΩ −13.8 +13.6 −13.8 +13.6 V

L

Bias Current 1.5 3 1.5 3 nA
Offset Current 0.2 0.5 0.2 0.5 nA
CMRR VCM = ±13 V 130 130 dB
Open-Loop Gain V

= ±13 V 130 130 dB

OUT

POWER SUPPLY

Operating Range ±2.25 ±18 ±2.25 ±18 V
Quiescent Current 1.6 1.6 mA

TEMPERATURE RANGE –40 +85 –40 +85 °C

1

To use a lower gain, see the Ga section. in Adjustment

2

The addition of the difference amp’s and output amp’s offset voltage does not exceed this specification.

3

Error due to common mode as seen at the output:

4

Error due to common mode as seen at the output of A1:

OUT

[

10

V

OUT

) V/V

= ±10 V 0.5 0.5 ppm

)(0.1)(

V

A1 =

CM

×=V

75

20

V

)(0.1)(

CM

[

]

75

20

10

][]

GainAmplifierOutput

Rev. D | Page 4 of 20

AD628

TA = 25°C, VS = 5 V, RL = 2 kΩ, R

Table 2.

AD628AR AD628ARM

Parameter Conditions Min Typ Max Min Typ Max Unit

DIFFERENTIAL AMP + OUTPUT AMP

Gain Equation G = +0.1(1+ R
Gain Range See Figure 29 0.11 100 0.11 100 V/V
Offset Voltage

vs. Temperature 6 15 6 15 µV/°C

3

CMRR
500 Hz 75 75 dB

Minimum CMRR Over Temperature −40°C to +85°C 70 70 dB

vs. Temperature 1 4 1 4 (µV/V)/°C
PSRR (RTI) VS = 4.5 V to 10 V 77 94 77 94 dB
Input Voltage Range

Common Mode

4

Differential −15 +15 −15 +15 V

Dynamic Response

Small Signal BW –3 dB G = +0.1 440 440 kHz
Full Power Bandwidth 30 30 kHz
Settling Time G = +0.1, to 0.01%, 30 V step 15 15 µs
Slew Rate 0.3 0.3 V/µs

Noise (RTI)

Spectral Density 1 kHz 350 350 nV/√Hz

0.1 Hz to 10 Hz 15 15 µV p-p
DIFFERENTIAL AMP

Gain 0.1 0.1 V/V

Error –0.1 +0.01 +0.1 –0.1 +0.01 +0.1 %
Nonlinearity 3 3 ppm

vs. Temperature 3 10 3 10 ppm
Offset Voltage RTI of input pins −2.5 +2.5 −2.5 +2.5 mV

vs. Temperature 10 10 µV/°C

Input Impedance

Differential 220 220 kΩ
Common Mode 55 55 kΩ

5

CMRR
500 Hz 75 75 dB

Minimum CMRR Over Temperature −40°C to +85°C 70 70 dB

vs. Temperature 1 4 1 4 (µV/V)/°C
Output Resistance 10 10 kΩ

Error −0.1 +0.1 −0.1 +0.1 %

OUTPUT AMPLIFIER

Gain Equation G = (1 + R

Nonlinearity G = +1, V

Output Offset Voltage RTI of output amp −0.15 0.15 −0.15 0.15 mV

vs. Temperature 0.6 0.6 µV/°C
Output Voltage Swing RL = 10 kΩ 0.9 4.1 0.9 4.1 V
R
Bias Current 1.5 3 1.5 3 nA
Offset Current 0.2 0.5 0.2 0.5 nA
CMRR VCM = 1 V to 4 V 130 130 dB
Open-Loop Gain V

= 10 kΩ, R

EXT1

= ∞, V

EXT2

= 2.25 V; RTI of input pins2;

V

OCM

= 2.5, unless otherwise noted.

REF

EXT1/REXT2

) V/V

−3.0 +3.0 −3.0 +3.0 mV

Output Amp G = +1

RTI of input pins; G = +0.1 to +100 75 75 dB

−12 +17 −12 +17 V

RTI of input pins; G = +0.1 to +100 75 75 dB

EXT1/REXT2

OUT

= 2 kΩ 1 4 1 4 V

L

= 1 V to 4 V 130 130 dB

OUT

) V/V

= 1 V to 4 V 0.5 0.5 ppm

Rev. D | Page 5 of 20

AD628

AD628AR AD628ARM
Parameter Conditions Min Typ Max Min Typ Max Unit

POWER SUPPLY

Operating Range ±2.25 +36 ±2.25 +36 V
Quiescent Current 1.6 1.6 mA

TEMPERATURE RANGE −40 +85 −40 +85 °C

1

To use a lower gain, see the Gain Adjustment section.

2

The addition of the difference amp’s and output amp’s offset voltage does not exceed this specification.

3

Error due to common mode as seen at the output: ][]

4

Greater values of voltage are possible with greater or lesser values of V

5

Error due to common mode as seen at the output of A1:

OUT

V

)(0.1)(

CM

[

V

OUT

×=V

75

20

10

A1 =

.

REF

V

CM

[

75

20

10

)(0.1)(

]

GainAmplifierOutput

Rev. D | Page 6 of 20

AD628

ABSOLUTE MAXIMUM RATINGS

Table 3.

POWER DISSIPATION (W)

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

8-LEAD SOIC PACKAGE

(JEDEC; 4-LAYER BOARD) = 132.54°C/W

MSOP θ

J

SOIC θJ (JEDEC; 4-LAYER BOARD) = 154°C/W

0

AMBIENT TEMPERATURE (°C)

Figure 3. Maximum Power Dissipation vs. Temperature

8-LEAD MSOP PACKAGE

200–40 –20–60 40 60 80 100

TJ = 150°C

Parameter Rating

Supply Voltage ±18 V
Internal Power Dissipation See Figure 3
Input Voltage (Common Mode) ±120 V

1

Differential Input Voltage ±120 V1
Output Short-Circuit Duration Indefinite
Storage Temperature –65°C to +125°C
Operating Temperature Range –40°C to +85°C
Lead Temperature Range (10 sec Soldering) 300°C

Stresses greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This is a
stress rating only; functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

1

When using ±12 V supplies or higher (see the In section). put Voltage Range

02992-C-003

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. D | Page 7 of 20

AD628

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

8

–IN

7

+V

S

6

R

G

5

OUT

02992-C-004

V

C

+IN

–V

REF
FILT

S

1

2

AD628

TOP VIEW

3

(Not to Scale)

4

Figure 4. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Function

1 +IN Noninverting Input
2 −VS Negative Supply Voltage
3 V
4 C
5 OUT Amplifier Output
6 RG Output Amplifier Inverting Input
7 +VS Positive Supply Voltage
8 −IN Inverting Input

Reference Voltage Input

REF

Filter Capacitor Connection

FILT

Rev. D | Page 8 of 20

AD628

TYPICAL PERFORMANCE CHARACTERISTICS

40

8440 UNITS

35

30

25

20

% OF UNITS

15

10

5

140

120

100

80

60

PSRR (dB)

40

20

G = +0.1

–15V +15V

+2.5V

0

–1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0

INPUT OFFSET VOLTAGE (mV)

Figure 5. Typical Distribution of Input Offset Voltage,

V

= ±15 V, SOIC Package

S

25

8440 UNITS

20

15

10

% OF UNITS

5

0

–74 –78 –82 –86 –90 –94 –98 –102 –106 –110

CMRR (dB)

Figure 6. Typical Distribution of Common-Mode Rejection, SOIC Package

130

120

110

100

90

80

CMRR (dB)

70

60

50

40

30

10010 1k 10k 100k

VS = ±15V

VS = ±2.5V

FREQUENCY (Hz)

Figure 7. CMRR vs. Freq uency

02992-C-005

02992-C-006

02992-C-007

0

0.1 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)

Figure 8. PSRR vs. Frequenc y, Single a nd Dual Su pplies

1000

VOLTAGE NOISE DENSITY (nV/ Hz)

100

1 10 100 1k 10k 100k

FREQUENCY (Hz)

Figure 9. Voltage Noise Spectral Density, RTI, V

1000

VOLTAGE NOISE DENSITY (nV/ Hz)

100

1 10 100 1k 10k 100k

FREQUENCY (Hz)

Figure 10. Voltage Noise Spectral Density, RTI, V

= ±15 V

S

= ±2.5 V

S

02992-C-008

02992-C-009

02992-C-010

Rev. D | Page 9 of 20

AD628

40

1s

100

90

9638 UNITS

35

30

25

20

NOISE (5µV/DIV)

10

0

0

5

TIME (Sec)

Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI

60

50

G = +100

40

30

G = +10

20

10

G = +1

GAIN (dB)

0

–10

G = +0.1

–20

–30

–40

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 12. Small Signal Frequency Response,

V

= 200 mV p-p, G = +0.1, +1, +10, and +100

OUT

15

% OF DEVICES

10

5

10

02992-C-011

0

012345678910

GAIN ERROR (ppm)

02992-C-014

Figure 14. Typical Distribution of +1 Gain Error

150

UPPER CMV LIMIT

100

–40°C

50

02992-C-012

COMMON-MODE VOLTAGE (V)

–50

–100

–150

0

+25°C

+85°C

–40°C

+85°C

501015

VS (±V)

LOWER CMV LIMIT

= 0V

V

REF

20

02992-C-015

Figure 15. Common-Mode Operating Range vs.

Power Supply Voltage for Three Temperatures

60

50

G = +100

40

30

G = +10

20

10

G = +1

GAIN (dB)

0

–10

G = +0.1

–20

–30

–40

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

Figure 13. Large Signal Frequency Response,

= 20 V p-p, G = +0.1, +1, +10, and +100

V

OUT

02992-C-013

Rev. D | Page 10 of 20

500µV

100

90

OUTPUT ERROR (µV)

10

0

OUTPUT VOLTAGE (V)

Figure 16. Normalized Gain Error vs. V

VS= ±15V

RL = 1kΩ

RL = 2kΩ

RL = 10kΩ

, VS = ±15 V

OUT

4.0V

02992-C-016

AD628

100µV

100

90

OUTPUT ERROR (µV)

10

0

OUTPUT VOLTAGE (V)

Figure 17. Normalized Gain Error vs. V

4

3

2

VS= ±2.5V

RL = 1kΩ

RL = 2kΩ

RL = 10kΩ

500mV

, VS = ±2.5 V

OUT

02992-C-017

500mV

100

90

10

0

50mV

Figure 20. Small Signal Pulse Response,

= 2 kΩ, CL = 0 pF, Top: Input, Bottom; Output

R

L

500mV

100

90

4µs

02992-C-020

BIAS CURRENT (nA)

1

0

–40 –20 0 20 40 60 80 100

TEMPERATURE (°C)

Figure 18. Bias Current vs. Temperature Buffer

15

10

5

0

–5

OUTPUT VOLTAGE SWING (V)

–10

–15

0 5 10 15 20 25

OUTPUT CURRENT (mA)

+85°C

–40°C

+25°C

+85°C

–25°C

–25°C

+25°C

Figure 19. Output Voltage Operating Range vs. Output Current

–40°C

02992-C-018

02992-C-019

10

0

50mV

Figure 21. Small Signal Pulse Response,

RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom; Output

100

90

10.0 V

10.0 V

10

0

Figure 22. Large Signal Pulse Response,

= 2 kΩ, CL = 1000 pF, Top: Input, Bottom; Output

R

L

4µs

40 µs

02992-C-021

02992-C-022

Rev. D | Page 11 of 20

AD628

100

90

5V

10mV

10

0

Figure 23. Settling Time to 0.01%, 0 V to 10 V Step

100µs

02992-C-023

100

90

5V

10mV

10

0

100µs

Figure 24. Settling Time to 0.01% 0 V to −10 V Step

02992-C-024

Rev. D | Page 12 of 20

AD628

TEST CIRCUITS

HP3589A

SPECTRUM ANALYZER

+V

S

–IN
100kΩ

+IN
100kΩ

–IN

100kΩ

+IN

100kΩ

–

AD707

+

10kΩ

10kΩ 10kΩ

–IN

G = +0.1

+IN

10kΩ

V

REF

10kΩ 10kΩ

–IN
G = +0.1
+IN

+IN

–IN

AD628

C

–V

S

FILT

R

G

Figure 25. CMRR vs. Fre quency

+V

S

G = +100

+IN

OUT

–IN

AD628

OUT

1 VAC

+15V

20Ω

–

AD829

+

G = +100

G = +100

+

AD829

–

FET

PROBE

SCOPE

02992-C-025

V

REF

C

–V

S

FILT

R

G

02992-C-026

Figure 26. PSRR v s. Frequency

Rev. D | Page 13 of 20

AD628

HP3561A

SPECTRUM ANALYZER

+V

S

C

FILT

7

4

–IN

+IN

100kΩ

8

100kΩ

1

V

REF

10kΩ 10kΩ

–IN
G = +0.1

+IN

10kΩ

–V

S

10kΩ

+IN

–IN

5

OUT

AD628

623

R

G

10kΩ

02992-C-027

Figure 27. Noise Tests

Rev. D | Page 14 of 20

AD628

THEORY OF OPERATION

The AD628 is a high common-mode voltage difference
amplifier, combined with a user-configurable output amplifier
(see Figure 28 and Figure 29). Differential mode voltages in
excess of 120 V are accurately scaled by a precision 11:1 voltage
divider at the input. A reference voltage input is available to the
user at Pin 3 (V

). The output common-mode voltage of the

REF

difference amplifier is the same as the voltage applied to the
reference pin. If the uncommitted amplifier is configured for
gain, connecting Pin 3 to one end of the external gain resistor
establishes the output common-mode voltage at Pin 5 (OUT).

The output of the difference amplifier is internally connected
to a 10 kΩ resistor trimmed to better than ±0.1% absolute
accuracy. The resistor is connected to the noninverting input of
the output amplifier and is accessible to the user at Pin 4 (C

FILT

).
A capacitor may be connected to implement a low-pass filter, a
resistor may be connected to further reduce the output voltage,
or a clamp circuit may be connected to limit the output swing.

The uncommitted amplifier is a high open-loop gain, low offset,
low drift op amp, with its noninverting input connected to the
internal 10 kΩ resistor. Both inputs are accessible to the user.

Careful layout design has resulted in exceptional common­mode rejection at higher frequencies. The inputs are connected
to Pin 1 (+IN) and Pin 8 (−IN), which are adjacent to the power
Pin 2 (−V

) and Pin 7 (+VS). Because the power pins are at ac

S

ground, input impedance balance and, therefore, common­mode rejection, are preserved at higher frequencies.

R

G

–IN

+IN

10kΩ

10kΩ

G = +0.1

A1

V

REF

10kΩ

–IN

A2

+IN

C

FILT

OUT

–IN

+IN

100kΩ

100kΩ

Figure 28. Simplified Schematic

02992-C-028

C

FILT

AD628

+IN

A2

–IN

G

R

EXT3

R

EXT1

OUT

02992-C-029

–IN

+IN

100kΩ

100kΩ

–V

S

10kΩ

G = +0.1

–IN

A1

+IN

10kΩ

REFERENCE

VOLTAGE

+V

S

10kΩ

V

REF

R

R

EXT2

Figure 29. Circuit Connections

Rev. D | Page 15 of 20

AD628

APPLICATIONS

GAIN ADJUSTMENT

The AD628 system gain is provided by an architecture
consisting of two amplifiers. The gain of the input stage
is fixed at 0.1; the output buffer is user-adjustable as

= 1 + R

G

A2

EXT1/REXT2

G 10.1

TOTAL

At a 2 nA maximum, the input bias current of the buffer amplifier
is very low and any offset voltage induced at the buffer amplifier
by its bias current may be neglected (2 nA × 10 kΩ = 20 µV).
However, to absolutely minimize bias current effects, R
R

can be selected so that their parallel combination is 10 kΩ. If

EXT2

practical resistor values force the parallel combination of R
R

below 10 kΩ, a series resistor (R

EXT2

up for the difference. Table 5 lists several values of gain and
corresponding resistor values.

Table 5. Nearest Standard 1% Resistor Values for Various
Gains (See Figure 29)

Total Gain
(V/V)

0.1 1 10 k ∞ 0

0.2 2 20 k 20 k 0

0.25 2.5 25.9 k 18.7 k 0

0.5 5 49.9 k 12.4 k 0
1 10 100 k 11 k 0
2 20 200 k 10.5 k 0
5 50 499 k 10.2 k 0
10 100 1 M 10.2 k 0

To set the system gain to less than 0.1, an attenuator can be
created by placing a resistor, R
reference voltage. A divider would be formed by the 10 kΩ
resistor which is in series with the positive input of A2 and
R

. A2 would be configured for unity gain.

EXT4

Using a divider and setting A2 to unity gain yields

G

/

DIVIDERW

. The system gain is then

⎛
⎜

+×=

⎜
⎝

A2 Gain

⎞

R

EXT1

⎟

(1)

⎟

R

EXT2

⎠

R

EXT1

(V/V)

, from Pin 4 (C

EXT4

⎛

R

EXT4

⎜

×=

0.1

⎜
⎝

+

R

kΩ10

) can be added to make

EXT3

(Ω) R

EXT4

(Ω) R

EXT2

) to the

FILT

⎞
⎟

1×
⎟
⎠

EXT1

and

EXT1

EXT3

and

(Ω)

INPUT VOLTAGE RANGE

The common-mode input voltage range is determined by V
and the supply voltage. The relation is expressed by

VVV

102111

−≤

).–(

where V

V

SCM

UPPER

LOWER

is the positive supply, VS− is the negative supply

S+

+

SCM

−

REF

(2)

VV

102111

−+≥

).(V

V

REF

and 1.2 V is the headroom needed for suitable performance.
Equation 2 provides a general formula for calculating the
common-mode input voltage range. However, the AD628
should be kept within the maximum limits listed in the
Specifications (Table 1) to maintain optimal performance. This
is illustrated in Figure 30 where the maximum common-mode
input voltage is limited to ±120 V. Figure 31 shows the
common-mode input voltage bounds for single-supply voltages.

200

150

100

50

0

–50

–100

INPUT COMMON-MODE VOLTAGE (V)

–150

–200

Figure 30. Input Common-Mode Voltage vs. Supply Voltage for Dual Supplies

MAXIMUM INPUT COMMON-MODE

VOLTAGE WHEN V

8624010121

SUPPLY VOLTAGE (±V)

REF

= GND

416

100

80

60

40

20

0

–20

–40

INPUT COMMON-MODE VOLTAGE (V)

–60

–80

Figure 31. Input Common-Mode Voltage vs.

Supply Voltage for Single Supplies

MAXIMUM INPUT COMMON-MODE

VOLTAGE WHEN V

8624010121

SINGLE-SUPPLY VOLTAGE (V)

REF

= MIDSUPPLY

416

REF

02992-C-035

02992-C-034

Rev. D | Page 16 of 20

AD628

The differential input voltage range is constrained to the
linear operation of the internal amplifiers A1 and A2. The
voltage applied to the inputs of A1 and A2 should be between
V

+ 1.2 V and VS+ − 1.2 V. Similarly, the outputs of A1 and A2

S−

should be kept between V

− + 0.9 V and VS+ − 0.9 V.

S

VOLTAGE LEVEL CONVERSION

Industrial signal conditioning and control applications typically
require connections between remote sensors or amplifiers and
centrally located control modules. Signal conditioners provide
output voltages up to ±10 V full scale; however, ADCs or
microprocessors operating on single 3.3 V to 5 V logic supplies
are becoming the norm. Thus, the controller voltages require
further reduction in amplitude and reference.

Furthermore, voltage potentials between locations are seldom
compatible, and power line peaks and surges can generate
destructive energy between utility grids. The AD628 is an ideal
solution to both problems. It attenuates otherwise destructive
signal voltage peaks and surges by a factor of 10 and shifts the
differential input signal to the desired output voltage.

Conversion from voltage-driven or current-loop systems is
easily accommodated using the circuit in Figure 32. This shows
a circuit for converting inputs of various polarities and
amplitudes to the input of a single-supply ADC.

Note that the common-mode output voltage can be adjusted by
connecting Pin 3 (V
to the desired voltage. The output common-mode voltage will
be the same as the reference voltage.

) and the lower end of the 10 kΩ resistor

REF

+V

(SEE

TABLE 5)

–IN

100kΩ

V

IN

100kΩ

+IN

V

REF

10kΩ

10kΩ

–IN

+IN

G = +0.1

A1

–V

S

S

10kΩ

C

FILT

Figure 32. Level Shifter

R

The design of such an application may be done in a few simple
steps, which include the following:

• Determine the required gain. For example, if the input

voltage must be transformed from ±10 V to 0 V to +5 V, the
gain is +5/+20 or +0.25.

• Determine if the circuit common-mode voltage must be

changed. An AD7715-5 ADC is illustrated for this example.
When operating from a 5 V supply, the common-mode
voltage of the AD7715 is half the supply or 2.5 V. If the
AD628 reference pin and the lower terminal of the 10 kΩ
resistor are connected to a 2.5 V voltage source, the output
common-mode voltage will be 2.5 V.

Table 6 shows resistor and reference values for commonly used
single-supply converter voltages. R

is included as an option.

EXT3

It is used to balance the source impedance into A2, which is
described in more detail in the Gain Adjustment section.

Table 6. Nearest 1% Resistor Values for Voltage Level
Conversion Applications

ADC
Input
Voltage
(V)

Supply

Voltage

(V)

Desired
Output
Voltage (V)

V
(V)

REF

R

EXT1

(kΩ)

±10 5 2.5 2.5 15.0 4.02
±5 5 2.5 2.5 39.7 2.00
+10 5 2.5 2.5 39.7 2.00
+5 5 2.5 2.5 89.8 1.00
±10 3 1.25 1.25 2.49 7.96
±5 3 1.25 1.25 15.0 4.02
+10 3 1.25 1.25 15.0 4.02
+5 3 1.25 1.25 39.7 2.00

AD7715-5

+IN

–IN

AD628

G

NC

(SEE

SCLK

MCLK IN

MCLK OUT

CS

RESET

AV

AIN(+)

AIN(–)

SERIAL CLOCK

CLOCK

+5V

R

EXT3

10kΩ

OUT

R

EXT1

(SEE

TABLE 5)

TABLE 5)

A2

DD

DGND

DV

DIN

DOUT

DRDY

AGND

REF IN(–)

REF IN(+)

AD680

+5V

+5V

02992-C-030

DD

+2.5V

R

EXT3

(kΩ)

Rev. D | Page 17 of 20

AD628

CURRENT LOOP RECEIVER

Analog data transmitted on a 4 to 20 mA current loop can be
detected with the receiver shown in Figure 33. The AD628 is an
ideal choice for such a function, because the current loop must
be driven with a compliance voltage sufficient to stabilize the
loop, and the resultant common-mode voltage often exceeds
commonly used supply voltages. Note that with large shunt
values a resistance of equal value must be inserted in series with
the inverting input to compensate for an error at the
noninverting input.

+V

MONITORING BATTERY VOLTAGES

Figure 34 illustrates how the AD628 can be used to monitor a
battery charger. Voltages approximately eight times the power
supply voltage can be applied to the input with no damage. The
resistor divider action is well-suited for the measurement of
many power supply applications, such as those found in battery
chargers or similar equipment.

+15V

S

10kΩ

–IN

+IN

10kΩ

G = +0.1

A1

–V

S

–15V

10kΩ

C

FILT

+IN

–IN

A2

OUT

AD628

R

G

R

EXT2

11kΩ

R

EXT1

100kΩ

0V TO 5V

TO ADC

2.5V
REF

02992-C-031

250Ω

250Ω

4–20mA

SOURCE

–IN

+IN

100kΩ

100kΩ

V

REF

Figure 33. Level Shifter for 4 to 20 mA Current Loop

5V

+V

S

(V)

CHARGING

CIRCUIT

nV

BAT

+1.5V

BATTERY

OTHER

BATTERIES IN

CHARGING

CIRCUIT

–IN

+IN

100kΩ

100kΩ

10kΩ

10kΩ

–IN

+IN

G = +0.1

A1

10kΩ

+IN

–IN

AD628

0V TO 5V

R

EXT1

10kΩ

TO ADC

A2

OUT

R

G

–V

S

V

REF

C

FILT

02992-C-032

Figure 34. Battery Voltage Monitor

Rev. D | Page 18 of 20

AD628

FILTER CAPACITOR VALUES

A capacitor can be connected to Pin 4 (C
low-pass filter. The capacitor value is

()

μF15.9/tfC =

where f

is the desired 3 dB filter frequency.

t

Table 7 shows several frequencies and their closest standard
capacitor values.

Table 7. Capacitor Values for Various Filter Frequencies

Frequency (Hz) Capacitor Value (µF)

10 1.5
50 0.33
60 0.27
100 0.15
400 0.039
1 k 0.015
5 k 0.0033
10 k 0.0015

) to implement a

FILT

KELVIN CONNECTION

In certain applications, it may be desirable to connect the
inverting input of an amplifier to a remote reference point. This
eliminates errors resulting in circuit losses in interconnecting
wiring. The AD628 is particularly suited for this type of
connection. In Figure 35, a 10 kΩ resistor is added in the
feedback to match the source impedance of A2, which is
described in more detail in the Gain Adjustment section.

5V

+V

S

–IN

+IN

100kΩ

10kΩ

–IN

+IN

G = +0.1

A1

10kΩ10kΩ100kΩ

+IN

–IN

A2

OUT

R

G

CIRCUIT

LOSS

10kΩ

LOAD

AD628

–V

S

V

REF

VS/2

C

FILT

02992-C-033

Figure 35. Kelvin Connection

Rev. D | Page 19 of 20

AD628

0

0

OUTLINE DIMENSIONS

3.00
BSC

5.00 (0.1968)

4.80 (0.1890)

8

5

3.00

BSC

1

PIN 1

0.65 BSC

.15
.00

0.38

0.22

COPLANARITY

0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA

BSC

4

SEATING
PLANE

4.90

1.10 MAX

0.23

0.08

4.00 (0.1574)

3.80 (0.1497)

0.25 (0.0098)

0.10 (0.0040)

8°
0°

0.80

0.60

0.40

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

85

1.27 (0.0500)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

BSC

6.20 (0.2440)

5.80 (0.2284)

41

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0196)

0.25 (0.0099)

8°
0°

× 45°

1.27 (0.0500)

0.40 (0.0157)

Figure 36. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

Figure 37. 8-Lead Standard Small Outline Package [SOIC] Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model Temperature Range Description Package Option Branding

AD628AR −40°C to +85°C 8-Lead SOIC R-8
AD628AR-REEL −40°C to +85°C 8-Lead SOIC 13" Reel R-8
AD628AR-REEL7 −40°C to +85°C 8-Lead SOIC 7" Reel R-8
AD628ARZ
AD628ARZ-RL1 −40°C to +85°C 8-Lead SOIC 13" Reel R-8
AD628ARZ-R71 −40°C to +85°C 8-Lead SOIC 7" Reel R-8
AD628ARM −40°C to +85°C 8-Lead MSOP RM-8 JGA
AD628ARM-REEL −40°C to +85°C 8-Lead MSOP 13" Reel RM-8 JGA
AD628ARM-REEL7 −40°C to +85°C 8-Lead MSOP 7" Reel RM-8 JGA
AD628ARMZ1 −40°C to +85°C 8-Lead MSOP RM-8 JGZ
AD628ARMZ-RL1 −40°C to +85°C 8-Lead MSOP 13" Reel RM-8 JGZ
AD628ARMZ-R71 −40°C to +85°C 8-Lead MSOP 7" Reel RM-8 JGZ
AD628-EVAL Evaluation Board

1

Z = Pb-free part.

1

−40°C to +85°C 8-Lead SOIC R-8

©2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02992–0–3/05(D)

Rev. D | Page 20 of 20