ANALOG DEVICES AD605 Service Manual

Dual, Low Noise, Single-Supply

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FEATURES

2 independent linear-in-dB channels
Input noise at maximum gain: 1.8 nV/√Hz, 2.7 pA/√Hz
Bandwidth: 40 MHz (−3 dB)
Differential input
Absolute gain range programmable

−14 dB to +34 dB (FBK shorted to OUT) through

0 dB to 48 dB (FBK open)
Variable gain scaling: 20 dB/V through 40 dB/V
Stable gain with temperature and supply variations
Single-ended unipolar gain control
Output common mode independently set
Power shutdown at lower end of gain control
Single 5 V supply
Low power: 90 mW/channel
Drives ADCs directly

APPLICATIONS

Ultrasound and sonar time-gain controls
High performance AGC systems
Signal measurement

VGN

VREF

+IN

–IN

Variable Gain Amplifier

AD605

FUNCTIONAL BLOCK DIAGRAM

FIXED GAIN

AMPLIFI ER

+34.4dB

AD605

GAIN

CONTROL

AND

SCALING

PRECISION PASSIVE
INPUT ATTENUATOR

DIFFERENTIAL

ATTENUATOR

0 TO –48.4dB

Figure 1.

OUT

FBK

VOCM

0541-001

GENERAL DESCRIPTION

The AD605 is a low noise, accurate, dual-channel, linear-in-dB
variable gain amplifier (VGA), optimized for any application
requiring high performance, wide bandwidth variable gain
control. Operating from a single 5 V supply, the AD605 provides
differential inputs and unipolar gain control for ease of use.
Added flexibility is achieved with a user-determined gain range
and an external reference input that provide user-determined
gain scaling (dB/V).

The high performance linear-in-dB response of the AD605 is
achieved with the differential input, single-supply, exponential
amplifier (DSX-AMP) architecture. Each of the DSX-AMPs
comprises a variable attenuator of 0 dB to −48.4 dB followed by
a high speed, fixed-gain amplifier. The attenuator is based on a
7-stage R-1.5R ladder network. The attenuation between tap
points is 6.908 dB, and 48.360 dB for the entire ladder network.
The DSX-AMP architecture results in 1.8 nV/√Hz input noise
spectral density and accepts a ±2.0 V input signal when VOCM
is biased at VP/2.

Each independent channel of the AD605 provides a gain range
of 48 dB that can be optimized for the application. Gain ranges
between −14 dB to +34 dB and 0 dB to +48 dB can be selected
by a single resistor between Pin FBK and Pin OUT. The lower
and upper gain ranges are determined by shorting Pin FBK to
Pin OUT or leaving Pin FBK unconnected, respectively. The
two channels of the AD605 can be cascaded to provide 96 dB
of very accurate gain range in a monolithic package.

The gain control interface provides an input resistance of
approximately 2 MΩ and scale factors from 20 dB/V to 30 dB/V
for a VREF input voltage of 2.5 V to 1.67 V, respectively. Note
that scale factors up to 40 dB/V are achievable with reduced
accuracy for scales above 30 dB/V. The gain scales linearly in dB
with control voltages (VGN) of 0.4 V to 2.4 V for the 20 dB/V
scale and 0.20 V to 1.20 V for the 40 dB/V scale. When VGN is
<50 mV, the amplifier is powered down to draw 1.9 mA. Under
normal operation, the quiescent supply current of each amplifier
channel is only 18 mA.

The AD605 is available in a 16-lead PDIP and a 16-lead SOIC_N
package and is guaranteed for operation over the −40°C to +85°C
temperature range.

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©1996–2008 Analog Devices, Inc. All rights reserved.

AD605

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TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Absolute Maximum Ratings ............................................................ 5

ESD Caution .................................................................................. 5

Pin Configuration and Function Descriptions ............................. 6

Typical Performance Characteristics (per Channel) ................... 7

Theory of Operation ...................................................................... 13

Differential Ladder (Attenuator) .............................................. 14

AC Coupling ............................................................................... 14

REVISION HISTORY

6/08—Rev. E to Rev. F

Added Evaluation Board Section ................................................. 18

Added Figure 42 and Table 4......................................................... 18

Added Figure 43 and Figure 44..................................................... 19

Added Figure 45 to Figure 50 ........................................................ 20

5/07—Rev. D to Rev. E

Changes to Table 1 ............................................................................ 5

Changes to Fixed Gain Amplifier and Interpolator Circuits—

Applying an Active Feedback Amplifier Section ........................ 15

Updated Outline Dimensions ....................................................... 18

Changes to Ordering Guide .......................................................... 19

1/06—Rev. C to Rev. D

Updated Format .................................................................. Universal

Changes to Table 2 ............................................................................ 5

Changes to Differential Ladder (Attenuator) Section ............... 14

Updated the Outline Dimensions ................................................ 18

Changes to the Ordering Guide .................................................... 19

Gain Control Interface ............................................................... 14

Fixed Gain Amplifier and Interpolator Circuits—Applying an

Active Feedback Amplifier ........................................................ 15

Applications Information .............................................................. 16

Connecting Two Amplifiers to Double the Gain Range ....... 16

Evaluation Board ............................................................................ 18

Input Connections ..................................................................... 18

Adjusting Gain, Common-Mode, and Reference Levels ...... 18

Output Connections .................................................................. 18

Outline Dimensions ....................................................................... 21

Ordering Guide .......................................................................... 22

7/04—Rev. B to Rev. C

Edits to General Description ........................................................... 1

Edits to Specifications ....................................................................... 2

Edits to Ordering Guide ................................................................... 3

Change to TPC 22 ............................................................................. 6

Updated Outline Dimensions ....................................................... 12

Rev. F | Page 2 of 24

AD605

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SPECIFICATIONS

Each channel @ TA = 25°C, VS = 5 V, RS = 50 Ω, RL = 500 Ω, CL = 5 pF, V
unless otherwise noted.

Table 1.

AD605A AD605B
Parameter Conditions Min Typ Max Min Typ Max Unit

INPUT CHARACTERISTICS

Input Resistance 175 ± 40 175 ± 40 Ω
Input Capacitance 3.0 3.0 pF
Peak Input Voltage At minimum gain 2.5 ± 2.5 2.5 ± 2.5 V
Input Voltage Noise VGN = 2.9 V 1.8 1.8 nV/√Hz
Input Current Noise VGN = 2.9 V 2.7 2.7 pA/√Hz
Noise Figure RS = 50 Ω, f = 10 MHz, VGN = 2.9 V 8.4 8.4 dB
R
Common-Mode Rejection Ratio f = 1 MHz, VGN = 2.65 V −20 −20 dB

OUTPUT CHARACTERISTICS

−3 dB Bandwidth Constant with gain 40 40 MHz
Slew Rate VGN = 1.5 V, output = 1 V step 170 170 V/s
Output Signal Range RL ≥ 500 Ω 2.5 ± 1.5 2.5 ± 1.5 V
Output Impedance f = 10 MHz 2 2 Ω
Output Short-Circuit Current ±40 ±40 mA
Harmonic Distortion VGN = 1 V, V

HD2 f = 1 MHz −64 −64 dBc
HD3 f = 1 MHz −68 −68 dBc
HD2 f = 10 MHz −51 −51 dBc
HD3 f = 10 MHz −53 −53 dBc

Two-Tone Intermodulation

Distortion (IMD)
f = 1 MHz −72 −72 dBc
f = 10 MHz −60 −60 dBc
1 dB Compression Point f = 10 MHz, VGN = 2.9 V, output referred 15 15 dBm
Third-Order Intercept

Channel-to-Channel Crosstalk

Group Delay Variation 1 MHz < f < 10 MHz, full gain range ±2.0 ±2.0 ns
VOCM Input Resistance 45 45 kΩ

ACCURACY

Absolute Gain Error

−14 dB to −11 dB 0.25 V < VGN < 0.40 V −1.2 +1.0 +3.0 –1.2 +0.75 +3.0 dB

−11 dB to +29 dB 0.40 V < VGN < 2.40 V −1.0 ±0.3 +1.0 –1.0 ±0.2 +1.0 dB

+29 dB to +34 dB 2.40 V < VGN < 2.65 V −3.5 −1.25 +1.2 –3.5 −1.25 +1.2 dB
Gain Scaling Error 0.4 V < VGN < 2.4 V ±0.25 ±0.25 dB/V
Output Offset Voltage V
Output Offset Variation V

= 200 Ω, f = 10 MHz, VGN = 2.9 V 12 12 dB

S

= 1 V p-p

OUT

= 0 Ω, VGN = 2.9 V, V

R

S

f = 10 MHz, VGN = 2.9 V,
V

= 1 V p-p, input referred

OUT

Ch1: VGN = 2.65 V, inputs shorted,
Ch2: VGN = 1.5 V (mid gain),
f = 1 MHz, V

= 2.500 V, VOCM = 2.500 V −30 ±20 +30 –30 ±20 +30 mV

REF

= 2.500 V, VOCM = 2.500 V 30 57 30 50 mV

REF

= 1 V p-p

OUT

= 1 V p-p

OUT

= 2.5 V (scaling = 20 dB/V), −14 dB to +34 dB gain range,

REF

−1 −1 dBm

−70 −70 dB

Rev. F | Page 3 of 24

AD605

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AD605A AD605B
Parameter Conditions Min Typ Max Min Typ Max Unit

GAIN CONTROL INTERFACE

Gain Scaling Factor V
V
Gain Range FBK short to OUT −14 to +34 −14 to +34 dB
FBK open 0 to 48 0 to 48 dB
Input Voltage (VGN) Range 20 dB/V, VREF = 2.5 V 0.1 to 2.9 0.1 to 2.9 V
Input Bias Current −0.4 −0.4 µA
Input Resistance 2 2 MΩ
Response Time 48 dB gain change 0.2 0.2 µs

POWER SUPPLY

Supply Voltage 4.5 5.0 5.5 4.5 5.0 5.5 V
Power Dissipation 90 90 mW
VREF Input Resistance 10 10 kΩ
Quiescent Supply Current VPOS 18 23 18 23 mA

Power-Down VPOS, VGN < 50 mV 1.9 3.0 1.9 3.0 mA
Power-Up Response Time 48 dB gain, V
Power-Down Response Time 0.4 0.4 µs

= 2.5 V, 0.4 V < VGN < 2.4 V 19 20 21 19 20 21 dB/V

REF

= 1.67 V 30 30 dB/V

REF

= 2 V p-p 0.6 0.6 µs

OUT

Rev. F | Page 4 of 24

AD605

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ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage +V

Pin 12, Pin 13 (with Pin 4, Pin 5 = 0 V) 6.5 V
Input Voltage Pin 1 to Pin 3, Pin 6 to Pin 9, Pin 16 VPOS, 0 V
Internal Power Dissipation

16-Lead PDIP 1.4 W

16-Lead SOIC_N 1.2 W
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature, Soldering 60 sec 300°C
Thermal Resistance θJA

16-Lead PDIP 85°C/W

16-Lead SOIC_N 100°C/W

S

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

Rev. F | Page 5 of 24

AD605

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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VGN1

1

–IN1

2

+IN1

3

GND1

GND2

+IN2

–IN2

VGN2

AD605

4

TOP VIEW

5

(Not to Scale)

6

7

8

Figure 2. Pin Configuration

16

VREF

15

OUT1

FBK1

14

VPOS

13

12

VPOS

11

FBK2

OUT2

10

9

VOCM

00541-002

Table 3. Pin Function Descriptions

Pin No. Mnemonic Description

1 VGN1 CH1 Gain Control Input and Power-Down Pin. If grounded, device is off; otherwise, positive voltage increases gain.
2 −IN1 CH1 Negative Input.
3 +IN1 CH1 Positive Input.
4 GND1 Ground.
5 GND2 Ground.
6 +IN2 CH2 Positive Input.
7 −IN2 CH2 Negative Input.
8 VGN2 CH2 Gain Control Input and Power-Down Pin. If grounded, device is off; otherwise, positive voltage increases gain.
9 VOCM Input to This Pin Defines Common-Mode Voltage for OUT1 and OUT2.
10 OUT2 CH2 Output.
11 FBK2 Feedback Pin That Selects Gain Range of CH2.
12 VPOS Positive Supply.
13 VPOS Positive Supply.
14 FBK1 Feedback Pin That Selects Gain Range of CH1.
15 OUT1 CH1 Output.
16 VREF Input to This Pin Sets Gain Scaling for Both Channels: 2.5 V = 20 dB/V and 1.67 V = 30 dB/V.

Rev. F | Page 6 of 24

AD605

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TYPICAL PERFORMANCE CHARACTERISTICS (PER CHANNEL)

V

= 2.5 V (20 dB/V scaling), f = 1 MHz, RL = 500 Ω, CL = 5 pF, TA = 25°C, VSS = 5 V.

REF

40

40.0

30

20

10

GAIN (dB)

0

–10

–20

0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9

–40°C, +25° C, +85°C

VGN (V)

Figure 3. Gain vs. VGN

50

40

30

20

10

GAIN (dB)

0

–10

–20

0.1 0.5 0. 9 1.3 1.7 2.1 2.5 2. 9

FBK (OPEN)

FBK (SHORT)

VGN (V)

Figure 4. Gain vs. VGN for Different Gain Ranges

40

37.5

35.0

32.5

30.0

27.5

GAIN SCALING (dBV)

25.0

22.5

00541-003

20.0

THEORETICAL

ACTUAL

1.25 1.50 1. 75 2.00 2. 25 2.50

Figure 6. Gain Scaling vs. V

V

(V)

REF

REF

00541-006

3.0

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

GAIN ERROR (dB)

–1.5

–2.0

00541-004

–2.5

–3.0

0.2 0.7 1.2 1.7 2. 2 2.7

VGN (V)

–40°C

+25°C

+85°C

00541-007

Figure 7. Gain Error vs. VGN at Three Temperatures

2.0

30

30dB/V

(V

= 1.67V)

20

10

GAIN (dB)

0

–10

–20

0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9

REF

VGN (V)

(V

REF

ACTUAL

20dB/V

= 2.50V)

Figure 5. Gain vs. VGN for Different Gain Scalings

ACTUAL

00541-005

1.5

1.0

0.5

0

–0.5

GAIN ERROR (dB)

–1.0

–1.5

–2.0

0.2 0.7 1.2 1.7 2.2 2.7

f = 5MHz

Figure 8. Gain Error vs. VGN at Three Frequencies

Rev. F | Page 7 of 24

f = 1MHz

VGN (V)

f = 10MHz

00541-008

AD605

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2.0

1.5

1.0

0.5

0

GAIN ERROR

–0.5

–1.0

–1.5

–2.0

0.2 0. 7 1.71.2 2.2 2.7

V

REF

30dB/V

= 1.67V

VGN (V)

V

REF

Figure 9. Gain Error vs. VGN for Two Gain Scale Values

20

N = 50

18

ΔG(dB) = G(CH1) – G(CH2)

16

14

12

10

8

PERCENTAGE

6

4

2

0

–0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8

DELTA GAIN (dB)

Figure 10. Gain Match, VGN1 = VGN2 = 1.0 V

20

N = 50

18

ΔG(dB) = G(CH1) – G(CH2)

16

14

12

10

8

PERCENTAGE

6

4

2

0

–0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0. 6 0.8

DELTA GAIN (dB)

Figure 11. Gain Match, VGN1 = VGN2 = 2.50 V

20dB/V

= 2.50V

00541-009

00541-010

00541-011

60

VGN = 2.9V (FBK = OPEN)

40

VGN = 2.9V (FBK = SHORT)

VGN = 1.5V (FBK = OPEN)

20

VGN = 1.5V (FBK = SHORT)

VGN = 0.1V (FBK = OPEN)

0

GAIN (dB)

–20

–40

–60

VGN = 0.1V (FBK = SHORT)

100k

VGN = 0.0V

1M 10M 100M

FREQUENCY (Hz)

Figure 12. AC Response for Three Values of VGN

2.525
V

= 2.50V

OCM

(V)

OS

V

2.520

2.515

2.510

2.505

2.500

2.495

2.490

2.485

2.480

2.475

0

0.5 1. 0 1. 5 2. 0 2.5 3.0

–40°C

+25°C

+85°C

VGN (V)

Figure 13. Output Offset vs. VGN at Three Temperatures

130

125

120

115

110

105

NOISE (nV/ Hz)

100

95

90

0 0.5 1.0 1.5 2.0 2.5 3.0

+85°C

+25°C

–40°C

VGN (V)

Figure 14. Output Referred Noise vs. VGN at Three Temperatures

00541-013

00541-014

00541-015

Rev. F | Page 8 of 24