Analog Devices AD603 g Datasheet

Low Noise, 90 MHz

FEATURES

Linear-in-dB gain control
Pin programmable gain ranges

−11 dB to +31 dB with 90 MHz bandwidth
9 dB to 51 dB with 9 MHz bandwidth

Any intermediate range, for example −1 dB to +41 dB

with 30 MHz bandwidth

Bandwidth independent of variable gain

1.3 nV/√Hz input noise spectral density
±0.5 dB typical gain accuracy

APPLICATIONS

RF/IF AGC amplifier
Video gain control
A/D range extension
Signal measurement

GENERAL DESCRIPTION

The AD603 is a low noise, voltage-controlled amplifier for use
in RF and IF AGC systems. It provides accurate, pin selectable
gains of −11 dB to +31 dB with a bandwidth of 90 MHz or 9 dB
to 51 dB with a bandwidth of 9 MHz. Any intermediate gain
range may be arranged using one external resistor. The input
referred noise spectral density is only 1.3 nV/√Hz and power
consumption is 125 mW at the recommended ±5 V supplies.

The decibel gain is linear in dB, accurately calibrated, and stable
over temperature and supply. The gain is controlled at a high

FUNCTIONAL BLOCK DIAGRAM

Variable Gain Amplifier

AD603

impedance (50 MΩ), low bias (200 nA) differential input; the
scaling is 25 mV/dB, requiring a gain control voltage of only 1 V
to span the central 40 dB of the gain range. An overrange and
underrange of 1 dB is provided whatever the selected range. The
gain control response time is less than 1 µs for a 40 dB change.

The differential gain control interface allows the use of either
differential or single-ended positive or negative control voltages.
Several of these amplifiers may be cascaded and their gain
control gains offset to optimize the system S/N ratio.

The AD603 can drive a load impedance as low as 100 Ω with
low distortion. For a 500 Ω load in shunt with 5 pF, the total
harmonic distortion for a ±1 V sinusoidal output at 10 MHz is
typically −60 dBc. The peak specified output is ±2.5 V
minimum into a 500 Ω load.

The AD603 uses a patented proprietary circuit topology—the
X-AMP®. The X-AMP comprises a variable attenuator of 0 dB
to −42.14 dB followed by a fixed-gain amplifier. Because of the
attenuator, the amplifier never has to cope with large inputs and
can use negative feedback to define its (fixed) gain and dynamic
performance. The attenuator has an input resistance of 100 Ω,
laser trimmed to ±3%, and comprises a seven-stage R-2R ladder
network, resulting in an attenuation between tap points of

6.021 dB. A proprietary interpolation technique provides a
continuous gain control function which is linear in dB.

The AD603 is specified for operation from −40°C to +85°C.

8

VPOS

6

VNEG

1

GPOS

2

GNEG

3

VINP

4

COMM

Rev. G

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

SCALING

REFERENCE

V

G

GAIN-

CONTROL

INTERFACE

0dB –6.02dB –12.04dB –18.06dB –24.08dB –30.1dB –36.12dB –42.14dB

RR R R R R R

2R 2R 2R 2R 2R 2R R

R-2R LADDER NETWORK

PRECISION PASSIVE
INPUT ATTENUATOR

AD603

Figure 1.

FIXED-GAIN

AMPLIFIER

7

V

OUT

1

6.44kΩ

5

FDBK

1

694Ω

1

20Ω

1

NOMINAL VALUES.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

www.analog.com

00539-001

AD603

TABLE OF CONTENTS

Specifications..................................................................................... 3

Using the AD603 in Cascade ........................................................ 14

Absolute Maximum Ratings............................................................ 4

ESD Caution.................................................................................. 4

Pin Configuration and Function Descriptions............................. 5

Typical Performance Characteristics .............................................6

Theory of Operation ......................................................................11

Noise Performance .....................................................................11

The Gain Control Interface....................................................... 12

Programming the Fixed-Gain Amplifier

Using Pin Strapping

................................................................... 12

REVISION HISTORY

3/05—Rev. F to Rev. G

Updated Format.................................................................. Universal

Change to Features............................................................................1

Changes to General Description .....................................................1

Change to Figure 1 ............................................................................1

Changes to Specifications.................................................................3

New Figure 4 and Renumbering Subsequent Figures...................6

Change to Figure 10 ..........................................................................7

Change to Figure 23 ..........................................................................9

Change to Figure 29 ........................................................................12

Updated Outline Dimensions........................................................20

Sequential Mode (Optimal S/N Ratio).................................... 14

Parallel Mode (Simplest Gain Control Interface) .................. 16

Low Gain Ripple Mode (Minimum Gain Error) ................... 16

Applications..................................................................................... 18

A Low Noise AGC Amplifier.................................................... 18

Caution ........................................................................................19

Outline Dimensions....................................................................... 20

Ordering Guide .......................................................................... 20

4/04—Rev. E to Rev. F

Changes to Specifications.................................................................2

Changes to Ordering Guide.............................................................3

8/03—Rev. D to Rev E

Updated Format.................................................................. Universal

Changes to Specifications.................................................................2

Changes to TPCs 2, 3, 4.....................................................................4

Changes to Sequential Mode (Optimal S/N Ratio) section.........9

Change to Figure 8 ..........................................................................10

Updated Outline Dimensions........................................................14

Rev. G | Page 2 of 20

AD603

SPECIFICATIONS

@ TA = 25°C, VS = ±5 V, –500 mV ≤ VG ≤ +500 mV, GNEG = 0 V, –10 dB to +30 dB gain range, RL = 500 Ω, and CL = 5 pF, unless otherwise
noted.

Table 1.

Parameter Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Input Resistance Pin 3 to Pin 4 97 100 103 Ω
Input Capacitance 2 pF
Input Noise Spectral Density
Noise Figure f = 10 MHz, gain = max, RS = 10 Ω 8.8 dB
1 dB Compression Point f = 10 MHz, gain = max, RS = 10 Ω −11 dBm
Peak Input Voltage ±1.4 ±2 V

OUTPUT CHARACTERISTICS

−3 dB Bandwidth V
Slew Rate RL ≥ 500 Ω 275 V/µs
Peak Output

2

Output Impedance f ≤ 10 MHz 2 Ω
Output Short-Circuit Current 50 mA
Group Delay Change vs. Gain f = 3 MHz; full gain range ±2 ns
Group Delay Change vs. Frequency VG = 0 V; f = 1 MHz to 10 MHz ±2 ns
Differential Gain 0.2 %
Differential Phase 0.2 Degree
Total Harmonic Distortion f = 10 MHz, V
Third Order Intercept f = 40 MHz, gain = max, RS = 50 Ω 15 dBm

ACCURACY

Gain Accuracy, f = 100 kHz; Gain (dB) = (40 VG + 10) dB −500 mV ≤ VG ≤ +500 mV, −1 ±0.5 +1 dB

T

to T

MIN

MAX

Gain, f = 10.7 MHz VG = -0.5 V −10.3 −9.0 −8.0 dB
V
V
Output Offset Voltage

T

to T

MIN

MAX

Output Offset Variation vs. V

T

to T

MIN

MAX

GAIN CONTROL INTERFACE

Gain Scaling Factor 100 kHz 39.4 40 40.6 dB/V

T

to T

MIN

MAX

10.7 MHz 38.7 39.3 39.9 dB/V
GNEG, GPOS Voltage Range
Input Bias Current 200 nA
Input Offset Current 10 nA
Differential Input Resistance Pin 1 to Pin 2 50 MΩ
Response Rate Full 40 dB gain change 80 dB/µs

POWER SUPPLY

Specified Operating Range ±4.75 ±6.3 V
Quiescent Current 12.5 17 mA

T

to T

MIN

1

Typical open or short-circuited input; noise is lower when system is set to maximum gain and input is short-circuited. This figure includes the effects of both voltage

and current noise sources.

2

Using resistive loads of 500 Ω or greater, or with the addition of a 1 kΩ pull-down resistor when driving lower loads.

3

The dc gain of the main amplifier in the AD603 is ×35.7; thus, an input offset of 100 µV becomes a 3.57 mV output offset.

4

GNEG and GPOS, gain control, and voltage range are guaranteed to be within the range of −VS + 4.2 V to +VS − 3.4 V over the full temperature range of −40°C to +85°C.

MAX

1

Input short-circuited 1.3 nV/√Hz

= 100 mV rms 90 MHz

OUT

RL ≥ 500 Ω ±2.5 ±3.0 V

= 1 V rms −60 dBc

OUT

−1.5 +1.5 dB

= 0.0 V +9.5 +10.5 +11.5 dB

G

= 0.5 V +29.3 +30.3 +31.3 dB

3

G

VG = 0 V −20 +20 mV

−30 +30 mV

G

−500 mV ≤ VG ≤ +500 mV −20 +20 mV

−30 +30 mV

38 42 dB/V

4

−1.2 +2.0 V

20 mA

Rev. G | Page 3 of 20

AD603

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage ±V

S

±7.5 V

Internal Voltage VINP (Pin 3) ±2 V Continuous

±VS for 10 ms

GPOS, GNEG (Pins 1, 2) ±V
Internal Power Dissipation

1

S

400 mW

Operating Temperature Range

AD603A −40°C to +85°C

AD603S −55°C to +125°C
Storage Temperature Range −65°C to +150°C
Lead Temperature Range (Soldering 60 sec) 300°C

1

Thermal Characteristics:
8-Lead SOIC Package: θ
8-Lead CERDIP Package: θ

= 155°C/W, θJC = 33°C/W,

JA

= 140°C/W, θJC = 15°C/W.

JA

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada­tion or loss of functionality.

Rev. G | Page 4 of 20

AD603

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

GPOS
GNEG

VINP

COMM

1

AD603

2
3

TOP VIEW

(Not to Scale)

4

8
7
6
5

VPOS
VOUT
VNEG
FDBK

00539-002

Figure 2. 8-Lead Plastic SOIC (R) Package

1

GPOS
GNEG

VINP

COMM

AD603

2

TOP VIEW

3

(Not to Scale)

4

Figure 3. 8-Lead Ceramic CERDIP (Q) Package

8
7
6
5

VPOS
VOUT
VNEG
FDBK

00539-003

Table 3. Pin Function Descriptions

Pin No. Mnemonic Description

1 GPOS Gain Control Input High (Positive Voltage Increases Gain).
2 GNEG Gain Control Input Low (Negative Voltage Increases Gain).
3 VINP Amplifier Input.
4 COMM Amplifier Ground.
5 FDBK Connection to Feedback Network.
6 VNEG Negative Supply Input.
7 VOUT Amplifier Output.
8 VPOS Positive Supply Input.

Rev. G | Page 5 of 20

AD603

TYPICAL PERFORMANCE CHARACTERISTICS

@ TA = 25°C, VS = ±5 V, –500 mV ≤ VG ≤ +500 mV, GNEG = 0 V, –10 dB to +30 dB gain range, RL = 500 Ω, and CL = 5 pF, unless otherwise
noted.

40

30

20

10

GAIN (dB)

0

–10

10.7MHz

Figure 4. Gain vs. V

100kHz

VG (V)

at 100 kHz and 10.7 mHz

G

2.5

2.0

1.5

1.0

0.5

0

GAIN ERROR (dB)

–0.5

–1.0

–1.5

45MHz

70MHz

10.7MHz

455kHz

70MHz

GAIN VOLTAGE (Volts)

Figure 5. Gain Error vs. Gain Control Voltage at 455 kHz,

10.7 MHz, 45 MHz, 70 MHz

4

3

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

100k 1M 10M 100M

GAIN

PHASE

FREQUENCY (Hz)

Figure 6. Frequency and Phase Response vs. Gain

(Gain = −10 dB, P

= −30 dBm)

IN

0.6–0.6 –0.4 –0.2 0 0.2 0.4

0.5–0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4

225

180

135

90

45

0

–45

–90

–135

–180

–225

00539-004

00539-005

PHASE (Degrees)

00539-006

4

3

2

1

0

–1

–2

GAIN (dB)

–3

–4

–5

–6

100k 1M 10M 100M

GAIN

PHASE

FREQUENCY (Hz)

Figure 7. Frequency and Phase Response vs. Gain

(Gain = +10 dB, P

4

3

2

1

GAIN

0

–1

PHASE

–2

GAIN (dB)

–3

–4

–5

–6

100k 1M 10M 100M

FREQUENCY (Hz)

= −30 dBm)

IN

Figure 8. Frequency and Phase Response vs. Gain

(Gain = +30 dB, P

7.60

7.40

7.20

7.00

6.80

GROUP DELAY (ns)

6.60

6.40

GAIN CONTROL VOLTAGE (V)

= −30 dBm)

IN

Figure 9. Group Delay vs. Gain Control Voltage

225

180

135

90

45

0

–45

–90

–135

–180

–225

225

180

135

90

45

0

–45

–90

–135

–180

–225

0.6–0.6 –0.4 –0.2 0 0.2 0.4

PHASE (Degrees)

PHASE (Degrees)

00539-009

00539-007

00539-008

Rev. G | Page 6 of 20