100 kHz max excitation output
Impedance range 0.1 kΩ to 10 MΩ, 12-bit resolution
DSP real and imaginary calculation (DFT)
3 V/5 V power supply
Programmable sinewave output
Frequency resolution 27 bits (<0.1 Hz)
Frequency sweep capability with serial I
12-Bit sampling ADC
ADC sampling 1 MSPS, INL ± 1 LSB max
On-chip temp sensor allows ±2 °C accuracy
Temperature range −40°C to +125°C
16 lead SSOP package
The AD5934 is a high precision impedance converter system
solution which combines an on board frequency generator with
a 12 Bit 1MSPS ADC. The frequency generator allows an
external complex impedance to be excited with a known
frequency. The response signal from the impedance is sampled
by the on board ADC and DFT processed by an on-board DSP
engine. The DFT algorithm returns a Real (R) and imaginary (I)
data word at each output frequency. This magnitude of these data
words must be further scaled by calibrated Gain Factor in order
to return the actual impedance value at each frequency point. The
magnitude of the impedance and relative phase of the
2
C loading
Network Analyzer
AD5934
impedance at each frequency point along the sweep is easily
calculated using the following equations:
122
−
)/(
=+=
To determine the value of the unknown impedance Z(w),
generally a frequency sweep is performed. The impedance can
be calculated at each point and an impedance profile i.e. frequency
vs. magnitude plot can be created. The system allows the user to
program a 2 V p-p sinusoidal signal as excitation to an external
load. Output voltage excitation ranges of 1 V, 400 mV, 200 mV
can also be programmed. The signal is provided on chip using
DDS techniques. Frequency resolution of 27 bits (less than
0.1 HZ) can be achieved using this method. To perform the
frequency sweep, the user must first program the conditions
required for the sweep; start frequency, step frequency, and
number of incremental points along the sweep into onboard
registers. Once the relevant registers have been programmed, a
Start Command to the control register is required in order to
begin the sweep. To determine the impedance of the load at any
one frequency point, Z(w), a measurement system comprised of
a transimpedance amplifier, gain stage, and ADC are used to
record data. The gain stage for the response stage is 1 or 5. At
each point on the sweep the ADC will take 1024 samples and
calculate a Discrete Fourier Transform to provide the real and
imaginary data for the response signal waveform. The real and
imaginary data stored in memory and is available to the user
through the 1
2
C interface. The ADC is a low noise; high speed
1 MSPS sampling ADC that operates from 3 V supply. Clocking
for both the DDS and ADC signals is provided externally via
the MCLK reference clock, which is provided externally from a
crystal oscillator or system clock. The AD5934 is available in a
16 lead SSOP.
RITanPhaseIRMagnitude
Figure 1. AD5934 Block Diagram
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Y Version
Parameter Min Typ Max Unit Test Conditions/Comments
SYSTEM SPECS
Impedance Range 0.001 10 MΩ
Total System Accuracy 1 %
System ppm 250 ppm/°C Vdd = 3.3 V @ 25°C, 500 Hz bandwidth
MCLK Update Rate 16 MSPS System clock update rate
OUTPUT STAGE
FREQUENCY SPECS
Output Frequency Range 0 100 kHz Hz
Output Frequency Resoltuion 27 Bits
MCLK External Rerference Clock.
Initial Frequency Accuracy 0.1 Hz
OUTPUT VOLTAGE SPECS
AC Voltage Range (div by 1) 2.0 Volts peak to peak
Output Voltage Error 0.9 %
DC Bias (vdd/2 ) 1.65 Volts DC bias of AC Signal vdd = 3.3 V
DC Bias Error ±9 % Tolerance of DC Bias
AC Voltage Range div by 2 1.0 Volts peak to peak
Output Voltage Error 0.8 %
DC Bias (Vdd/4) 0.79 Volts DC bias of AC Signal vdd = 3.3 V
DC Bias Error ±10 % Tolerance of DC Bias
AC Voltage Range div by 5 0. 4 Volts peak to peak
Output Voltage Error 0.7 %
DC Bias (Vdd/10) 0.32 Volts DC bias of AC Signal vdd = 3.3 V
DC Bias Error ±9 % Tolerance of DC Bias
AC Voltage Range div by 10 0.2 Volts peak to peak
Output Voltage Error 0.4 %
DC Bias (Vdd/20) 0.16 Volts DC bias of AC Signal vdd = 3.3 V
DC Bias Error ±7 % Tolerance of DC Bias
DC Output Impedance
(at Vout)
DC Output Impedance 2.4 kΩ
DC Output Impedance 1 KΩ
DC Output Impedance 600 Ω
MIN
to T
unless otherwise noted.
MAX
1,2
400 Ω
Uni-Polar Sinusoidal Signal at Vout. System
accuracy only guarentted in this range.
>100 kHz achievable by device but accuracy
not guarenteed.
<0.1 Hz Resolution achievable using DDS
techniques
System Output Exitation Frequency
Accuracy using external clock/crystal post
triml. 0-100 kHz Range.
Pk-Pk Unipolar output excitation Voltage on
Vout. Vdd = 3.3 V
Voltage Error on Pk-Pk Output Excitation
voltage. Vdd = 3.3 V
Pk-Pk Unipolar output excitation Voltage on
VOut. Vdd = 3.3 V
Voltage Error on Pk-Pk Output excitation
voltage. Vdd = 3.3 V
Pk-Pk Unipolar output excitation Voltage on
Vout. Vdd = 3.3 V
Voltage Error on Pk-Pk Output excitation
voltage. Vdd = 3.3 V
Pk-Pk Unipolar output excitation Voltage on
VOut. Vdd = 3.3 V
Voltage Error on Pk-Pk Output excitation
voltage. Vdd = 3.3 V
2.0 Vp-p, Output frequency = 30 kHz
(external oscillator), vdd = 3.3 V, Ta = 25°C
1.0 Vp-p, Output frequency = 30 kHz
(external oscillator), vdd = 3.3 V, Ta = 25°C
400 mVp-p, Output frequency = 30 kHz,
(external oscillator) vdd = 3.3 V, Ta = 25°C
200 mVp-p, Output frequency = 30 kHz
(external oscillator), vdd = 3.3 V, Ta = 25°C
Rev. PrB | Page 3 of 48
AD5934 Preliminary Technical Data
Y Version
Parameter Min Typ Max Unit Test Conditions/Comments
Short Circuit Current (at Vout) ±7 mA
Short Circuit Current ±1 mA
Short Circuit Current ±2. 5 mA
Short Circuit Current ±4. .5 mA
AC CHARACTERISTICS
Signal to Noise Ratio 60 dB
Total Harmonic Distortion −52 dB
Spurious free Dynamic
Range (SFDR)
Wideband (0 to 1 MHz) 56 dB
Narrowband (± 5 kHz) 85 dB
Clock Feedthrough
(0 to 17 MHz)
SYSTEM RESPONSE STAGE
ANALOG INPUT VIN
Input Leakage Current 1 nA To Pin VIN
Input Capacitance 3.5 pF
Input Impedance 68.5G Ω
ADC ACCURACY
Resolution 12 bits
Sampling Rate 1 MSPS
Integral Nonlinearity ±1 LSB No missing Codes
Differential Nonlinearity ±1 LSB Guarentted monitonic
Offset Error ±3 LSB
Gain Error ±6 LSB
TEMPERATURE SENSOR
Accuracy ±1 °C Ta = −40 °C to 125 °C
Resolution 0.03125 °C
Auto Conversion Update Rate 1 sec Temperature measurement every 1 second
Temperature Conversion
Time
−60 dB
800 µs Vdd = 3.3 V
1,2
2.0 Vp-p, Output frequency = 30 kHz
(external oscillator), vdd = 3.3 V, Ta = 25°C
2.0 Vp-p, Output frequency = 30 kHz
(external oscillator), vdd = 3.3 V, Ta = 25°C
2.0 Vp-p, Output frequency = 30 kHz
(external oscillator), vdd = 3.3v, Ta = 25°C
2.0 Vp-p, Output frequency = 30 kHz
(external oscillator), vdd = 3.3 V, Ta = 25°C
Output excitation voltage = 30kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 3.3 V
Output excitation voltage = 30kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 3.3 V
Output excitation voltage = 30 kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 3.3 V
Output excitation voltage = 30 kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 3.3 V
Output excitation voltage = 30 kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 3.3 V
Pin capacitance between VouT and Gnd.
Vdd = 3.3 V, @ 25°C
Input impedance between Vout and Gnd.
vdd = 3.3 V,@ 25°C. No feedback resistor
connected.
Rev. PrB | Page 4 of 48
Preliminary Technical Data AD5934
Y Version
1,2
Parameter Min Typ Max Unit Test Conditions/Comments
LOGIC INPUTS
Vih, Input High Voltage 2.3 VDD = 3 V
Vil, Input Low Voltage 0.9 VDD = 3 V
Input Current ±4.2 µA Vdd = 3.3 V, Ta =25°C,
Input Capacitance 7 pF Vdd = 3.3 V, Ta = 25°C
POWER REQUIREMENTS
Vdd 3.3 Volts
IDD (Normal Mode) 9 mA Digital and analog supply currents
IDD (Powerdown Mode) 0.7 µA Digital and analog supply currents
1
Temperature ranges are as follows: Y version = −40°C to +125°C, typical at 25°C.
2
Guaranteed by design and characterization, not production tested.
Rev. PrB | Page 5 of 48
AD5934 Preliminary Technical Data
VDD = +5.0 V ±10% T
Table 2.
Y Version
Parameter Min Typ Max Unit Test Conditions/Comments
SYSTEM SPECS
Impedance Range 0.001 10 MΩ
Total System Accuracy 1 %
System ppm 250 ppm/°C Vdd = 5.5 V @ 25°C, 500 Hz bandwidth
MCLK Update Rate 16 MSPS System clock update rate
OUTPUT STAGE
FREQUENCY SPECS
Output Frequency Range 0 100 kHz Hz
Output Frequency
Resoltuion
MCLK External Rerference Clock.
Initial Frequency Accuracy 0.1 Hz
OUTPUT VOLTAGE SPECS
AC Voltage Range div by 1 2.0 Volts peak to peak
Output Voltage Error 0.9 %
DC Bias (vdd/2 ) 1.65 Volts DC bias of AC Signal vdd = 5.5 V
DC Bias Error ±9 % Tolerance of DC Bias
AC Voltage Range div by 2 1.0 Volts peak to peak
Output Voltage Error 0. 8 %
DC Bias (Vdd/4) 0.79 Volts DC bias of AC Signal vdd = 5.5 V
DC Bias Error ±10 % Tolerance of DC Bias
AC Voltage Range div by 5 0.4 Volts peak to peak
Output Voltage Error 0.7 %
DC Bias (Vdd/10) 0.32 Volts DC bias of AC Signal vdd = 5.5 V
DC Bias Error ±9 % Tolerance of DC Bias
AC Voltage Range div by
10
Output Voltage Error 0.4 %
DC Bias (Vdd/20) 0.16 Volts DC bias of AC Signal vdd = 5.5 V
DC Bias Error ±7 % Tolerance of DC Bias
DC Output Impedance
(at Vout)
DC Output Impedance 2.4 kΩ
DC Output Impedance 1 kΩ
DC Output Impedance 600 Ω
Short Circuit Current
(at Vout)
MIN
to T
unless otherwise noted.
MAX
1,2
27 Bits
0. 2 Volts peak to peak
400 Ω
±7 mA
Uni-Polar Sinusoidal Signal at Vout.System
accuracy only guarentted in this range. >100 kHz
achievable by device but accuracy not
guarenteed.
<0.1 Hz Resolution achievable using DDS
techniques
System Output Exitation Frequency Accuracy
using external clock/crystal post triml. 0-100 kHz
Range.
Pk-Pk Unipolar output excitation Voltage on
VOut. Vdd = 5.5 V
Voltage Error on Pk-Pk Output Excitation
voltage. Vdd = 5.5 V
Pk-Pk Unipolar output excitation Voltage on
Vout. Vdd = 5.5 V
Voltage Error on Pk-Pk Output excitation
voltage. Vdd = 5.5 V
Pk-Pk Unipolar output excitation Voltage on
Vout. Vdd = 5.5 V
Voltage Error on Pk-Pk Output excitation
voltage. Vdd = 5.5 V
Pk-Pk Unipolar output excitation Voltage on
VOut. Vdd = 5.5 V
Voltage Error on Pk-Pk Output excitation
voltage. Vdd = 5.5 V
2.0 Vp-p, Output frequency = 30 kHz (external
oscillator), vdd = 5.5 V, Ta = 25°C
1.0 Vp-p, Output frequency = 30 kHz (external
oscillator), vdd = 5.5 V, Ta = 25°C
400 mVp-p, Output frequency = 30 kHz, (external
oscillator) vdd = 5. 5 V, Ta = 25°C
200 mVp-p, Output frequency = 30 kHz (external
oscillator), vdd = 5. 5 V, Ta = 25°C
2.0 Vp-p, Output frequency = 30 kHz (external
oscillator), vdd = 5. 5 V, Ta = 25°C
Rev. PrB | Page 6 of 48
Preliminary Technical Data AD5934
Y Version
Parameter Min Typ Max Unit Test Conditions/Comments
Short Circuit Current ±1 mA
Short Circuit Current ±2.5 mA
Short Circuit Current ±4.5 mA
AC CHARACTERISTICS
Signal to Noise Ratio 60 dB
Total Harmonic Distortion −52 dB
Spurious free Dynamic
Range (SFDR)
Wideband (0 to 1 MHz) 56 dB
Narrowband (±5 kHz) 85 dB
Clock Feedthrough
(0 to 17 MHz)
SYSTEM RESPONSE STAGE
ANALOG INPUT VIN
Input Leakage Current 1 nA To Pin VIN
Input Capacitance 3.5 pF
Input Impedance 68.5G Ω
ADC ACCURACY
Resolution 12 Bits
Sampling Rate 1 MSPS
Integral Nonlinearity ±1 LSB No missing Codes
Differential Nonlinearity ±1 LSB Guaraunted monitonic
Offset Error
Gain Error
TEMPERATURE SENSOR
Accuracy ±1 °C Ta = −40°C to 125°C
Resolution 0.03125 °C
Auto Conversion Update
Rate
Temperature Conversion
Time
−60 dB
1 sec Temperature measurement every 1 sec
800 µs Vdd = 5. 5 V
1,2
2.0 Vp-p, Output frequency = 30 kHz (external
oscillator), vdd = 5. 5 V, Ta = 25°C
2.0 Vp-p, Output frequency = 30 kHz (external
oscillator), vdd = 5. 5 V, Ta = 25°C
2.0Vp-p, Output frequency = 30 kHz (external
oscillator), vdd = 5. 5 V, Ta = 25°C
Output excitation voltage = 30 kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 5. 5 V
Output excitation voltage = 30 kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 5.5 V
Output excitation voltage = 30 kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 5.5 V
Output excitation voltage = 30 kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 5.5 V
Output excitation voltage = 30 kHz, external
oscillator mclk = 16.776 MHz, Ta = 25°C
vdd = 5.5 V
Pin capacitance between VouT and Gnd = 5. 5 V
@ 25°C
Input impedance between Vout and Gnd = 5.5 V
@ 25°C. No feedback resistor connected.
Rev. PrB | Page 7 of 48
AD5934 Preliminary Technical Data
Y Version
1,2
Parameter Min Typ Max Unit Test Conditions/Comments
LOGIC INPUTS
Vih, Input High Voltage 2.3 VDD = 3 V
Vil, Input Low Voltage 0.9 VDD = 3 V
Input Current ±4.2 µA Vdd = 5. 5 V,Ta =25°C,
Input Capacitance 7 pF Vdd = 5. 5 V,Ta = 25°C
POWER REQUIREMENTS
Vdd 3.3 Volts
IDD (Normal Mode) 9 mA Digital and analog supply currents
IDD (Powerdown Mode) 0.7 µA Digital and analog supply currents
1
Temperature ranges are as follows: Y version = −40°C to +125°C, typical at 25°C.
2
Guaranteed by design and characterization, not production tested.
Rev. PrB | Page 8 of 48
Preliminary Technical Data AD5934
TIMING CHARACTERISTICS
Table 3. I2C Serial Interface
Parameter Limit at T
F
1483 kHz max SCL clock frequency
SCL
t1 0.7 µs min SCL cycle time
t2 0. 2 µs min t
t3 0. 6 µs min t
t4 0.6 µs min tHD,
t5 3 ns min tSU,
t6 0.9 µs max tHD,
0 µs min tHD,
t7 0.007 µs min tSU,
t8 0.6 µs min tSU,
t9 0.161 µs min t
t10 55 ns max tF, fall time of SDA when transmitting
0 ns min tR, rise time of SCL and SDA when receiving (CMOS compatible)
t11 300 ns max tF, fall time of SDA when transmitting
0 ns min tF, fall time of SDA when receiving (CMOS compatible)
300 ns max tF, fall time of SCL and SDA when receiving
20 + 0.1 CB ns min tF, fall time of SCL and SDA when transmitting
CB 400 pF max Capacitive load for each bus line
MIN
, T
Unit Description
MAX
, SCL high time
HIGH
, SCL low time
LOW
, start/repeated start condition hold time
STA
, data setup time
DAT
data hold time
DAT
data hold time
DAT
setup time for repeated start
STA
stop condition setup time
STO
, bus free time between a stop and a start condition
BUF
SDA
t
SCL
9
t
START
CONDITION
t
3
4
t
t
11
10
t
6
t
2
Figure 2. I
t
t
5
7
2
C Interface Timing Diagram
t
4
REPEATED
START
CONDITION
t
1
t
8
STOP
CONDITION
03773-0-007
Rev. PrB | Page 9 of 48
AD5934 Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise note
Table 4.
Parameter Rating
VDD to GND −0.3 V to +7. 0 V
Digital Input Voltage to GND −0.3 V to VDD +0.3 V
V
to GND −0.3 V to VDD +0.3 V
OUT
Vin to GND −0.3 V to VDD +0.3 V
Operating Temperature Range
Extended Industrial (Y grade) −40°C to +125°C
Storage Temperature Range −65°C to +160°C
Maximum Junction Temperature 150°C
uSOIC Package
θJA Thermal Impedance 332°C/W
θJC Thermal Impedance 120°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
ESD 2.0 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrB | Page 10 of 48
Preliminary Technical Data AD5934
PIN CONFIGURATION AND DESCRIPTIONS
1
N/C
2
N/C
N/C
3
4
AD5934
5
VIN
VOUT
N/C
MCLK
TOP VIEW
(Not to Scale)
6
7
8
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Mnemonic Description
N/C No Connect.
RFB_PIN External Feedback Resistor. This is used to set the gain of the input signal of the VIN node.
VOUT Input Signal to transimpedance amplifier. External Feedback resistor will control gain of transimpedance amplifier.
MCLK Master Clock for the system. Used to provide output excitation signal and as sampling of ADC.
DVDD Digital Supply Voltage
AVDD1 Analog Supply Voltage 1
AVDD2 Analog Supply Voltage 2
DGND Digital Ground
AGND1 Analog Gnd 1
AGND2 Analog Gnd 2
SDA I2C Data Input
SCL I2C Clock Input
Table 6. Recommended Pin Connections for AD5934
Mnemonic Function
Pin 1 Ext_OutTest Pin—Leave unconnected
Pin 2 NCNo Connect—Do not apply any signal
Pin 3 NCNo Connect—Do not apply any signal
Pin4 NCNo Connect—Do not apply any signal
Pin5 Vin (Receive side of impedance)Test Impedance is connected between this pin and vout pin
Pin6 Vout (Excitation side of impedance)Test Impedance is connected between this pin and vin pin
Pin 7 NCNo Connect—Do not apply any signal
Pin 8 Ext_ClkExtclk Pad—Only used if external clk option is selected
Pin 9 AVDD1Recommended to be tied to 3.3 V
Pin10 AVDD2Recommended to be tied to 3.3 V
Pin11 DVDDRecommended to be tied to 3.3 V
Pin12 DGND Must be tied to GND
Pin13 AGND1 Must be tied to GND
Pin14 AGND2 Must be tied to GND
Pin15 SDAI2C Data Pin
Pin16 SCLI2C Clk Pin
16
15
14
13
12
11
10
9
SCL
SDA
AGND2
AGND1RFB_PIN
DGND
AVDD2
AVDD1
DVDD
It is recommended to tie all supply connections (Pins 9, 10, 11) and run from a single supply between 3. 0 V and 5.5 V. Also, it is
recommended to connect all ground signals together (Pins 12, 13, 14).
Rev. PrB | Page 11 of 48
AD5934 Preliminary Technical Data
TYPICAL PERFORMANCE CHARACTERISTICS
1.00E-06
Ta = 25°C
Vdd = 3.3v
Rfb = 1k, 0.5k impedance
1.00E-07
1.00E-08
Gain Factor
1.00E-09
1.00E-10
020000400006000080000100000
Rfb = 1k, 1k impedance
Rfb = 10k, 10k impedance
Rfb = 50k, 50k impedance
Rfb = 100k, 100k impedance
Rfb = 1M, 1M impedance
Frequency (Hz)
Figure 4. Gain Factor vs. Frequency for Various Rfb/Impedance Ranges
2.000E-08
1.980E-08
1.960E-08
1.940E-08
1.920E-08
1.900E-08
1.880E-08
Gain Factor
1.860E-08
1.840E-08
1.820E-08
1.800E-08
1.780E-08
Rfb = 1k ohm
Vdd = 3.3v
Ta = 25°C
5KΩ impedance
15KΩ impedance
10KΩ impedance
020000400006000080000100000120000
Frequency (Hz)
Figure 5. Gain Factor vs. Frequency for 5 Ωk to 15 kΩ Impedance Range
Figure 7. Gain Factor vs. Frequency for 500 kΩ to 1.5 MΩ Impedance Range