ANALOG DEVICES AD5624 Service Manual

2.7 V to 5.5 V, 450 μA, Rail-to-Rail Output,

FEATURES

Low power, quad nanoDACs

AD5664: 16 bits

AD5624: 12 bits Relative accuracy: ±12 LSBs max Guaranteed monotonic by design 10-lead MSOP and 3 mm × 3 mm LFCSP_WD

2.7 V to 5.5 V power supply Power-on reset to zero Per channel power-down Serial interface, up to 50 MHz

APPLICATIONS

Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

Quad, 12-/16-Bit nanoDACs

AD5624/AD5664

FUNCTIONAL BLOCK DIAGRAM

SCLK

SYNC

V

DD

INPUT

REGISTER

INTERFACE

LOGIC

DIN

INPUT

REGISTER

INPUT

REGISTER

INPUT

REGISTER

POWER-ON

RESET

GND

REGISTER

Figure 1.

Table 1. Related Devices

Part No. Description

AD5624R/AD5644R/AD5664R

V

REF

AD5624/AD5664

STRING

DAC

DAC A

STRING

DAC B

STRING

DAC C

STRING

DAC D

BUFFER

POWER-DOWN

LOGIC

2.7 V to 5.5 V quad, 12-, 14-, 16-bit DACs with internal reference

®

V

A

OUT

V

B

OUT

V

C

OUT

V

D

OUT

05943-001

GENERAL DESCRIPTION

The AD5624/AD5664, members of the nanoDAC family, are low power, quad, 12-, 16-bit buffered voltage-out DACs that operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design.

The AD5624/AD5664 require an external reference voltage to set the output range of the DAC. The part incorporates a poweron reset circuit that ensures the DAC output powers up to 0 V and remains there until a valid write takes place. The parts contain a power-down feature that reduces the current consumption of the device to 480 nA at 5 V and provides software-selectable output loads while in power-down mode.

The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is 2.25 mW at 5 V, going down to 2.4 µW in power-down mode.

The AD5624/AD5664 on-chip precision output amplifier allows rail-to-rail output swing to be achieved.

The AD5624/AD5664 use a versatile 3-wire serial interface that operates at clock rates up to 50 MHz, and are compatible with standard SPI®, QSPI™, MICROWIRE™, and DSP interface standards.

PRODUCT HIGHLIGHTS

1. Relative accuracy: ±12 LSBs maximum.

2. Available in 10-lead MSOP and 10-lead, 3 mm × 3 mm,

LFCSP_WD.

3. Low power, typically consumes 1.32 mW at 3 V and

2.25 mW at 5 V.

4. Maximum settling time of 4.5 s (AD5624) and 7 s

(AD5664).

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

AD5624/AD5664

SPECIFICATIONS

VDD = +2.7 V to +5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; V

Table 2.

A Grade

1

Parameter Min Typ Max Min Typ Max Unit Conditions/Comments

STATIC PERFORMANCE

2

AD5664

Resolution 16 16 Bits Relative Accuracy ±8 ±16 ±6 ±12 LSB Differential Nonlinearity ±1 ±1 LSB

AD5624

Resolution 12 Bits Relative Accuracy ±0.5 ±1 LSB Differential Nonlinearity ±0.25 LSB

Zero-Code Error 2 10 2 10 mV

Offset Error ±1 ±10 ±1 ±10 mV Full-Scale Error −0.1 ±1 −0.1 ±1 % of FSR All ones loaded to DAC register Gain Error ±1.5 ±1.5 % of FSR Zero-Code Error Drift ±2 ±2 μV/°C Gain Temperature

±2.5 ±2.5 ppm of FSR/°C

Coefficient

DC Power Supply Rejection

−100 −100 dB

Ratio

DC Crosstalk 10 10 μV

10 10 μV/mA Due to load current change 5 5 μV

OUTPUT CHARACTERISTICS

3

Output Voltage Range 0 VDD 0 VDD V

Capacitive Load Stability 2 2 nF RL = ∞

10 10 nF RL = 2 kΩ

DC Output Impedance 0.5 0.5 Ω

Short-Circuit Current 30 30 mA VDD = 5 V

Power-Up Time 4 4

REFERENCE INPUTS

Reference Current 170 200 170 200 μA V

Reference Input Range 0.75 VDD 0.75 VDD V

Reference Input Impedance 26 26 kΩ

LOGIC INPUTS

3

Input Current ±2 ±2 μA All digital inputs

V

, Input Low Voltage 0.8 0.8 V VDD = 5 V, 3 V

INL

V

, Input High Voltage 2 2 V VDD = 5 V, 3 V

INH

Pin Capacitance 3 3 pF

= VDD; all specifications T

REF

B Grade

1

MIN

to T

, unless otherwise noted.

MAX

Guaranteed monotonic by design

All zeroes loaded to DAC register

DAC code = midscale ; V 10%

Due to full-scale output change RL = 2 kΩ to GND or VDD

Due to powering down (per channel)

μs

Coming out of power-down mode; V

DD

= 5 V

= VDD = 5.5 V

REF

±

DD

Rev. 0 | Page 3 of 24

AD5624/AD5664

A Grade

1

B Grade

1

Parameter Min Typ Max Min Typ Max Unit Conditions/Comments

POWER REQUIREMENTS

VDD 2.7 5.5 2.7 5.5 V

IDD (Normal Mode)

4

V

= VDD, VIL = GND

IH

VDD = 4.5 V to 5.5 V 0.45 0.9 0.45 0.9 mA VDD = 2.7 V to 3.6 V 0.44 0.85 0.44 0.85 mA

IDD (All Power-Down

Modes)

5

V

= VDD, VIL = GND

IH

VDD = 4.5 V to 5.5 V 0.48 1 0.48 1 μA VDD = 2.7 V to 3.6 V 0.2 1 0.2 1 μA

1

Temperature range: A grade and B grade: −40°C to +105°C.

2

Linearity calculated using a reduced code range: AD5664 (Code 512 to Code 65,024); AD5624 (Code 32 to Code 4064); output unloaded.

3

Guaranteed by design and characterization, not production tested.

4

Interface inactive. All DACs active. DAC outputs unloaded.

5

All DACs powered down.

AC CHARACTERISTICS

VDD = 2.7 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; V

Table 3.

Parameter

2, 3

Min Typ Max Unit Conditions/Comments

Output Voltage Settling Time

AD5664 4 7 μs ¼ to ¾ scale settling to ±2 LSB

AD5624 3 4.5 μs ¼ to ¾ scale settling to ±0.5 LSB Slew Rate 1.8 V/μs Digital-to-Analog Glitch Impulse 10 nV-s 1 LSB change around major carry Digital Feedthrough 0.1 nV-s Reference Feedthrough −90 dBs V Digital Crosstalk 0.1 nV-s Analog Crosstalk 1 nV-s DAC-to-DAC Crosstalk 1 nV-s Multiplying Bandwidth 340 kHz V Total Harmonic Distortion −80 dB V Output Noise Spectral Density 120 nV/√Hz DAC code = midscale, 1 kHz 100 nV/√Hz DAC code = midscale, 10 kHz Output Noise 15

1

Guaranteed by design and characterization, not production tested.

2

Temperature range: −40°C to +105°C; typical at 25°C.

3

See the Terminology section.

= VDD; all specifications T

REF

μV p-p

to T

MIN

= 2 V ± 0.1 V p-p, frequency 10 Hz to 20 MHz

REF

= 2 V ± 0.1 V p-p

REF

= 2 V ± 0.1 V p-p, frequency = 10 kHz

REF

, unless otherwise noted.

MAX

0.1 Hz to 10 Hz

1

Rev. 0 | Page 4 of 24

AD5624/AD5664

TIMING CHARACTERISTICS

All input signals are specified with tR = tF = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2 (see Figure 2). V

= 2.7 V to 5.5 V; all specifications T

DD

Table 4.

Limit at T Parameter

2

t

1

VDD = 2.7 V to 5.5 V Unit Conditions/Comments

20 ns min SCLK cycle time t2 9 ns min SCLK high time t3 9 ns min SCLK low time t4 13 ns min

t5 5 ns min Data setup time t6 5 ns min Data hold time t7 0 ns min

t8 15 ns min t9 13 ns min t10 0 ns min

1

Guaranteed by design and characterization, not production tested.

2

Maximum SCLK frequency is 50 MHz at VDD = 2.7 V to 5.5 V.

MIN

, T

to T

MAX

, unless otherwise noted.

MAX

SYNC to SCLK falling edge setup time

SCLK falling edge to Minimum

SYNC high time

SYNC rising edge

SYNC rising edge to SCLK fall ignore SCLK falling edge to

SYNC fall ignore

TIMING DIAGRAM

SCLK

SYNC

DIN

t

10

t

8

t

4

t

6

t

5

t

1

t

3

2

t

9

t

7

DB0DB23

05943-002

Figure 2. Serial Write Operation

Rev. 0 | Page 5 of 24

AD5624/AD5664

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 5.

Parameter Rating

VDD to GND −0.3 V to +7 V V

to GND −0.3 V to VDD + 0.3 V

OUT

V

to GND −0.3 V to VDD + 0.3 V

REF

Digital Input Voltage to GND −0.3 V to VDD + 0.3 V Operating Temperature Range

Industrial (A Grade, B Grade) −40°C to +105°C Storage Temperature Range −65°C to +150°C Junction Temperature (TJ max) 150°C

Power Dissipation (TJ max − TA)/θJA LFCSP_WD Package (4-Layer Board)

θJA Thermal Impedance 61°C/W MSOP Package (4-Layer Board)

θJA Thermal Impedance 142°C/W

θJC Thermal Impedance 43.7°C/W Reflow Soldering Peak Temperature

Pb-Free 260°C ± 5°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. 0 | Page 6 of 24

AD5624/AD5664

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

V

A

OUT

V

OUT

GND

V

OUT

V

OUT

2

B

3

4

C

5

D

AD5624/

AD5664

TOP VIEW

(Not to Scale)

10

V

REF

9

V

DD

8

DIN

7

SCLK

6

SYNC

5943-003

Figure 3. Pin Configuration

Table 6. Pin Function Descriptions

Pin No. Mnemonic Description

1 V 2 V

A Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation.

OUT

B Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation.

OUT

3 GND Ground Reference Point for All Circuitry on the Part. 4 V 5 V 6

C Analog Output Voltage from DAC C. The output amplifier has rail-to-rail operation.

OUT

D Analog Output Voltage from DAC D. The output amplifier has rail-to-rail operation.

OUT

SYNC Active Low Control Input. This is the frame synchronization signal for the input data. When SYNC goes low, it

powers on the SCLK and DIN buffers and enables the input shift register. Data is transferred in on the falling edges of the next 24 clocks. If

SYNC is taken high before the 24th falling edge, the rising edge of SYNC acts as an interrupt

and the write sequence is ignored by the device.

7 SCLK

Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data can be transferred at rates up to 50 MHz.

8 DIN

Serial Data Input. This device has a 24-bit input shift register. Data is clocked into the register on the falling edge of the serial clock input.

9 VDD

Power Supply Input. These parts can be operated from 2.7 V to 5.5 V. The supply should be decoupled with a 10 μF capacitor in parallel with a 0.1 μF capacitor to GND.

10 V

Reference Voltage Input.

REF

Rev. 0 | Page 7 of 24

AD5624/AD5664

TYPICAL PERFORMANCE CHARACTERISTICS

10

VDD = V

8

T

6

4

2

0

–2

INL ERROR (LSB)

–4

–6

–8

–10

0 5k 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k 65k

= 25°C

A

REF

= 5V

CODE

Figure 4. INL AD5664

1.0 VDD = V

T

0.8

0.6

0.4

0.2

0

–0.2

INL ERROR (LSB)

–0.4

–0.6

–0.8

–1.0

0 500 1000 1500 2000 2500 3000 3500 4000

= 25°C

A

REF

= 5V

CODE

Figure 5. INL AD5624

1.0

VDD = V T

0.8

0.6

0.4

0.2

0

–0.2

DNL ERROR (LSB)

–0.4

–0.6

–0.8

–1.0

0 10k 20k 30k 40k 50k 60k

= 25°C

A

REF

= 5V

CODE

Figure 6. DNL AD5664

05943-004

05943-005

05943-006

0.20 VDD = V

T

0.15

0.10

0.05

0

–0.05

DNL ERROR (LSB)

–0.10

–0.15

–0.20

0 500 1000 1500 2000 2500 3000 3500 4000

= 25°C

A

REF

= 5V

CODE

Figure 7. DNL AD5624

8

6

V

= V

= 5V

DD

4

2

0

ERROR (LSB)

–2

–4

–6

–8

–40 –20 40200 1008060

REF

TEMPERATURE (°C)

Figure 8. INL Error and DNL Error vs. Temperature

10

8

6

= 5V

V

DD

4

= 25°C

T

A

2

0

–2

ERROR (LSB)

–4

–6

–8

–10

0.75 1.25 1.75 2.25 4.253.753.252. 75 4.75

Figure 9. INL and DNL Error vs. V

V

(V)

REF

05943-007

MAX INL

MAX DNL

MIN DNL

MIN INL

05856-022

MAX INL

MAX DNL

MIN DNL

MIN INL

05943-009

Rev. 0 | Page 8 of 24

ANALOG DEVICES AD5624 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION

PRODUCT HIGHLIGHTS

TABLE OF CONTENTS

SPECIFICATIONS

AC CHARACTERISTICS

TIMING CHARACTERISTICS

TIMING DIAGRAM

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS