Analog Devices AD557JN Datasheet
DACPORT Low Cost, Complete
BIT1
(MSB)
BIT8
(LSB)
GND
CS CE
CONTROL
INPUTS
DIGITAL INPUT DATA (BUS)
+
V
CC
l2L
CONTROL
LOGIC
l
2
L LATCHES
8-BIT VOLTAGE-SWITCHING
D-TO-A CONVERTER
MSB
LSB
OUTPUT
AMP
CONTROL
AMP
BAND-GAP
REFERENCE
GND
V
OUT
V
OUT
SENSE A
V
OUT
SENSE B
AD557
a
FEATURES
Complete 8-Bit DAC
Voltage Output—0 V to 2.56 V
Internal Precision Band-Gap Reference
Single-Supply Operation: 5 V (ⴞ10%)
Full Microprocessor Interface
Fast: 1 s Voltage Settling to ⴞ1/2 LSB
Low Power: 75 mW
No User Trims Required
Guaranteed Monotonic Over Temperature
MIN
to T
MAX
2
L), an extremely
All Errors Specified T
Small 16-Lead DIP or 20-Lead PLCC Package
Low Cost
PRODUCT DESCRIPTION
The AD557 DACPORT® is a complete voltage-output 8-bit
digital-to-analog converter, including output amplifier, full
microprocessor interface and precision voltage reference on a
single monolithic chip. No external components or trims are
required to interface, with full accuracy, an 8-bit data bus to an
analog system.
The low cost and versatility of the AD557 DACPORT are the
result of continued development in monolithic bipolar technologies.
The complete microprocessor interface and control logic is
implemented with integrated injection logic (I
dense and low-power logic structure that is process-compatible
with linear bipolar fabrication. The internal precision voltage
reference is the patented low-voltage band-gap circuit which
permits full-accuracy performance on a single 5 V power supply.
Thin-film silicon-chromium resistors provide the stability required
for guaranteed monotonic operation over the entire operating
temperature range, while laser-wafer trimming of these thin-film
resistors permits absolute calibration at the factory to within
± 2.5 LSB; thus, no user-trims for gain or offset are required. A
new circuit design provides voltage settling to ±1/2 LSB for a
full-scale step in 800 ns.
The AD557 is available in two package configurations. The
AD557JN is packaged in a 16-lead plastic, 0.3"-wide DIP. For
surface mount applications, the AD557JP is packaged in a
20-lead JEDEC-standard PLCC. Both versions are specified
over the operating temperature range of 0°C to 70°C.
DACPORT is a registered trademark of Analog Devices, Inc.
*Covered by U.S. Patent Nos. 3,887,863; 3,685,045; 4,323,795; other
patents pending.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
P-Compatible 8-Bit DAC
AD557*
FUNCTIONAL BLOCK DIAGRAM
PRODUCT HIGHLIGHTS
1. The 8-bit I2L input register and fully microprocessorcompatible control logic allow the AD557 to be directly
connected to 8- or 16-bit data buses and operated with standard control signals. The latch may be disabled for direct
DAC interfacing.
2. The laser-trimmed on-chip SiCr thin-film resistors are
calibrated for absolute accuracy and linearity at the factory.
Therefore, no user trims are necessary for full rated accuracy
over the operating temperature range.
3. The inclusion of a precision low-voltage band-gap reference
eliminates the need to specify and apply a separate reference
source.
4. The AD557 is designed and specified to operate from a
single 4.5 V to 5.5 V power supply.
5. Low digital input currents, 100 µA max, minimize bus loading.
Input thresholds are TTL/ low voltage CMOS compatible.
6. The single-chip, low power I
ently more reliable than hybrid multichip or conventional
single-chip bipolar designs.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2001
2
L design of the AD557 is inher-
AD557–SPECIFICATIONS
(@ TA = 25ⴗC, VCC = 5 V unless otherwise noted)
Model Min Typ Max Unit
RESOLUTION 8 Bits
RELATIVE ACCURACY
0°C to 70°C ± 1/2 1 LSB
OUTPUT
ABSOLUTE MAXIMUM RATINGS*
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 18 V
Digital Inputs (Pins 1–10) . . . . . . . . . . . . . . . . . . . 0 V to 7.0 V
. . . . . . . . . . . . . . . . . . . . . . . Indefinite Short to Ground
V
OUT
Ranges 0 to 2.56 V
Current Source 5 mA
Sink Internal Passive
Pull-Down to Ground
OUTPUT SETTLING TIME
FULL-SCALE ACCURACY
3
4
0.8 1.5 µs
2
@ 25°C ± 1.5 ±2.5 LSB
T
MIN
to T
MAX
± 2.5 ±4.0 LSB
ZERO ERROR
@ 25°C ± 1 LSB
T
to T
MIN
MAX
MONOTONICITY
T
to T
MIN
Guaranteed But Not Tested
MAX
5
± 3 LSB
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
Storage Temperature Range
N/P (Plastic) Packages . . . . . . . . . . . . . . . . –25°C to +100°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Thermal Resistance
Junction to Ambient/Junction to Case
N/P (Plastic) Packages . . . . . . . . . . . . . . . . . .140/55°C/W
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
DIGITAL INPUTS
T
to T
MIN
Input Current ⴞ100 µA
MAX
Data Inputs, Voltage
Bit On—Logic “1” 2.0 V
Bit On—Logic “0” 0 0.8 V
Control Inputs, Voltage
On—Logic “1” 2.0 V
(LSB) BIT 8
On—Logic “0” 0 0.8 V
Input Capacitance 4 pF
TIMING
6
tW Strobe Pulsewidth 225 ns
T
to T
MIN
MIN
MIN
to T
to T
MAX
MAX
MAX
tDH Data Hold Time 10 ns
T
tDS Data Setup Time 225 ns
T
300 ns
10 ns
300 ns
(MSB) BIT 1
POWER SUPPLY
Operating Voltage Range (VCC)
2.56 Volt Range 4.5 5.5 V
Current (ICC)1525mA
Rejection Ratio 0.03 %/%
POWER DISSIPATION, VCC = 5 V 75 125 mW
OPERATING TEMPERATURE RANGE 0 70 °C
NOTES
1
Relative Accuracy is defined as the deviation of the code transition points from the
ideal transfer point on a straight line from the offset to the full scale of the device.
See “Measuring Offset Error” on the AD558 data sheet.
2
Passive pull-down resistance is 2 kΩ.
3
Settling time is specified for a positive-going full-scale step to ± 1/2 LSB. Negativegoing steps to zero are slower, but can be improved with an external pull-down.
4
The full-scale output voltage is 2.55 V and is guaranteed with a 5 V supply.
5
A monotonic converter has a maximum differential linearity error of ± 1 LSB.
6
See Figure 7.
Specifications shown in boldface are tested on all production units at electrical test.
Specifications subject to change without notice.
ORDERING GUIDE
BIT 6
BIT 5
BIT 4
BIT 3
NC = NO CONNECT
Momentary Short to V
PIN CONFIGURATIONS
DIP
16
V
OUT
15
V
OUT
14
V
OUT
13
GND
12
GNDBIT 4
+V
11
CC
10
CS
9
CE
BIT 7
BIT 6
BIT 5
BIT 3
BIT 2
1
2
3
AD557
4
TOP VIEW
(Not to Scale)
5
6
7
8
PLCC
SENSE A
OUT
OUT
V
NC
20 19123
PIN 1
IDENTIFIER
13
CE
NC
V
18
17
16
15
14
CS
NC
4
5
6
7
8
BIT 7
BIT 8 (LSB)
AD557
TOP VIEW
(Not to Scale)
91011 12
BIT 2
(MSB) BIT 1
SENSE A
SENSE B
V
SENSE B
OUT
GND
NC
GND
+V
CC
CC
Temperature Package Package
Model Range Description Option
AD557JN 0°C to 70°C Plastic DIP N-16
AD557JP 0°C to 70°C Plastic Leaded Chip Carrier P-20A
–2–
REV. B
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