ANALOG DEVICES AD5290 Service Manual

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Compact +30 V / ±15 V 256-Position

FEATURES

256 position
10 kΩ, 50 kΩ, 100 kΩ
+4.5 V to +30 V single-supply operation
±4.5 V to ±15 V dual-supply operation
3-wire SPI®-compatible serial interface
Low temperature coefficient 35 ppm/
THD 0.006% typical
Midscale preset
Compact MSOP-10 package
Automotive temperature range: −40oC to +125oC

1

iCMOS™

process technology

APPLICATIONS

High voltage DAC
Programmable power supply
Programmable gain and offset adjustment
Programmable filters and delays
Actuator control
Audio volume control
Mechanical potentiometer replacement

GENERAL DESCRIPTION

o

C typical

Digital Potentiometer

AD5290

FUNCTIONAL BLOCK DIAGRAM

AD5290

SDO

SDI

CLK

CS

Q

8-BIT

SERIAL

REGISTER

D

CK

8 8

8-BIT

LATCH

RS

POR

Figure 1.

DGND

V

DD

A

W

B

V

SS

04716-001

The AD5290 is one of the few high voltage, high performance,

2, 3

and compact digital potentiometers

in the market at present.
This device can be used as a programmable resistor or resistor
divider. The AD5290 performs the same electronic adjustment
function as mechanical potentiometers, variable resistors, and
trimmers, with enhanced resolution, solid-state reliability, and
superior temperature stability.

With digital rather than manual control, the AD5290 provides
la

yout flexibility and allows closed-loop dynamic controllability.

The AD5290 is available in MSOP-10 package and has 10 kΩ,
50 kΩ, a

nd 100 kΩ options. All parts are guaranteed to operate

over the –40°C to +125°C extended automotive temperature range.

1

iCMOS™ Process Technology. For analog systems designers who need high performance ICs at higher voltage levels, iCMOS is a technology platform that enables the

development of analog ICs capable of 30 V and operating at ±15 V supplies while allowing dramatic reductions in power consumption and package size, and
increased ac and dc performance.

2

The terms digital potentiometer and RDAC are used interchangeably.

3

The RDAC segmentation is protected by U.S. Patent Number 5,495,245.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

AD5290

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TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics—10 kΩ Version................................ 3

Electrical Characteristics—50 kΩ, 100 kΩ Versions............... 5

Interface Timing Characteristics................................................ 7

3-Wire Digital Interface................................................................... 8

Absolute Maximum Ratings............................................................ 9

ESD Caution.................................................................................. 9

Pin Configuration and Descriptions............................................ 10

Typical Performance Characteristics ........................................... 11

Theory of Operation ...................................................................... 15

Programming the Variable Resistor......................................... 15

Programming the Potentiometer Divider............................... 16

3-Wire Serial Bus Digital Interface .......................................... 16

Daisy Chain Operation.............................................................. 16

ESD Protection ........................................................................... 17

Terminal Voltage Operating Range ......................................... 17

Power-Up and Power-Down Sequences.................................. 17

Layout and Power Supply Biasing ............................................ 17

Applications..................................................................................... 18

High Voltage DAC...................................................................... 18

Programmable Power Supply ................................................... 18

Audio Volume Control .............................................................. 18

Outline Dimensions ....................................................................... 20

Ordering Guide .......................................................................... 20

REVISION HISTORY

12/05—Revision 0: Initial Version

Rev. 0 | Page 2 of 20

AD5290

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SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—10 kΩ VERSION

VDD/VSS = ±15 V ± 10%, VA = VDD, VB = VB

Table 1.

Parameter Symbol Conditions Min Typ1Max Unit

DC CHARACTERISTICS RHEOSTAT MODE

Resistor Differential NL
Resistor Nonlinearity

2

2

Nominal Resistor Tolerance R
Resistance Temperature Coefficient
Wiper Resistance R

DC CHARACTERISTICS POTENTIOMETER

DIVIDER MODE
Integral Nonlinearity
Differential Nonlinearity

4

4

Voltage Divider Temperature Coefficient (VW/VW)/T*106Code = 0x80 5 ppm/°C
Full-Scale Error V
Zero-Scale Error V
RESISTOR TERMINALS
Voltage Range

5

Capacitance6 A, B C

Capacitance

6

Common-Mode Leakage I

DIGITAL INPUTS AND OUTPUTS

Input Logic High (CS, CLK, SDI)
Input Logic Low (CS, CLK, SDI)

Output Logic High (SDO) V
Output Logic Low (SDO) V
Input Current I
Input Capacitance

6

POWER SUPPLIES

Positive Supply Current I

Negative Supply Current I

Power Dissipation

7

Power Supply Rejection Ratio PSRR ∆VDD/∆VSS = ±15 V ± 10% −0.15 ±0.08 +0.15 %/%

or 0 V, −40°C < TA < +125°C, unless otherwise noted.

SS

R-DNL RWB, VA = NC −1 ±0.3 +1 LSB
R-INL RWB, VA = NC −1.5 ±0.7 +1.5 LSB

3

AB

(RAB/RAB)/T*106V

W

TA = +25°C −30 +30 %

= VDD, wiper = no connect 35 ppm/°C

AB

50 100 Ω

INL −1 ±0.3 +1 LSB
DNL −1 ±0.3 +1 LSB

Code = 0xFF −6 −4 0 LSB
Code = 0x00 0 +3 +5 LSB

V
f = 1 MHz, measured to GND,

V

WFSE

WZSE

A, B, W

A, B

code = 0x80

C

W

f = 1 MHz, measured to GND,
code = 0x80

CM

V

IH

V

IL

OH

OL

IL

C

IL

DD

SS

P

DISS

VA = VB = V

W

2.4 V

0.8 V
R

= 2.2 kΩ to 5 V 4.9 V

Pull-up

IOL = 1.6 mA 0.4 V
VIN = 0 V or 5 V ±1 µA
5 pF

VIH = +5 V or VIL = 0 V,
V

= ±15 V

DD/VSS

VIH = +5 V or VIL = 0 V,

= ±15 V

V

DD/VSS

VIH = +5 V or VIL = 0 V,
V

= ±15 V

DD/VSS

VDDV

SS

45 pF

60 pF

1 nA

15 50 A

−0.01 −1 A

765 W

Rev. 0 | Page 3 of 20

AD5290

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Parameter Symbol Conditions Min Typ1Max Unit

DYNAMIC CHARACTERISTICS

Bandwidth −3 dB BW Code = 0x80 470 kHz

Total Harmonic Distortion THD

VW Settling Time t

Resistor Noise Voltage e

1

Typical represents average reading at +25°C, VDD = +15 V, and VSS = −15 V.

2

Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from an ideal value measured between successive tap positions. Parts are guaranteed monotonic.

3

All parts have a 35 ppm/°C temperature coefficient.

4

INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits

of ±1 LSB maximum are guaranteed monotonic operating conditions.

5

Resistor Terminal A, Terminal B, and Terminal W have no limitations on polarity with respect to each other.

6

Guaranteed by design and not subject to production test.

7

P

is calculated from (IDD × VDD) + abs (ISS × VSS). CMOS logic-level inputs result in minimum power dissipation.

DISS

8

Bandwidth, noise, and settling times are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest

bandwidth. The highest R value results in the minimum overall power consumption.

9

All dynamic characteristics use VDD = +15 V and VSS = −15 V.

6, , 8 9

W

S

VA = 1 V rms, VB = 0 V, f = 1 kHz 0.006 %
VA = 10 V, VB = 0 V, ±1 LSB error

B

4 µs

band

N_WB

RWB = 5 kΩ, f = 1 kHz 9 nV/√Hz

Rev. 0 | Page 4 of 20

AD5290

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ELECTRICAL CHARACTERISTICS—50 KΩ, 100 KΩ VERSIONS

VDD/VSS = ±15 V ± 10%, VA = +VDD, VB = VB

Table 2.

Parameter Symbol Conditions Min Typ1Max Unit

DC CHARACTERISTICS RHEOSTAT MODE

Resistor Differential NL
Resistor Nonlinearity

2

2

Nominal Resistor Tolerance R
Resistance Temperature Coefficient
Wiper Resistance R

DC CHARACTERISTICS POTENTIOMETER

DIVIDER MODE
Integral Nonlinearity
Differential Nonlinearity

4

4

Voltage Divider Temperature

Coefficient
Full-Scale Error V
Zero-Scale Error V

RESISTOR TERMINALS

Voltage Range

5

Capacitance6 A, B C

Capacitance

6

Common-Mode Leakage I

DIGITAL INPUTS AND OUTPUTS

Input Logic High (CS, CLK, SDI)
Input Logic Low (CS, CLK, SDI)
Output Logic High (SDO) V

Output Logic Low (SDO) V
Input Current I
Input Capacitance

6

POWER SUPPLIES

Positive Supply Current I

Negative Supply Current I

Power Dissipation

7

Power Supply Rejection Ratio PSRR ∆VDD/∆VSS = ±15 V ± 10% −0.05 ±0.01 +0.05 %/%

or 0 V, −40°C < TA < +125°C, unless otherwise noted.

SS

R-DNL RWB, VA = NC −0.5 ±0.1 +0.5 LSB
R-INL RWB, VA = NC −1 ±0.5 +1 LSB

3

AB

(RAB/RAB)/T*106VAB = VDD, wiper = no connect 35 ppm/°C

W

TA = +25°C −30 +30 %

50 100 Ω

INL −1 ±0.5 +1 LSB
DNL −1 ±0.5 +1 LSB
(V

V

)/T*106Code = 0x80 5 ppm/°C

W/VW

WFSE

WZSE

A, B, W

A, B

Code = 0xFF −2.5 −1.6 0 LSB
Code = 0x00 0 +0.6 +1.5 LSB

V
f = 1 MHz, measured to GND,

SS

45 pF

VDDV

code = 0x80

C

W

f = 1 MHz, measured to GND,

60 pF

code = 0x80

CM

V

IH

V

IL

OH

OL

IL

C

IL

DD

SS

P

DISS

VA = VB = V

W

2.4 V

0.8 V
R

= 2.2 kΩ to 5 V 4.9 V

Pull-up

IOL = 1.6 mA 0.4 V
VIN = 0 V or 5 V ±1 µA
5 pF

VIH = +5 V or VIL = 0 V,

= ±15 V

V

DD/VSS

VIH = +5 V or VIL = 0 V,
V

= ±15 V

DD/VSS

VIH = +5 V or VIL = 0 V,

= ±15 V

V

DD/VSS

1 nA

15 50 A

−0.01 −1 A

765 W

Rev. 0 | Page 5 of 20

AD5290

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Parameter Symbol Conditions Min Typ1Max Unit

DYNAMIC CHARACTERISTICS

Bandwidth −3 dB BW RAB = 50 kΩ, code = 0x80 90 kHz
R
Total Harmonic Distortion THD
VW Settling Time t

Resistor Noise Voltage e

1

Typical represents average reading at +25°C, VDD = +15 V, and VSS = −15 V.

2

Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from an ideal value measured between successive tap positions. Parts are guaranteed monotonic.

3

All parts have a 35 ppm/°C temperature coefficient.

4

INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification

limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5

Resistor Terminal A, Terminal B, and Terminal W have no limitations on polarity with respect to each other.

6

Guaranteed by design and not subject to production test.

7

P

is calculated from (IDD × VDD) + abs (ISS × VSS). CMOS logic level inputs result in minimum power dissipation.

DISS

8

Bandwidth, noise, and settling times are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest

bandwidth. The highest R value results in the minimum overall power consumption.

9

All dynamic characteristics use VDD = +15 V and VSS = −15 V.

6, , 8 9

= 100 kΩ, code = 0x80 50 kHz

AB

W

S

VA = 1 V rms, VB = 0 V, f = 1 kHz 0.002 %
VA = 10 V, VB = 0 V,

B

4 µs

±1 LSB error band

N_WB

RWB = 25 kΩ, f = 1 kHz 20

nV√Hz

Rev. 0 | Page 6 of 20