ANALOG DEVICES AD524 Service Manual

Precision
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FEATURES

Low noise: 0.3 μV p-p at 0.1 Hz to 10 Hz Low nonlinearity: 0.003% (G = 1) High CMRR: 120 dB (G = 1000) Low offset voltage: 50 μV Low offset voltage drift: 0.5 μV/°C Gain bandwidth product: 25 MHz Pin programmable gains of 1, 10, 100, 1000 Input protection, power-on/power-off No external components required Internally compensated MIL-STD-883B and chips available 16-lead ceramic DIP and SOIC packages and 20-terminal
leadless chip carrier available
Available in tape and reel in accordance with EIA-481A
standard
Standard military drawing also available

GENERAL DESCRIPTION

The AD524 is a precision monolithic instrumentation amplifier designed for data acquisition applications requiring high accu­racy under worst-case operating conditions. An outstanding combination of high linearity, high common-mode rejection, low offset voltage drift, and low noise makes the AD524 suitable for use in many data acquisition systems.
The AD524 has an output offset voltage drift of less than 25 μV/°C, input offset voltage drift of less than 0.5 μV/°C, CMR above 90 dB at unity gain (120 dB at G = 1000), and maximum nonlinearity of 0.003% at G = 1. In addition to the outstanding dc specifications, the AD524 also has a 25 kHz bandwidth (G = 1000). To make it suitable for high speed data acquisition systems, the AD524 has an output slew rate of 5 V/μs and settles in 15 μs to 0.01% for gains of 1 to 100.
As a complete amplifier, the AD524 does not require any exter­nal components for fixed gains of 1, 10, 100 and 1000. For other gain settings between 1 and 1000, only a single resistor is required. The AD524 input is fully protected for both power-on and power-off fault conditions.
The AD524 IC instrumentation amplifier is available in four different versions of accuracy and operating temperature range. The economical A grade, the low drift B grade, and lower drift,
Instrumentation Amplifier
AD524

FUNCTIONAL BLOCK DIAGRAM

PROTECTION
1
– INPUT
G = 10
G = 100
G = 1000
RG
RG
+ INPUT
1
2
12
11
16
3
2
PROTECTION
404
40
V
b
20k
20k
Figure 1.
4.44k
13
higher linearity C grade are specified from −25°C to +85°C. The S grade guarantees performance to specification over the extended temperature range −55°C to +125°C. The AD524 is available in a 16-lead ceramic DIP, 16-lead SBDIP, 16-lead SOIC wide packages, and 20-terminal leadless chip carrier.

PRODUCT HIGHLIGHTS

1. The AD524 has guaranteed low offset voltage, offset
voltage drift, and low noise for precision high gain applications.
2. The AD524 is functionally complete with pin program-
mable gains of 1, 10, 100, and 1000, and single resistor programmable for any gain.
3. Input and output offset nulling terminals are provided for
very high precision applications and to minimize offset voltage changes in gain ranging applications.
4. The AD524 is input protected for both power-on and
power-off fault conditions.
5. The AD524 offers superior dynamic performance with a
gain bandwidth product of 25 MHz, full power response of 75 kHz and a settling time of 15 μs to 0.01% of a 20 V step (G = 100).
20k
20k
AD524
20k
20k
SENSE
OUTPUT
REFERENCE
00500-001
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
AD524
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TABLE OF CONTENTS

Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 8
Connection Diagrams .................................................................. 8
ESD Caution .................................................................................. 8
Typical Performance Characteristics ............................................. 9
Test Circuits ................................................................................. 14
Theory of Operation ...................................................................... 15
Input Protection .......................................................................... 15

REVISION HISTORY

11/07—Rev. E to Rev. F
Updated Format .................................................................. Universal
Changes to General Description .................................................... 1
Changes to Figure 1 .......................................................................... 1
Changes to Figure 3 and Figure 4 Captions .................................. 8
Changes to Error Budget Analysis Section ................................. 21
Changes to Ordering Guide .......................................................... 25
4/99—Rev. D to Rev. E
Input Offset and Output Offset ................................................ 15
Gain .............................................................................................. 16
Input Bias Currents .................................................................... 17
Common-Mode Rejection ........................................................ 17
Grounding ................................................................................... 18
Sense Terminal ............................................................................ 18
Reference Terminal .................................................................... 18
Programmable Gain ................................................................... 20
Autozero Circuits ....................................................................... 20
Error Budget Analysis ................................................................ 21
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 25
Rev. F | Page 2 of 28
AD524
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SPECIFICATIONS

@ VS = ±15 V, RL = 2 kΩ and TA = +25°C, unless otherwise noted. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at the final electrical
test. Results from those tests are used to calculate outgoing quality levels.
Table 1.
AD524A AD524B Parameter Min Typ Max Min Typ Max Unit
GAIN
Gain Equation (External Resistor Gain Programming)
Gain Range (Pin Programmable) 1 to 1000 1 to 1000 Gain Error
Nonlinearity
Gain vs. Temperature
VOLTAGE OFFSET (May be Nulled)
Input Offset Voltage
Output Offset Voltage 5
Offset Referred to the Input vs. Supply
INPUT CURRENT
Input Bias Current
Input Offset Current
1
G = 1 G = 10 G = 100 G = 1000
G = 1 ±0.01 ±0.005 % G = 10, G = 100 ±0.01 ±0.005 % G = 1000 ±0.01 ±0.01 %
G = 1 5 5 ppm/°C G = 10 15 10 ppm/°C G = 100 35 25 ppm/°C G = 1000 100 50 ppm/°C
vs. Temperature 2
vs. Temperature 100
G = 1 G = 10 G = 100 G = 1000
vs. Temperature ±100 ±100 pA/°C
vs. Temperature ±100 ±100 pA/°C
70 85 95 100
⎡ ⎢
R
000,40
+
G
±
⎥ ⎦
%201
±0.05 ±0.25 ±0.5 ±2.0
250
±50
±35
⎡ ⎢ ⎣
75 95 105 110
000,40
+
R
G
dB dB dB dB
±
±0.03 ±0.15 ±0.35 ±1.0
100
0.75 3 50
±25
±15
%201
% % % %
μV μV/°C mV μV
nA
nA
Rev. F | Page 3 of 28
AD524
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AD524A AD524B Parameter Min Typ Max Min Typ Max Unit
INPUT
Input Impedance
Differential Resistance 109 109 Ω Differential Capacitance 10 10 pF Common-Mode Resistance 109 109 Ω Common-Mode Capacitance 10 10 pF
Input Voltage Range
Maximum Differential Input Linear (VDL) Maximum Common-Mode Linear (VCM)
Common-Mode Rejection DC to 60 Hz with 1 kΩ Source Imbalance V
G = 1 G = 10 G = 100 G = 1000
OUTPUT RATING
V
, RL = 2 kΩ ±10 ±10 V
OUT
DYNAMIC RESPONSE
Small Signal – 3 dB
G = 1 1 1 MHz G = 10 400 400 kHz G = 100 150 150 kHz
G = 1000 25 25 kHz Slew Rate 5.0 5.0 V/μs Settling Time to 0.01%, 20 V Step
G = 1 to 100 15 15 μs
G = 1000 75 75 μs
NOISE
Voltage Noise, 1 kHz
RTI 7 7 nV/√Hz
RTO 90 90 nV√Hz RTI, 0.1 Hz to 10 Hz
G = 1 15 15 μV p-p
G = 10 2 2 μV p-p
G = 100, 1000 0.3 0.3 μV p-p Current Noise
0.1 Hz to 10 Hz 60 60 pA p-p
SENSE INPUT
RIN 20 20 kΩ ± 20% IIN 15 15 μA Voltage Range ±10 ±10 V Gain to Output 1 1 %
REFERENCE INPUT
RIN 40 40 kΩ ± 20% IIN 15 15 μA Voltage Range ±10 ±10 V Gain to Output 1 1 %
2
±10 ±10 V
2
70 90 100 110
G
V12
⎜ ⎝
×
V
D
2
G
75 95 105 115
V12
⎜ ⎝
dB dB dB dB
×
V
D
2
V
Rev. F | Page 4 of 28
AD524
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AD524A AD524B
Parameter Min Typ Max Min Typ Max Unit
TEMPERATURE RANGE
Specified Performance –25 +85 –25 +85 °C Storage –65 +150 –65 +150 °C
POWER SUPPLY
Power Supply Range Quiescent Current 3.5
1
Does not include effects of external resistor, RG.
2
VOL is the maximum differential input voltage at G = 1 for specified nonlinearity.
VDL at the maximum = 10 V/G. VD = actual differential input voltage. Example: G = 10, V V
= 12 V − (10/2 × 0.50 V) = 9.5 V.
CM
= 0.50.
D
±6
@ V
= ±15 V, RL = 2 kΩ and TA = +25°C, unless otherwise noted.
S
All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at the final electrical
test. Results from those tests are used to calculate outgoing quality levels.
Table 2.
AD524C AD524S
Parameter Min Typ Max Min Typ Max Unit
GAIN
Gain Equation (External Resistor Gain Programming)
Gain Range (Pin Programmable) 1 to 1000 1 to 1000 Gain Error
Nonlinearity
Gain vs. Temperature
VOLTAGE OFFSET (May be Nulled)
Input Offset Voltage
Output Offset Voltage
Offset Referred to the Input vs. Supply
1
G = 1 G = 10 G = 100 G = 1000
G = 1 ±0.003 ±0.01 % G = 10, G = 100 ±0.003 ±0.01 % G = 1000 ±0.01 ±0.01 %
G = 1 5 5 ppm/°C G = 10 10 10 ppm/°C G = 100 25 25 ppm/°C G = 1000 50 50 ppm/°C
vs. Temperature
vs. Temperature
G = 1 G = 10 G = 100 G = 1000
80 100 110 115
±15
000,40
⎢ ⎣
+
R
G
±18 ±6
5.0
±
3.5
%201
±0.02 ±0.1 ±0.25 ±0.5
50
0.5
2.0 25
75 95 105 110
±15
000,40
R
G
dB dB dB dB
±18
5.0
+
%201
±
±0.05 ±0.25 ±0.5 ±2.0
100
2.0
3.0 50
V mA
% % % %
μV μV/°C mV μV
Rev. F | Page 5 of 28
AD524
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AD524C AD524S Parameter Min Typ Max Min Typ Max Unit
INPUT CURRENT
Input Bias Current
vs. Temperature ±100 ±100 pA/°C Input Offset Current
vs. Temperature ±100 ±100 pA/°C
INPUT
Input Impedance
Differential Resistance 109 109 Ω
Differential Capacitance 10 10 pF
Common-Mode Resistance 109 109 Ω
Common-Mode Capacitance 10 10 pF Input Voltage Range
Maximum Differential Input Linear (VDL)
Maximum Common-Mode Linear (VCM)
2
±10 ±10 V
2
V12
Common-Mode Rejection DC to 60 Hz with 1 kΩ Source Imbalance V
G = 1
G = 10
G = 100
G = 1000
OUTPUT RATING
V
, RL = 2 kΩ ±10 ±10 V
OUT
DYNAMIC RESPONSE
Small Signal – 3 dB
G = 1 1 1 MHz
G = 10 400 400 kHz
G = 100 150 150 kHz
G = 1000 25 25 kHz Slew Rate 5.0 5.0 V/μs Settling Time to 0.01%, 20 V Step
G = 1 to 100 15 15 μs
G = 1000 75 75 μs
NOISE
Voltage Noise, 1 kHz
RTI 7 7 nV/√Hz
RTO 90 90 nV√Hz RTI, 0.1 Hz to 10 Hz
G = 1 15 15 μV p-p
G = 10 2 2 μV p-p
G = 100, 1000 0.3 0.3 μV p-p Current Noise
0.1 Hz to 10 Hz 60 60 pA p-p
SENSE INPUT
RIN 20 20 kΩ ± 20% IIN 15 15 μA Voltage Range ±10 ±10 V Gain to Output 1 1 %
80 100 110 120
±15
±10
G
⎛ ⎜
V
×
D
2
70 90 100 110
±50
±35
G
V12
⎜ ⎝
dB dB dB dB
V
×
D
2
nA
nA
V
Rev. F | Page 6 of 28
AD524
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AD524C AD524S
Parameter Min Typ Max Min Typ Max Unit
REFERENCE INPUT
RIN 40 40 kΩ ± 20% IIN 15 15 μA Voltage Range 10 10 V Gain to Output 1 1 %
TEMPERATURE RANGE
Specified Performance –25 +85 –55 +85 °C Storage –65 +150 –65 +150 °C
POWER SUPPLY
Power Supply Range Quiescent Current 3.5
1
Does not include effects of external resistor RG.
2
VOL is the maximum differential input voltage at G = 1 for specified nonlinearity.
V
at the maximum = 10 V/G.
DL
VD = actual differential input voltage. Example: G = 10, VD = 0.50. VCM = 12 V − (10/2 × 0.50 V) = 9.5 V.
±6
±15
±18 ±6
5.0
3.5
±15
±18
5.0
V mA
Rev. F | Page 7 of 28
AD524
O
O
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ABSOLUTE MAXIMUM RATINGS

Table 3.
Parameter Rating
Supply Voltage ±18 V Internal Power Dissipation 450 mW Input Voltage1
(Either Input Simultaneously) |VIN| + |VS| <36 V
Output Short-Circuit Duration Indefinite Storage Temperature Range
(R) –65°C to +125°C (D, E) –65°C to +150°C
Operating Temperature Range
AD524A/AD524B/AD524C –25°C to +85°C AD524S –55°C to +125°C
Lead Temperature (Soldering, 60 sec) +300°C
1
Maximum input voltage specification refers to maximum voltage to which
either input terminal may be raised with or without device power applied. For example, with ±18 volt supplies maximum, VIN is ±18 V; with zero supply voltage maximum, VIN is ±36 V.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
OUTPUT
UTPUT
NULL
RG116
–INPUT
+INPUT
RG
G = 10
NULL
15
1
2
2
3
13
14
4
INPUT
NULL
PAD NUMBERS CORRESPOND TO PIN NUMBERS FOR THE D-16 AND RW-16 16-L EAD CERAMIC PACKAGES.
G = 100
12
5 INPUT NULL
G = 1000 11
0.170 (4.33)
SENSE
10
REFERENCE
Figure 2. Metallization Photograph
Contact factory for latest dimensions;
Dimensions shown in inches and (mm)
9 OUTPUT
8 +V
S
0.103 (2.61)
7 –V
S
6
00500-002
NC = NO CONNECT

ESD CAUTION

CONNECTION DIAGRAMS

1
– INPUT
2
+ INPUT
RG
3
2
AD524
INPUT NULL
INPUT NULL
REFERENCE
OFFSET NULL
INPUT NULL
INPUT NULL
REFERENCE
OFFSET NULL
4
TOP VIEW
5
(Not to Scale)
6
–V
7
S
+V
8
S
+V
INPUT
415
S
514
Figure 3. Ceramic (D) and
SOIC (RW-16 and D-16) Packages
1
RG
–INPUT3+INPUT
20
1NC2
4
RG
2
5
AD524
6
NC
7
8
+V
INPUT
S
TOP VIEW
(Not to Scal e)
11NC10
9
S
S
–V
+V
719
518
12
OUTPUT
Figure 4. Leadless Chip Carrier (E)
16
RG
1
15
OUTPUT NULL
14
OUTPUT NULL
13
G = 10
12
G = 100
11
G = 1000
10
SENSE
9
OUTPUT
–V
S
OUTPUT OFFSET NULL
OUTPUT
NULL
19
18
OUTPUT NULL
17
G = 10
16
NC
15
G = 100
14
G = 1000
13
SENSE
–V
S
OUTPUT OFFSET NULL
SHORT TO RG
FOR
2
DESIRED GAIN
SHORT T RG2 FOR DESIRED GAIN
0500-003
00500-004
Rev. F | Page 8 of 28
AD524
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TYPICAL PERFORMANCE CHARACTERISTICS

20
15
10
+25°C
INPUT VOLTAGE (±V)
5
0
0 5 10 15 20
SUPPLY VOLTAGE (±V)
Figure 5. Input Voltage Range vs. Supply Voltage, G = 1
20
15
10
8
6
4
2
QUIESCE NT CURRENT (mA)
00500-005
0
0 5 10 15 20
SUPPLY VOLTAGE (±V)
00500-008
Figure 8. Quiescent Current vs. Supply Voltage
16
14
12
10
8
5
OUTPUT VOLTAGE SWING (±V)
0
0 5 10 15 20
SUPPLY VOLTAGE (±V)
Figure 6. Output Voltage Swing vs. Supply Voltage
30
20
10
OUTPUT VOLTAGE SWING (V p-p)
0
10 100 1k 10k
LOAD RESI STANCE (Ω)
Figure 7. Output Voltage Swing vs. Load Resistance
6
4
INPUT BI AS CURRENT (±n A)
2
00500-006
0
0 5 10 15 20
SUPPLY VOLTAG E (±V)
00500-009
Figure 9. Input Bias Current vs. Supply Voltage
40
30
20
10
0
–10
–20
INPUT BIAS CURRENT (n A)
–30
00500-007
–40
–75 –25 25 75 125
TEMPERATURE (°C)
00500-010
Figure 10. Input Bias Current vs. Temperature
Rev. F | Page 9 of 28
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