ANALOG DEVICES AD5162 Service Manual

Dual 256-Position SPI
A
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FEATURES

2-channel, 256-position End-to-end resistance: 2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Compact MSOP-10 (3 mm × 4.9 mm) package Fast settling time: t Full read/write of wiper register Power-on preset to midscale Extra package address decode pin AD0 Computer software replaces µC in factory programming
applications Single supply: 2.7 V to 5.5 V Low temperature coefficient: 35 ppm/°C Low power: I Wide operating temperature: −40°C to +125°C Evaluation board available

APPLICATIONS

Systems calibrations Electronics level settings Mechanical Trimmers® replacement in new designs Permanent factory PCB setting Transducer adjustment of pressure, temperature, position,
chemical, and optical sensors RF amplifier biasing Automotive electronics adjustment Gain control and offset adjustment

GENERAL DESCRIPTION

The AD5162 provides a compact 3 mm × 4.9 mm packaged solution for dual 256-position adjustment applications. This device performs the same electronic adjustment function as a 3-terminal mechanical potentiometer. Available in four different end-to-end resistance values (2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ), this low temperature coefficient device is ideal for high accu­racy and stability variable resistance adjustments. The wiper settings are controllable through an SPI digital interface. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the RDAC
1
The terms digital potentiometer, VR, and RDAC are used interchangeably.
= 5 µs typical on power-up
S
= 6 µA max
DD
1
latch.
Digital Potentiometer
AD5162

FUNCTIONAL BLOCK DIAGRAM

1
V
DD
GND
CLK
SDI
CS
REGISTER 1
A = 0 A = 1
Operating from a 2.7 V to 5.5 V power supply and consuming less than 6 µA allows the AD5162 to be used in portable battery-operated applications.
For applications that program the AD5162 at the factory, Analog Devices offers device programming software running on Windows® NT/2000/XP operating systems. This software effectively replaces any external SPI controllers, which in turn enhances users’ systems time-to-market. An AD5162 evaluation kit and software are available. The kit includes a cable and instruction manual.
W1
WIPER
SPI INTERFACE
B1 W2
WIPER
REGISTER 2
Figure 1.
B2
AD5162
04108-0-001
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2003 Analog Devices, Inc. All rights reserved.
AD5162
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TABLE OF CONTENTS
Electrical Characteristics—2.5 kΩ Version................................... 3
Programming the Potentiometer Divider............................... 14
Electrical Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions ....... 4
Timing Characteristics—All Versions ........................................... 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Pin Configuration......................................................................... 7
Pin Function Descriptions .......................................................... 7
Typical Performance Characteristics ............................................. 8
Tes t Ci rc u it s ..................................................................................... 12
Theory of Operation ...................................................................... 13
Pro g ram m ing t he Vari a bl e Re s ist o r a n d Vol ta g e .................... 13
REVISION HISTORY
11/03 Changed from REV. 0 to REV. A:
Changes to Electrical Characteristics.................................... Page 3
ESD Protection ........................................................................... 14
Terminal Voltage Operating Range.......................................... 14
Power-Up Sequence ................................................................... 14
Layout and Power Supply Bypassing ....................................... 15
Constant Bias to Retain Resistance Setting............................. 15
Evaluation Board ........................................................................ 15
SPI Interface .................................................................................... 16
SPI Compatible 3-Wire Serial Bus ........................................... 16
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 17
11/03 Revision 0: Initial Version
Rev. A | Page 2 of 20
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ELECTRICAL CHARACTERISTICS—2.5 kΩ VERSION

Table 1. VDD = 5 V ± 10%, or 3 V ± 10%; VA = +VDD; VB = 0 V; 40°C < TA < +125°C; unless otherwise noted
Parameter Symbol Conditions Min Typ
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity Resistor Integral Nonlinearity Nominal Resistor Tolerance
2
2
3
R-DNL RWB, VA = no connect −2 ±0.1 +2 LSB R-INL RWB, VA = no connect −6 ±0.75 +6 LSB R
AB
TA = 25°C −20 +55 % Resistance Temperature Coefficient (∆RAB/RAB )/∆T VAB = VDD, wiper = no connect 35 ppm/°C R
(Wiper Resistance) R
WB
WB
Code = 0x00, VDD = 5 V 160 200
DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Differential Nonlinearity
4
DNL −1.5 ±0.1 +1.5 LSB Integral Nonlinearity INL −2 ±0.6 +2 LSB Voltage Divider Temperature
(∆V
)/∆T Code = 0x80 15 ppm/°C
W/VW
Coefficient Full-Scale Error V Zero-Scale Error V
WFSE
WZSE
Code = 0xFF −10 −2.5 0 LSB Code = 0x00 0 2 10 LSB
RESISTOR TERMINALS
Voltage Range Capacitance6 A, B C
5
V
A, B, W
A, B
GND V f = 1 MHz, measured to GND, Code =
45 pF
0x80
Capacitance6 W C
W
f = 1 MHz, measured to GND, Code =
60 pF
0x80
Common-Mode Leakage I
CM
VA = VB = VDD/2 1 nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High V Input Logic Low V Input Logic High V Input Logic Low V Input Current I Input Capacitance
6
IH
IL
IH
IL
IL
C
IL
VDD = 5 V 2.4 V VDD = 5 V 0.8 V VDD = 3 V 2.1 V VDD = 3 V 0.6 V VIN = 0 V or 5 V ±1 µA 5 pF
POWER SUPPLIES
Power Supply Range V Supply Current I Power Dissipation
7
DD RANGE
DD
P
DISS
2.7 5.5 V VIH = 5 V or VIL = 0 V 3.5 6 µA VIH = 5 V or VIL = 0 V, VDD = 5 V 30 µW
Power Supply Sensitivity PSS VDD = 5 V ± 10%, Code = midscale ±0.02 ±0.08 %/%
DYNAMIC CHARACTERISTICS
8
Bandwidth −3 dB BW_2.5 K Code = 0x80 4.8 MHz Total Harmonic Distortion THD VW Settling Time t Resistor Noise Voltage Density e
See notes at end of section.
W
S
N_WB
VA = 1 V rms, VB = 0 V, f = 1 kHz 0.1 % VA = 5 V, VB = 0 V, ±1 LSB error band 1 µs RWB = 1.25 kΩ, RS = 0 3.2
1
Max Unit
DD
V
nV/Hz
Rev. A | Page 3 of 20
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ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS

Table 2. VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < 125°C; unless otherwise noted
Parameter Symbol Conditions Min Typ
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity Resistor Integral Nonlinearity Nominal Resistor Tolerance
2
2
3
R-DNL RWB, VA = no connect −1 ±0.1 +1 LSB R-INL RWB, VA = no connect −2.5 ±0.25 +2.5 LSB R
AB
TA = 25°C −20 +20 % Resistance Temperature Coefficient (∆RAB/RAB )/∆T VAB = VDD, wiper = no connect 35 ppm/°C RWB (Wiper Resistance) R
WB
Code = 0x00, VDD = 5 V 160 200
DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Differential Nonlinearity Integral Nonlinearity
4
4
DNL −1 ±0.1 +1 LSB
INL −1 ±0.3 +1 LSB Voltage Divider Temperature Coefficient (∆VW/VW)/∆T Code = 0x80 15 ppm/°C Full-Scale Error V Zero-Scale Error V
WFSE
WZSE
Code = 0xFF −2.5 −1 0 LSB Code = 0x00 0 1 2.5 LSB
RESISTOR TERMINALS
Voltage Range Capacitance6 A, B C
5
V
A,B,W
A,B
GND V f = 1 MHz, measured to GND,
45 pF
Code = 0x80
Capacitance6 W C
W
f = 1 MHz, measured to GND,
60 pF
Code = 0x80
Common-Mode Leakage I
CM
VA = VB = VDD/2 1 nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High V Input Logic Low V Input Logic High V Input Logic Low V Input Current I Input Capacitance C
IH
IL
IH
IL
IL
IL
VDD = 5 V 2.4 V VDD = 5 V 0.8 V VDD = 3 V 2.1 V VDD = 3 V 0.6 V VIN = 0 V or 5 V ±1 µA 5 pF
POWER SUPPLIES
Power Supply Range V Supply Current I Power Dissipation P
DD RANGE
DD
DISS
Power Supply Sensitivity PSS
2.7 5.5 V VIH = 5 V or VIL = 0 V 3.5 6 µA VIH = 5 V or VIL = 0 V, VDD = 5 V 30 µW
= 5 V ± 10%, Code =
V
DD
±0.02 ±0.08 %/%
midscale
DYNAMIC CHARACTERISTICS
Bandwidth −3 dB BW
= 10 kΩ/50 kΩ/100 kΩ,
R
AB
600/100/40 kHz
Code = 0x80
Total Harmonic Distortion THD
VW Settling Time (10 kΩ/50 kΩ/100 kΩ) t
S
W
VA = 1 V rms, VB = 0 V, f = 1 kHz, R
= 10 kΩ
AB
VA = 5 V, VB = 0 V,
0.1 %
2 µs
±1 LSB error band
Resistor Noise Voltage Density e
See notes at end of section.
N_WB
RWB = 5 kΩ, RS = 0 9
1
Max Unit
V
DD
nV/Hz
Rev. A | Page 4 of 20
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TIMING CHARACTERISTICS—ALL VERSIONS

Table 3. VDD = +5 V ± 10%, or +3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted
Parameter Symbol Conditions Min Typ
SPI INTERFACE TIMING CHARACTERISTICS9 (Specifications Apply to All Parts)
Clock Frequency f Input Clock Pulse Width tCH, t Data Setup Time t Data Hold Time t CS Setup Time
CS High Pulse Width CLK Fall to CS Fall Hold Time CLK Fall to CS Rise Hold Time CS Rise to Clock Rise Setup
See notes at end of section.
CLK
Clock level high or low 20 ns 5 ns 5 ns 15 ns
40 ns 0 ns 0 ns 10 ns
DS
DH
t
CSS
t
CSW
t
CSH0
t
CSH1
t
CS1
CL
NOTES
1
Typical specifications represent average readings at 25°C and VDD = 5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3
VAB = VDD, wiper (VW) = no connect.
4
INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
Resistor terminals A, B, W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
P
is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
DISS
8
All dynamic characteristics use VDD = 5 V.
9
See timing diagrams for locations of measured values.
1
Max Unit
25 MHz
Rev. A | Page 5 of 20
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ABSOLUTE MAXIMUM RATINGS

Table 4. TA = 25°C, unless otherwise noted
Parameter Value
VDD to GND –0.3 V to +7 V VA, VB, VW to GND V Terminal Current, Ax to Bx, Ax to Wx,
Bx to Wx
Digital Inputs and Output Voltage to GND 0 V to 7 V Operating Temperature Range –40°C to +125°C Maximum Junction Temperature (T Storage Temperature –65°C to +150°C Lead Temperature (Soldering, 10 s) 300°C Thermal Resistance2 θJA: MSOP-10
1
Maximum terminal current is bounded by the maximum current handling of
2
Package power dissipation = (T
1
Pulsed ±20 mA Continuous ±5 mA
JMAX
the switches, maximum power dissipation of the package, and maximum applied voltage across any two of the A, B, and W terminals at a given resistance.
− TA)/θJA.
JMAX
DD
) 150°C
230°C/W
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. A | Page 6 of 20
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