±8% Resistor Tolerance, Nonvolatile Digital Potentiometer
Data Sheet
FEATURES
Nominal resistor tolerance error: ±8% maximum
Wiper current: ±6 mA
Rheostat mode temperature coefficient: 35 ppm/°C
Low power consumption: 2.5mA max @ 2.7 V and 125°C
Wide bandwidth: 4 MHz (5 kΩ option)
Power-on EEPROM refresh time < 50 μs
50-year typical data retention at 125°C
1 million write cycles
2.3 V to 5.5 V supply operation
Built-in adaptive debouncer
Wide operating temperature: −40°C to +125°C
Thin, 2 mm × 2 mm × 0.55 mm 8-lead LFCSP package
APPLICATIONS
Mechanical potentiometer replacement
Portable electronics level adjustment
Audio volume control
Low resolution DAC
LCD panel brightness and contrast control
Programmable voltage to current conversion
Programmable filters, delays, time constants
Feedback resistor programmable power supply
Sensor calibration
The AD5116 provides a nonvolatile digital potentiometer
solution for 64-position adjustment applications, offering
guaranteed low resistor tolerance errors of ±8% and up to
±6 mA current density in the A, B, and W pins. The low resistor
tolerance, low nominal temperature coefficient, and high
bandwidth simplify open-loop applications, as well as tolerance
matching applications.
The new low A-W and B-W resistance feature minimizes
the wiper resistance in the extremes of the resistor array to
typically 45 Ω.
A simple push button interface allows manual control with
just two external push button switches. The AD5116 is designed
with a built-in adaptive debouncer that ignores invalid bounces
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
due to contact bounce (commonly found in mechanical
switches). The debouncer is adaptive, accommodating a
variety of push buttons.
The AD5116 can automatically save the last wiper position into
EEPROM, making it suitable for applications that require a
power-up in the last wiper position, for example, audio
equipment.
The AD5116 is available in a 2 mm × 2 mm 8-lead LFCSP
package. The part is guaranteed to operate over the extended
industrial temperature range of −40°C to +125°C.
R
Zero-Scale Error V
R
R
Voltage Divider Temperature Coefficient
RESISTOR TERMINALS
Maximum Continuous IA, IB, and IW Current3
R-DNL −1 ±0.25 +1 LSB
INL −0.5 ±0.15 +0.5 LSB
DNL −0.5 ±0.15 +0.5 LSB
R
WFSE
R
WZSE
3
(ΔVW/VW)/ΔT × 106 Code = half scale ±10 ppm/°C
R
= 5 kΩ −2.5 LSB
AB
AB
= 80 kΩ −1 LSB
AB
= 5 kΩ +1.5 LSB
AB
=10 kΩ +1 LSB
AB
= 80 kΩ +0.25 LSB
AB
= 5 kΩ, 10 kΩ −6 +6 mA
AB
Terminal Voltage Range5 GND VDD V
Capacitance A, Capacitance B
Capacitance W
3, 6
3, 6
Common-Mode Leakage Current3
, CB f = 1 MHz, measured to GND,
C
A
code = half scale, V
= VB = 2.5 V
or V
W
f = 1 MHz, measured to GND,
C
W
code = half scale, V
V
= VW = VB 50 nA
A
= VA = 2.5 V
W
= VB = 2.5 V
A
20 pF
35 pF
DIGITAL INPUTS (PU AND PD)
Input Logic3
High V
Low V
Input Current3
Input Capacitance3
DIGITAL OUTPUT (ASE)
Output High Voltage3
Output Current3
Three-State Leakage Current3
Input Capacitance3
2 V
INH
0.8 V
INL
±1 µA
I
N
5 pF
C
IN
SINK
VDD = 5 V 16 mA
I
O
±1 µA
I
OZ
5 pF
C
IN
Rev. | Page 3 of 16
AD5116 Data Sheet
Parameter Symbol Test Conditions/Comments Min Typ1 Max Unit
POWER SUPPLIES
Single-Supply Power Range 2.3 5.5 V
Positive Supply Current IDD V
V
V
EEMEM Store Current
EEMEM Read Current
3, 7
3, 8
Power Dissipation9 P
Power Supply Rejection3
I
DD_NVM_STORE
I
DD_NVM_READ
DISS
PSR ∆V
2 mA
320 μA
V
R
R
R
DYNAMIC CHARACTERISTICS
3, 10
Bandwidth BW Code = half scale − 3 dB
R
R
R
Total Harmonic Distortion THD VA = VDD/2 + 1 V rms, VB = VDD/2,
R
R
R
VW Settling Time ts V
R
R
R
Resistor Noise Density e
Code = half scale, TA = 25°C,
N_WB
R
R
R
FLASH/EE MEMORY RELIABILITY3
Endurance11 T
100 kCycles
Data Retention12 50 Years
1
Typical values represent average readings at 25°C, VDD = 5 V, VSS = 0 V, and V
2
Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. The maximum wiper current is limited to 0.8 × VDD/RAB.
3
Guaranteed by design and characterization, not subject to production test.
4
INL and DNL are measured at VWB with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
6
CA is measured with VW = VA = 2.5 V, CB is measured with VW = VB = 2.5 V, and CW is measured with VA = VB = 2.5 V.
7
Different from operating current; supply current for NVM program lasts approximately 30 ms.
8
Different from operating current; supply current for NVM read lasts approximately 20 μs.
9
P
is calculated from (IDD × VDD).
DISS
10
All dynamic characteristics use VDD = 5.5 V, and V
11
Endurance is qualified at 100,000 cycles per JEDEC Standard 22, Method A117 and measured at 150°C.
12
Retention lifetime equivalent at junction temperature (TJ) = 125°C per JEDEC Standard 22, Method A117. Retention lifetime based on an activation energy of 1 eV
LOGIC
= 5 V.
derates with junction temperature in the Flash/EE memory.
= 5 V 0.75 3.5 mA
DD
= 2.7 V 2.5 mA
DD
= 2.3 V 2.4 mA
DD
= V
IH
AB
AB
AB
AB
AB
AB
or VIL = GND 5 μW
LOGIC
/∆VSS = 5 V ± 10%
DD
= 5 kΩ −43 dB
=10 kΩ −50 dB
= 80 kΩ −64 dB
= 5 kΩ 4 MHz
= 10 kΩ 2 MHz
= 80 kΩ 200 kHz
f = 1 kHz, code = half scale
= 5 kΩ −75 dB
AB
= 10 kΩ −80 dB
AB
= 80 kΩ −85 dB
AB
= 5 V, VB = 0 V, ±0.5 LSB error
A
band
= 5 kΩ 2.5 μs
AB
= 10 kΩ 3 μs
AB
= 80 kΩ 10 μs
AB
f = 100 kHz
= 5 kΩ 7 nV/√Hz
AB
= 10 kΩ 9 nV/√Hz
AB
= 80 kΩ 20 nV/√Hz
AB
= 25°C 1 MCycles
A
= 5 V.
LOGIC
Rev. A | Page 4 of 16
Data Sheet AD5116
A
INTERFACE TIMING SPECIFICATIONS
VDD = 2.3 V to 5.5 V; all specifications T
Table 3.
Parameter Test Conditions/Comments Min Typ Max Unit Description
t1 8 ms Debounce time
t2 1 sec Manual to auto scan time
t3 140 ms Auto scan step
t4
t5
t
EEPROM_PROGRAM
t
POWER_UP
1
EEPROM program time depends on the temperature and EEPROM write cycles. Higher timing is expected at a lower temperature and higher write cycles.
2
Maximum time after VDD is equal to 2.3 V.
1
15 50 ms Memory program time
2
50 μs Power-on EEPROM restore time
= 0 V, PD = GND, PU = GND
ASE
= VDD
ASE
TIMING DIAGRAMS
t
1
PU
PD (LOW)
R
W
Figure 2. Manual Increment Mode Timing
MIN
to T
, unless otherwise noted.
MAX
09657-002
1 sec Auto save execute time
8 ms Low pulse time to manual storage
PD/PU (LOW)
t
EEPROM
PROGRAM
DATANEW DATA
ASE
EEPROM
t
5
Figure 5. Manual Save Mode Timing
09657-005
t
1
PU
PD (LOW)
R
W
t
2
Figure 3. Auto Increment Mode Timing
t
1
PD
R
W
ASE (LOW)
EEPROMDATANEW DATA
t
EEPROM
t
4
PROGRAM
Figure 4. Auto Save Mode Timing
t
1
t
3
09657-003
PD
R
ASE
RW= 45Ω
W
09657-006
Figure 6. End Scale Indication Timing
9657-004
Rev. | Page 5 of 16
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