and turn-off thresholds, and shutdown timings
Shutdown warning with fault detection
Reset control of external devices
5 V and 7.96 V monitoring inputs with reset control of
external devices
Factory programmed reset thresholds and hold time
eMOST-compatible inputs
Diagnostic application using V
Two supervisory functions
Watchdog reset controller with timeout and selectable
floating input
Manual reset control for external devices
Digital interface and programmability
2
I
C-compatible interface
OTP can be overwritten for dynamic adjustments
Power-up by edge triggered signal
Power-down over I
2
C bus
Operating range
Supply voltage: 6.0 V to 30 V
Temperature range: −40°C to +125°C
Shutdown current: 5 μA max
Operating current: 2 mA max
High voltage input antimigration shielding pinouts
APPLICATIONS
Automotive systems
Network equipment
Computers, controllers, and embedded systems
2MON
and V
4MON
AD5100
GENERAL DESCRIPTION
The AD5100 is a factory programmed system management
IC that combines four channels of voltage monitoring and
watchdog supervision. The AD5100 can be used to shut down
external supplies, reset processors, or disable any other system
electronics when the system malfunctions. The AD5100 can
also be used to protect systems from improper device power-up
sequencing. The AD5100 is a robust watchdog reset controller,
and can monitor two 30 V inputs with shutdown and reset
controls, one 2.3 V to 5.0 V input, and one 1.6 V to 7.96 V
input. Most monitoring input thresholds and timing settings
have a range of settings which are factory programmed by
Analog Devices, Inc. in the one-time programmable EPROM
(OTP) memory, or can be programmed on-the-fly over the
serial interface.
The AD5100 is versatile for system monitoring applications
where critical microprocessor, DSP, and embedded systems
operate under harsh conditions, such as automotive, industrial,
or communications network environments.
The AD5100 is available in a compact 16-lead QSOP package
and can operate in an extended automotive temperature range
from −40°C to +125°C.
Analog Devices provides non-OTP programmed AD5100
parts for use in evaluating the desired threshold and delay
settings. Only factory programmed AD5100 parts are shipped
in production quantities. Contact Analog Devices directly to
inquire about factory programmed models.
Table 1. AD5100 General Input and Output Information
Monitoring
Input
V
V
V
V
Range1
6 V to 28.29 V Yes Yes Yes
1MON
3 V to 24.75 V Yes Yes Yes
2MON
2.32 V to 4.97 V No Yes Yes
3MON
1.67 V to 7.96 V No Yes Yes
4MON
WDI 0 V t o 5 V Yes Yes No
MR
1
With programmable threshold and programmable delay.
0 V to 5 V No Yes No
Shutdown
Control
Reset
Control
Fault
Detection
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Voltage Range V
Input Resistance R
OV, UV Threshold Tolerance
6 30 V
1MON
36 55 70 kΩ
IN_V1MON
ΔOV, ΔUV TA = 25°C −1.6 +1.6 %
(See Figure 7 and Table 6)
T
T
Hysteresis
Programmable Shutdown Hold Time
Δt
TA = 25°C; does not apply to
1SD_HOLD
Tolerance (See Figure 7 and Table 8)
Programmable Shutdown Delay Tolerance
Δt
1SD_DELAY
(See Figure 7 and Table 8)
T
= −40°C to +85°C −1.8 +1.8 %
A
= −40°C to +125°C −2 +2 %
A
1.5 %
−10 +10 %
Code 0x7
TA = 25°C; does not apply to
−10 +10 %
Code 0x7
= −40°C to +125°C; does not
A
−17 +17 %
apply to Code 0x7
Fault Detection Delay t
Glitch Immune Time t
60 μs
FD_DELAY
Guaranteed by evaluation 45 μs
GLITCH
Input Voltage V
Minimum voltage on V
2MON
ensure AD5100 V
Voltage Range2 V
Input Resistance R
On, Off Threshold Tolerance3
3 30 V
2MON
500 675 860 kΩ
IN_V2MON
ΔOn, ΔOff TA = 25°C −2 +2 %
2MON
power-up
REG
to
2.2 V
(See Figure 7 and Table 6)
T
T
= −40°C to +85°C −2.4 +2.4 %
A
= −40°C to +125°C −2.5 +2.5 %
A
Hysteresis 1.5 %
Turn-On Programmable
SHDN
Hold Time
Δt
Tolerance (See and ) Figure 7Table 8
Turn-Off Programmable
SHDN
Delay Time
Δt
Tolerance (See and ) Figure 7Table 8
T
TA = 25°C; does not apply to
2SD_HOLD
Code 0x7
TA = 25°C; does not apply to
2SD_DELAY
Code 0x07
= −40°C to +125°C; does not
A
−10 +10 %
−10 +10 %
−17 +17 %
apply to Code 0x7
Fault Detection Delay t
Glitch Immune Time t
SHDN
Output High
V
SHDN
Output Low
V
SHDN
Sink Current
(Open-Drain Output)
SHDNWARN
SHDNWARN
Inactive Leakage Current
Active
V
FD_DELAY
45 μs
GLITCH
only 60 μs
2MON_OFF
V
V
OH
I
V
OL
I
SINK
= V
, I
RAIL
REG
= V
RAIL
1MON
= 1.6 mA 0.4 V
SINK
= 12 V, I
1MON
V
= 12 V,
1MON
= 40 μA 2.4 V
SOURCE
, I
= 600 μA V
SOURCE
= 40 mA 1.5 3 V
SINK
SHDN
forced to 12 V
− 0.5 V
1MON
10 13.5 mA
I
OH_SHDNWARN
V
OL_SHDNWARN
0.9 μA
I
= 3 mA 0.4 V
SINK
Rev. A | Page 4 of 36
AD5100
Parameter Symbol Conditions Min Typ1 Max Unit
LOW VOLTAGE MONITORING INPUTS
V
, V
3MON
V
Input Resistance R
V
V
V
Input Resistance R
V
V
RESET
RESET
T
V
RESET
2.7 V < V
2.3 V < V
1.8 V ≤ V
RESET
V
RESET
Glitch Immune Time t
V
V
V
WDI (WATCHDOG INPUT)
WDI Programmable Timeout Tolerance
(see Figure 13 and Table 8)
T
WDI Pulse Width t
Watchdog Initiated
Watchdog Initiated
WDI Input Voltage Low V
WDI Input Voltage High V
WDI Input Current WDI = V
WDI = 0 −20 μA
TA = −40°C to +85°C −2.75 +2.75 %
TA = −40°C to +125°C −3 +3 %
1.2 %
500 675 860 kΩ
= 25°C −2.5 +2.5 %
A
(See Figure 12 and Table 6)
TA = −40°C to +85°C −2.75 +2.75 %
TA = −40°C to +125°C −3 +3 %
5 %
T
= 25°C; does not apply to
A
−10 +10 %
Code 0x6 and Code 0x7
= −40°C to +125°C; does not
A
−17 +17 %
Hysteresis V
4MON
Hold Time Tolerance
(See , , and ) Figure 10 Figure 12Table 8
4_HYSTERESIS
Δt
RS_HOLD
apply to Code 0x6 and Code 0x7
60 μs
3MON/V4MON
-to-
Delay
RESET
Output Voltage High
Output Voltage Low
Output Short-Circuit Current5
Maximum Output V
4OUT
Propagation Delay t
4OUT
Maximum Frequency f
4OUT
RESET
Pulse Width
SHDN
t
RS_DELAY
V
V
OH
V
V
OL
I
SOURCE
50 μs
GLITCH
Open drain 5.5 V
4OUT_MAX
V4OUT_DELAY
V4OUT
70 μs
ΔtWD T
50 ns
WDI
When no WDI tWD/50 ms
t
WDR
When no WDI activity > 4 tWD 1 sec
t
WD_SHDN
0.3 × V
IL_WD
0.7 × V
IH_WD
≥ 4.38 V, I
3MON
3MON
= 30 μA
I
SOURCE
3MON
= 20 μA
I
SOURCE
3MON
= 8 μA
I
SOURCE
> 4.38 V, I
3MON
< 4.38 V, I
3MON
RESET
= 0, V
RESET
= 0, V
Applies to
= 25°C −10 +10 %
A
= −40°C to +125°C −17 +17 %
A
RESET
3MON
= 120 μA V
SOURCE
≤ 4.38 V,
≤ 2.7 V,
≤ 2.3 V,
= 3.2 mA 0.4 V
SINK
= 1.2 mA 0.3 V
SINK
= 5.5 V
3MON
= 3.6 V
3MON
disabled only
− 1.5 V
3MON
0.8 × V
0.8 × V
0.8 × V
V
3MON
V
3MON
V
3MON
825 μA
400 μA
10 kHz
3MON
V
3MON
160 μA
0.3 × V
Input Voltage Low
Input Voltage High
Pulse Width
Deglitching
RESET
-to-
Delay
V
IL_MR
0.7 × V
V
IH_MR
1 μs
t
MR
100 ns
t
MR_GLITCH
1 μs
t
MR_DELAY
V
3MON
3MON
V
V
Rev. A | Page 5 of 36
AD5100
Parameter Symbol Conditions Min Typ1 Max Unit
MR
Pull-Up Resistance (Internal to V
RESET
Hold Time Tolerance
3MON
)
(see and ) Figure 12Table 8
T
SERIAL INTERFACES
Input Logic High (SCL, SDA)6 V
Input Logic Low (SCL, SDA) VIL External R
Output Logic High (SDA) VOH V
Output Logic Low (SDA) VOL I
Input Current VIN = 0 V to 5.5 V 1 μA
Input Capacitance CI 5 pF
POWER SUPPLY
Supply Voltage Range V
Sleep Mode Supply Current I
Active Mode Supply Current I
V
Device Power-On Threshold V
V
Device Power-Up V
, Minimum Pulse Width t
2MON
Device Power-Down Delay T
I
1
Represent typical values at 25°C, V
2
Initial V
3
Does not apply if V
4
V
4MON
30 V. One application where this 30 V capability is useful is electronic media-oriented systems transport (eMOST) diagnostic circuits.
5
The
6
It is typical for the SCL and SDA to have resistors pulled up to V
turn-on minimum remains as 2.2 V but the 3 V to 30 V specifications apply afterward.
2MON
is a digital signal.
2MON
threshold limits (see Table 6) are designed to primarily allow V
RESET
short-circuit current is the maximum pull-up current when
driven directly from a low voltage logic controller without pull-up resistors.
= 12 V, and V
1MON
37 60 82 kΩ
Δt
RS_HOLD
T
= 25°C; does not apply to Code
A
−10 +10 %
0x6 and Code 0x7
= −40°C to +125°C; does not
A
−17 +17 %
apply to Code 0x06 and Code 0x7
External R
IH
6.0 30 V
1MON
SLEEP_V1MON
POWER_V1MON
2MON, IH
2MON, IL
V2MON_PW
VREG_OFF_DELAY
= 12 V.
2MON
3MON
= 2 V to 5.5 V 0.7 × V
RAIL
= 3 mA 0 0.4 V
OL
V
V
= 0 V 5 μA
2MON
= 12 V 2 mA
2MON
edge triggered mode selected 2 mA
2MON
2.2 V
0.4 V
4 ms
V
< 0.4 V (normal mode) 2 sec
2MON
2
C-initiated power-down 10 μs
to monitor low voltage inputs. The V
4MON
RESET
is driven low by a microprocessor bidirectional reset pin.
. However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are
= 2.2 kΩ 2.0 5.5 V
PULL-UP
= 2.2 kΩ 0 0.8 V
PULL-UP
V
RAIL
input pin is capable of withstanding voltages up to
4MON
Rev. A | Page 6 of 36
AD5100
SDA
TIMING SPECIFICATIONS
Table 3.
Parameter Description Min Typ Max Unit
I2C INTERFACE TIMING CHARACTERISTICS
f
SCL clock frequency 400 kHz
SCL
t1 t
t2
t3 t
t4 t
t5 t
t6 t
t7 t
t8 t
t9 t
t10 t
1
Guaranteed by design and not subject to production test.
2
See Figure 2.
1, 2
, bus free time between start and stop 1.3 μs
BUF
, hold time after (repeated) start condition; after this
t
HD;STA
0.6 μs
period, the first clock is generated
, low period of SCL clock 1.3 μs
LOW
, high period of SCL clock 0.6 50 μs
HIGH
, setup time for start condition 0.6 μs
SU;STA
, data hold time 0.9 μs
HD;DAT
, data setup time 0.1 μs
SU;DAT
, fall time of both SDA and SCL signals 0.3 μs
F
, rise time of both SDA and SCL signals 0.3 μs
R
, setup time for stop condition 0.6 μs
SU;STO
t
t
t
8
t
9
6
2
SCL
t
t
1
PSSP
t
2
3
t
9
t
8
t
4
t
7
t
5
t
10
05692-002
Figure 2. Digital Interface Timing Diagram
Rev. A | Page 7 of 36
AD5100
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
V
to GND −0.3 V, +33 V
1MON
V
to GND −0.3 V, +33 V
2MON
V
to GND −0.3 V, +7 V
3MON
V
to GND −0.3 V, +33 V
4MON
V
to GND −0.3 V, +7 V
OTP
Digital Input Voltage to GND
(MR
, WDI, SCL, SDA, AD0)
Digital Output Voltage to GND
, V
(RESET
, SHDNWARN)
4OUT
Digital Output Voltage to GND (SHDN)
0 V, +7 V
0 V, +7 V
0 V, +33 V
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
ESD Rating (HBM) 3.5 kV
Maximum Junction Temperature (T
Power Dissipation1 (T
Peak Temperature 260°C (+0°C)
Time at Peak Temperature 20 sec to 40 sec
Ramp-Up Rate 3°C/sec max
Ramp-Down Rate −6°C/sec max
Time from 25°C to Peak Temperature 8 minutes max
1
Values relate to the package being used on a 4-layer board.
2
TA = ambient temperature.
3
Junction-to-case resistance is applicable to components featuring a
preferential flow direction, for example, components mounted on a
heat sink. Junction-to-ambient resistance is more useful for air-cooled
PCB-mounted components.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. A | Page 8 of 36
AD5100
V
V
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
1MON
GND
2
V
3
OTP
4
3MON
MR
5
WDI
6
7
SCL
SDA
8
NC = NO CONNECT
AD5100
TOP VIEW
(Not to S cale)
16
V
2MON
GND/NC
15
V
14
4MON
13
AD0
SHDN
12
SHDNWARN
11
10
V
4OUT
RESET
9
05692-003
Figure 3. Pin Configuration
Table 5. AD5100 Pin Function Descriptions
Pin No. Mnemonic Description
1 V
1MON
High Voltage Monitoring Input. AD5100 internal supply is derived from V
capacitor between this pin and GND, placed as close as possible to the V
. There must be a 10 μF electrolytic
1MON
pin.
1MON
2 GND Ground.
3 V
4 V
5
One-Time Programmable Supply Voltage for EPROM. A 10 μF decoupling capacitor (low ESR) to GND is required.
OTP
Low Voltage Monitoring Input.
3MON
MR
Manual Reset Input. Active low.
6 WDI Watchdog Input.
7 SCL
8 SDA
9
10 V
11
12
RESET
Open-Drain Output. Triggered by V
4OUT
SHDNWARN
Shutdown Output. Push-pull output with selectable rail voltage of V
SHDN
2
C Serial Input Register Clock. Open-drain input. If it is driven directly from a logic driver without the pull-up
I
resistor, ensure that the V
2
C Serial Data Input/Output. Open-drain input/output. If it is driven directly from a logic driver without the pull-
I
up resistor, ensure that the V
Reset. Push-pull output with rail voltage of V
Shutdown Warning. Active low, open-drain output.
minimum is 3.3 V.
IH
minimum is 3.3 V.
IH
.
4MON
3MON
.
or V
1MON
, the AD5100 internal power (30 V
REG
maximum).
13 AD0 I2C Slave Address Configuration. If tied high, this pin can only be tied to 3.3 V maximum.
14 V
Low Voltage Monitoring Input. Capable of withstanding 30 V.
4MON
15 GND/NC Ground/No Connect. Can be grounded or left floating but do not connect to any other potentials.
16 V
High Voltage Monitoring Input. It is also the internal supply voltage enabling input.
2MON
GND
1
2
3
AD5100
4
TOP VIEW
5
(Not to Scale)
6
7
89
Figure 4. Recommended PCB Layout for Shielded High Voltage Inputs
16
15
14
13
12
11
10
05692-004
Rev. A | Page 9 of 36
AD5100
ONE-TIME PROGRAMMABLE (OTP) OPTIONS
All values are typical ratings; see Tab le 2 for tolerances.
Table 6. Available Programmable Thresholds at T
V
OV Threshold1 V
1MON
UV Threshold V
1MON
= 25°C
A
On Threshold V
2MON
Off Threshold2 V
2MON
Threshold V
3MON
Threshold
4MON
7.92 V 6.00 V 3.00 V 3.00 V 2.32 V 1.67 V
9.00 V 6.49 V 3.5 V 3.5 V 2.64 V 2.31 V
9.90 V 6.95 V 4.00 V 4.00 V 2.93 V3 3.05 V
11.00 V 7.47 V 4.77 V 4.77 V 3.10 V 4.62 V
12.00 V 7.92 V 6.00 V 6.00 V 4.36 V 6.51 V
13.20 V 8.43 V3 6.49 V 6.49 V 4.65 V 7.16 V
14.14 V 9.00 V 6.95 V 6.95 V3 4.75 V 7.54 V3
15.23 V 9.43 V 7.47 V3 7.47 V 4.97 V 7.96 V
15.84 V 9.90 V 7.92 V 7.92 V Reserved Reserved
17.22 V 10.42 V 8.43 V 8.43 V Reserved Reserved
18.00 V3 11.00 V 9.00 V 9.00 V Reserved Reserved
18.86 V 11.65 V 9.43 V 9.43 V Reserved Reserved
19.80 V 12.00 V 9.90 V 9.90 V Reserved Reserved
22.00 V 12.38 V 15.23 V 15.23 V Reserved Reserved
24.75 V 13.20 V 19.80 V 19.80 V Reserved Reserved
28.29 V 13.66 V 24.75 V
Rising edge triggered
Reserved Reserved
wake-up mode
1
V
must be > V
1MON_OV
2
V
is ignored if > V
2MON_OFF
3
AD5100-0 default settings. Contact Analog Devices if other default settings are required.
1MON_UV
.
2MON_ON
, but V
2MON_OFF
cannot be = V
2MON_ON
.
Table 7. Look-Up Table of Programming Code vs. Typical Thresholds Shown in Table 6
V
Code
OV
1MON
Threshold
V
UV
1MON
Threshold
V
On
2MON
Threshold
Off Threshold V
V
2MON
Threshold V
3MON
Threshold
4MON
0000 18.00 V1 8.43 V1 7.47 V1 6.95 V1 2.93 V1 7.54 V1
0001 18.86 V 7.92 V 6.95 V 7.47 V 4.65 V 1.67 V
0010 15.84 V 9.43 V 6.49 V 6.00 V 4.75 V 2.31 V
0011 17.22 V 9.00 V 6.00 V 6.49 V 4.97 V 3.05 V
0100 24.75 V 6.49 V 4.77 V 4.00 V 2.32 V 4.62 V
0101 28.29 V 6.00 V 4.00 V 4.77 V 2.64 V 6.51 V
0110 19.80 V 7.47 V 3.50 V 3.00 V 4.36 V 7.16 V
0111 22.00 V 6.95 V 3.00 V 3.50 V 3.10 V 7.96 V
1000 9.90 V 12.38 V 24.75 V 19.80 V Reserved Reserved
1001 11.00 V 12.00 V 19.80 V
Rising edge triggered
Reserved Reserved
wake-up mode
1010 7.92 V 13.66 V 15.23 V 9.90 V Reserved Reserved
1011 9.00 V 13.20 V 9.90 V 15.23 V Reserved Reserved
1100 14.14 V 10.42 V 9.43 V 9.00 V Reserved Reserved
1101 15.23 V 9.90 V 9.00 V 9.43 V Reserved Reserved
1110 12.00 V 11.65 V 8.43 V 7.92 V Reserved Reserved
1111 13.20 V 11.00 V 7.92 V 8.43 V Reserved Reserved
1
AD5100-0 default settings. Contact Analog Devices if other default settings are required.
Rev. A | Page 10 of 36
AD5100
Table 8. Available Programmable Hold Time and Delay
t
0.07 ms 0.07 ms 0.07 ms 0.07 ms 0.1 ms 100 ms
20 ms 50 ms 10 ms1 50 ms 1 ms 250 ms
40 ms 100 ms 20 ms 100 ms1 15 ms 500 ms
60 ms 200 ms 30 ms 200 ms 30 ms 750 ms
80 ms 400 ms 40 ms 400 ms 50 ms 1000 ms
100 ms 800 ms 50 ms 800 ms 100 ms 1250 ms
150 ms 1000 ms 100 ms 1000 ms 150 ms 1500 ms1
200 ms1 1200 ms1 200 ms 1200 ms 200 ms1 2000 ms
1
Table 9. Look-Up Table of Programming Code vs. Typical Timings Shown in Table 8
Code t
000 200 ms1 1200 ms1 10 ms1 100 ms1 200 ms1 1500 ms1
001 150 ms 1000 ms 20 ms 50 ms 150 ms 2000 ms
010 100 ms 800 ms 30 ms 200 ms 100 ms 1250 ms
011 80 ms 400 ms 40 ms 400 ms 50 ms 1000 ms
100 60 ms 200 ms 50 ms 800 ms 30 ms 750 ms
101 40 ms 100 ms 100 ms 1000 ms 15 ms 500 ms
110 20 ms 50 ms 200 ms 1200 ms 1 ms 250 ms
111 0.07 ms 0.07 ms 0.07 ms 0.07 ms 0.1 ms 100 ms
1
t
1SD_HOLD
AD5100-0 default settings. Contact Analog Devices if other default settings are required.
t
1SD_HOLD
AD5100-0 default settings. Contact Analog Devices if other default settings are required.
t
1SD_DELAY
t
1SD_DELAY
t
2SD_HOLD
t
2SD_HOLD
t
2SD_DELAY
t
2SD_DELAY
t
RS_HOLD
RS_HOLD
t
WD
WD
Rev. A | Page 11 of 36
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