Analog Devices AD2S1200 Datasheet

12-Bit R/D Converter

FEATURES

Complete monolithic R/D converter
Parallel and serial 12-bit data ports
System fault detection
Absolute position and velocity outputs
Differential inputs
±11 arc minutes of accuracy
1,000 rps maximum tracking rate, 12-bit resolution
Incremental encoder emulation (1,024 pulses/rev)
Programmable sinusoidal oscillator on-board
Compatible with DSP and SPI® interface standards

204.8 kHz square wave output
Single-supply operation (5.00 V ± 5%)

−40°C to +125°C temperature rating
44-lead LQFP package
4 kV ESD protection

FUNCTIONAL BLOCK DIAGRAM

with Reference Oscillator

GENERAL DESCRIPTION

The AD2S1200 is a complete 12-bit resolution tracking resolver­to-digital converter, integrating an on-board programmable
sinusoidal oscillator that provides sine wave excitation for
resolvers. An external 8.192 MHz crystal is required to provide
a precision time reference. This clock is internally divided to
generate a 4.096 MHz clock to drive all the peripherals.

The converter accepts 3.6 V p-p ± 10% input signals, in the
range of 10 kHz to 20 kHz on the Sin and Cos inputs. A Type II
servo loop is employed to track the inputs and convert the input
Sin and Cos information into a digital representation of the
input angle and velocity. The bandwidth of the converter is set
internally to 1.7 kHz with an external 8.192 MHz crystal. The
maximum tracking rate is 1,000 rps.

REFBYP REFOUT FS1 FS2 XTALOUT

CLKIN

(8.192MHz)

AD2S1200

EXC

EXC

SinLO

Sin

CosLO

Cos

NM

SAMPLE

A

B

AD2S1200

ADC

ANGLE θ

ADC

ENCODER

EMULATION

VOLTAGE

REFERENCE

ERROR

CALCULATION/

SIGNAL

MONITOR

ANGLE φ

POSITION

INTEGRATOR

POSITION REGISTER

SOERDVELRESET DB10

MONITOR

ERROR

DATA BUS OUTPUT

DB11

SO

Figure 1.

REFERENCE
OSCILLATOR

(DAC)

SYNTHETIC

REFERENCE

DEMODULATOR

MULTIPLEXER

SCLK

(4.096MHz)

MONITOR

ERROR

DB9–DB0

INTERNAL

CLOCK

GENERATOR

(204.8kHz)

CLOCK

DIVIDER

FAULT

INDICATORS

DIGITAL

FILTER

VELOCITY

INTEGRATOR

VELOCITY REGISTER

CPO

DOS

LOT

DIR

CS

RD

04406-0-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

AD2S1200

APPLICATIONS

Electric power steering
Electric vehicles
Integrated starter generator/alternator
Encoder emulation
Automotive motion sensing and control

PRODUCT HIGHLIGHTS

• Complete Resolver-to-Digital Interface: The AD2S1200

provides the complete solution for digitizing resolver
signals (12-bit resolution) with on-board programmable
sinusoidal oscillator.

• Triple Format Position Data: Absolute 12-bit angular

binary position data accessed either via a 12-bit parallel
port or via a 3-wire serial interface. Incremental encoder
emulation in standard A QUAD B format, with direction
output is available.

• Digital Velocity Output: 12-bit signed digital velocity,

twos complement format, accessed either via a 12-bit
parallel port or via a 3-wire serial interface.

• Programmable Excitation Frequency: Excitation fre-

quency easily programmable to 10 kHz, 12 kHz, 15 kHz, or
20 kHz by using the frequency select pins.

• Ratiometric Tracking Conversion: This technique

provides continuous output position data without
conversion delay. It also provides noise immunity and
tolerance of harmonic distortion on the reference and
input signals.

• System Fault Detection: A fault detection circuit will

detect any loss of resolver signals, out of range input
signals, input signal mismatch, or loss of position tracking.

Rev. 0 | Page 2 of 24

AD2S1200

TABLE OF CONTENTS

AD2S1200–Specifications ................................................................4

Incremental Encoder Outputs...................................................16

Absolute Maximum Ratings ............................................................6

ESD Caution ..................................................................................6

Pin Configuration and Function Descriptions .............................7

Resolver Format Signals...................................................................8

Principle of Operation......................................................................9

Fault Detection Circuit.................................................................9

Connecting the Converter .........................................................11

Absolute Position and Velocity Output....................................12

Parallel Interface..........................................................................12

Serial Interface.............................................................................14

REVISION HISTORY

Revision 0: Initial Version

On-Board Programmable Sinusoidal Oscillator.....................16

Supply Sequencing and Reset....................................................17

Charge Pump Output .................................................................17

Circuit Dynamics ............................................................................18

AD2S1200 Loop Response Model ............................................18

Sources of Error ..........................................................................19

Clock Requirements ...................................................................20

Connecting to the DSP...............................................................20

Outline Dimensions........................................................................21

Ordering Guide ...........................................................................21

Rev. 0 | Page 3 of 24

AD2S1200

AD2S1200–SPECIFICATIONS

Table 1. (AVDD = DVDD = 5.0 V ± 5% @ −40°C to +125°C CLKIN 8.192 MHz, unless otherwise noted.)

Parameter Min Typ Max Unit Conditions/Comments

Sin, Cos INPUTS1

Voltage 3.24 3.6 3.96 V p-p Sinusoidal waveforms, differential inputs
Input Bias Current 2 µA VIN = 3.96 V p-p
Input Impedance 1.0 MΩ VIN = 3.96 V p-p
Common Mode Volts 100 mV Peak CMV @ SinLO, CosLO, with respect to REFOUT @ 10 kHz
Phase Lock Range −45 +45 Degrees Sin/Cos vs. EXC output

ANGULAR ACCURACY

Angular Accuracy ±11 arc min Zero acceleration Y Grade
±22 arc min Zero acceleration W Grade
Resolution 12 Bits Guaranteed no missing codes
Linearity INL 2 LSB Zero acceleration, 0 to 1,000 rps
Linearity DNL 0.3 LSB Guaranteed monotonic
Repeatability 1 LSB
Hysteresis 1 LSB

VELOCITY OUTPUT

Velocity Accuracy 2 LSB Zero acceleration
Resolution 11 Bits
Linearity 1 LSB Guaranteed by design 2 LSB max
Offset 0 1 LSB Zero acceleration
Dynamic Ripple 1 LSB Zero acceleration

DYNAMIC PERFORMANCE

Bandwidth 1,500 1,700 2,000 Hz Fixed
Tracking Rate 1,000 rps Guaranteed by design. Tested to 800 rps.
Acceleration Error 30 arc min At 10,000 rps2
Settling Time 179° Step Input 4.72 5.0 ms To within stated accuracy
Settling Time 179° Step Input 3.7 3.8 ms To within one degree

EXC, EXC OUTPUTS

Voltage 3.34 3.6 3.83 V p-p Load ±100 µA
Center Voltage 2.39 2.47 2.52 V
Frequency 10 kHz FS1 = high, FS2 = high
12 kHz FS1 = high, FS2 = low
15 kHz FS1 = low, FS2 = high
20 kHz FS1 = low, FS2 = low
EXC/EXC DC Mismatch
THD −60 −55 dB First five harmonics

FAULT DETECTION BLOCK

LOS

Sin/Cos Threshold 2.86 2.92 3.0 V p-p

Angular Accuracy (Worst Case) 45 Degrees

Angular Latency (Worst Case) 90 Degrees

Time Latency 125 µs

35 mV

DOS and LOT go low when Sin or Cos fall below
threshold.

LOS indicated before angular output error exceeds limit
(3.96 V p-p input signal and 2.9 V LOS threshold).

Maximum electrical rotation before LOS is indicated
(3.96 V p-p input signal and 2.9 V LOS threshold).

1

The voltages Sin, SinLO, Cos, and CosLO relative to AGND must always be between 0.2 V and AVDD.

Rev. 0 | Page 4 of 24

AD2S1200

Parameter Min Typ Max Unit Conditions/Comments

FAULT DETECTION BLOCK (CONT.)

DOS

Sin/Cos Threshold 4.0 4.09 4.2 V p-p DOS goes low when Sin or Cos exceeds threshold.
Sin/Cos Mismatch 385 420 mV

Angular Accuracy (Worst Case) 30 Degrees

Angular Latency (Worst Case) 60 Degrees Maximum electrical rotation before DOS is indicated.
Time Latency 125 µs

LOT

Tracking Threshold 5 Degrees

Time Latency 1.1 ms
Hysteresis 4 Degrees Guaranteed by design

VOLTAGE REFERENCE

REFOUT 2.39 2.47 2.52 V ±IOUT = 100 µA
Drift 70 ppm/°C
PSRR −60 dB

CHARGE PUMP OUTPUT (CPO)

Frequency 204.8 kHz Square wave output
Duty Cycle 50 %

POWER SUPPLY

IDD Dynamic 18 mA

ELECTRICAL CHARACTERISTICS

VIL Voltage Input Low 0.8 V
VIH Voltage Input High 2.0 V
VOL Voltage Output Low 0.4 V 2 mA load
VOH Voltage Output High 4.0 V −1 mA load
IIL Low Level Input Current 10 µA
IIH High Level Input Current −10 µA
I

High Level Three-State Leakage −10 µA

OZH

I

Low Level Three-State Leakage 10 µA

OZL

DOS latched low when Sin/Cos amplitude mismatch
exceeds the threshold.

DOS indicated before angular output error exceeds
limit.

LOT goes low when internal error signal exceeds
threshold. Guaranteed by design.

Rev. 0 | Page 5 of 24

AD2S1200

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage (VDD) −0.3 V to +7.0 V
Supply Voltage (AVDD) −0.3 V to + 7.0 V
Input Voltage −0.3 V to VDD + 0.3 V
Output Voltage Swing −0.3 V to VDD + 0.3 V
Operating Temperature Range (Ambient) −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Lead Temperature Soldering

Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum ratings for extended periods may affect
device reliability.

Rev. 0 | Page 6 of 24

AD2S1200

T

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

REFOU

44

DVDD1

RD 2

CS 3

SAMPLE 4

RDVEL 5

SOE 6

DB11/SO 7

DB10/SCLK 8

DB9 9

DB8 10

DB7 11

DB612DB513DB414DB3

44-Lead Low Profile Quad Flat Package [LQFP] (ST-44)

Table 3. Pin Function Descriptions

Pin No. Pin Name Pin Type

1 DVDD Supply
2

3
4
5
6

RD
CS
SAMPLE
RDVEL
SOE

Input
Input
Input
Input
Input

7 DB11/SO Output
8 DB10/SCLK Input, output
9–15 DB9–DB3 Output
16 DGND Ground
17 DV

Supply

DD

18–20 DB2–DB0 Output
21 XTALOUT Output
22 CLKIN Input
23 DGND Ground
24 CPO Output
25 A Output
26 B Output

REFBYP43AGND42Cos41CosLO40AV

DD

SinLO38Sin37AGND36EXC35EXC

39

AD2S1200

TOP VIEW

(Not to Scale)

15

16

17

DD

DB218DB119DB0

DV

DGND

Figure 2. Pin Configuration

Pin No. Pin Name Pin Type

27 NM Output
28 DIR Output
29 DOS Output
30 LOT Output
31 FS1 Input
32 FS2 Input
33
34 EXC Output
35

36 AGND Ground
37 Sin Input
38 SinLO Input
39 AVDD Supply
40 CosLO Input
41 Cos Input
42 AGND Ground
43 REFBYP Input
44 REFOUT Output

34

RESET33

FS232

FS131

LOT30

DOS29

DIR28

NM27

B26

A25

CPO24

DGND23

RESET

EXC

04406-0-002

Input

Output

20

21

22

CLKIN

XTALOUT

Rev. 0 | Page 7 of 24

AD2S1200

θ

ω

RESOLVER FORMAT SIGNALS

Vr = Vp× Sin(ϖt)

R1

θ

R2

S1 S3

V

= Vs× Sin(ϖt) × Sin(θ)

b

(A) CLASSICAL RESOLVER

Vr = Vp× Sin(ϖt)

S2

Va = Vs× Sin(ϖt) × Cos(θ)

S4

Figure 3. Classical Resolver vs. Variable Reluctance Resolver

R1

θ

R2

S1 S3

V

= Vs× Sin(ϖt) × Sin(θ)

b

(B) VARIABLE RELUCTANCE RESOLVER

S2

Va = Vs× Sin(ϖt) × Cos(θ)

S4

04406-0-003

A resolver is a rotating transformer typically with a primary
winding on the rotor and two secondary windings on the stator.
In the case of a variable reluctance resolver, there are no wind­ings on the rotor as shown in Figure 3. The primary winding is
on the stator as well as the secondary windings, but the saliency
in the rotor design provides the sinusoidal variation in the
secondary coupling with the angular position. Either way, the
resolver output voltages (S3–S1, S2–S4) will have the same
equations as shown in Equation 1.

13

0

42

0

θ

0

AngleShaft

=

ω

=

=

SintSinESS

×=−

CostSinESS

×=−

Equation 1.

θω

FrequencyExcitationRotortSin

AmplitudeExcitationRotorE

The stator windings are displaced mechanically by 90° (see
Figure 3). The primary winding is excited with an ac reference.
The amplitude of subsequent coupling onto the stator secon­dary windings is a function of the position of the rotor (shaft)
relative to the stator. The resolver, therefore, produces two
output voltages (S3–S1, S2–S4) modulated by the SinE and
CoSinE of shaft angle. Resolver format signals refer to the
signals derived from the output of a resolver as shown in
Equation 1. Figure 4 illustrates the output format.

S2 TO S4

(Cos)

S3 TO S1

(Sin)

R2 TO R4

(REF)

0°

90° 180°

θ

270° 360°

Figure 4. Electrical Resolver Representation

04406-0-004

Rev. 0 | Page 8 of 24