Altera SoC Embedded Design Suite User Manual

Altera SoC Embedded Design Suite User
Guide
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TOC-2

Contents

Introduction to SoC Embedded Design Suite.................................................... 1-1
Installing the Altera SoC Embedded Design Suite.............................................2-1
Licensing..............................................................................................................3-1
Overview....................................................................................................................................................... 1-1
Device Tree Binary...........................................................................................................................1-2
Hardware and Software Development Roles........................................................................................... 1-3
Hardware – Software Development Flow.................................................................................................1-5
Installation Folders......................................................................................................................................2-1
Installing the SoC EDS................................................................................................................................2-1
Installing the ARM DS-5 Altera Edition Toolkit.....................................................................................2-2
Getting the License...................................................................................................................................... 3-1
Activating the License................................................................................................................................. 3-2
Getting Started Guides........................................................................................4-1
Getting Started with Board Setup..............................................................................................................4-1
External Connections......................................................................................................................4-1
Dual in-line package (DIP) Switch Settings.................................................................................4-2
Jumper Settings................................................................................................................................ 4-2
Getting Started with Running Linux.........................................................................................................4-2
Getting Started with Preloader...................................................................................................................4-3
Getting Started with GCC Bare-Metal Project Management................................................................ 4-6
Start Eclipse.......................................................................................................................................4-6
Create New Project.......................................................................................................................... 4-6
Set the Linker Script.........................................................................................................................4-9
Write Application Source Code...................................................................................................4-12
Build Application...........................................................................................................................4-15
Debug Application.........................................................................................................................4-17
Getting Started with ARM Compiler Bare-Metal Project Management............................................4-25
Start Eclipse.....................................................................................................................................4-25
Create a New Project.....................................................................................................................4-26
Create a Linker Script....................................................................................................................4-29
Set the Linker Script.......................................................................................................................4-34
Write Application Source Code...................................................................................................4-37
Build Application...........................................................................................................................4-40
Debug Application.........................................................................................................................4-42
Getting Started with Bare-Metal Debugging..........................................................................................4-51
Bare-Metal Debugging Sample Application Overview.............................................................4-51
Starting the Eclipse IDE................................................................................................................4-52
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Importing the Bare-Metal Debugging Sample Application.....................................................4-52
Compiling the Bare-Metal Debugging Sample Application....................................................4-54
Running the Bare-Metal Debugging Sample Application........................................................4-54
Getting Started with the Hardware Library........................................................................................... 4-58
Hardware Library Sample Application Overview.....................................................................4-58
Starting the Eclipse IDE................................................................................................................4-59
Importing the Hardware Library Sample Application............................................................. 4-59
Compiling the Hardware Library Sample Application.............................................................4-62
Running the Hardware Library Sample Application................................................................4-62
Getting Started with Peripheral Register Visibility...............................................................................4-67
Getting Started with Linux Kernel and Driver Debugging..................................................................4-72
Linux Kernel and Driver Debugging Prerequisites...................................................................4-72
Starting Eclipse with the Embedded Command Shell..............................................................4-73
Debugging the Kernel....................................................................................................................4-73
Getting Started with Linux Application Debugging.............................................................................4-78
Configuring Linux......................................................................................................................... 4-78
Starting Eclipse with the Embedded Command Shell..............................................................4-79
Importing the Linux Application Debugging Sample Application........................................ 4-79
Compiling the Linux Application Debugging Sample Application........................................4-82
Setting up Remote System Explorer............................................................................................4-82
Running the Linux Application Debugging Sample Application...........................................4-88
Getting Started with Tracing....................................................................................................................4-92
Getting Started with Cross Triggering....................................................................................................4-96
Cross-triggering Prerequisites......................................................................................................4-96
Enabling Cross-triggering on HPS..............................................................................................4-98
FPGA Triggering HPS Example................................................................................................ 4-100
Enabling Cross-triggering on FPGA.........................................................................................4-103
HPS Triggering FPGA Example................................................................................................ 4-104
ARM DS-5 Altera Edition................................................................................... 5-1
Starting Eclipse.............................................................................................................................................5-1
Bare-metal Project Management...............................................................................................................5-2
Bare-metal Project Management using Makefiles.......................................................................5-2
GCC-Based Bare-Metal Project Management.............................................................................5-5
ARM Compiler Bare-Metal Project Management.................................................................... 5-11
Debugging...................................................................................................................................................5-22
Accessing Debug Configurations................................................................................................ 5-22
Creating a New Debug Configuration........................................................................................5-23
Debug Configuration Options.....................................................................................................5-25
DTSL Options.................................................................................................................................5-34
Embedded Command Shell.................................................................................6-1
HPS Preloader User Guide..................................................................................7-1
HPS Configuration...................................................................................................................................... 7-1
Preloader Support Package Generator......................................................................................................7-2
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Hardware Handoff Files..................................................................................................................7-3
Using the Preloader Support Package Generator GUI...............................................................7-3
Preloader Support Package Files and Folders..............................................................................7-4
Command-Line Tools for the Preloader Support Package Generator.....................................7-5
BSP Settings...................................................................................................................................... 7-9
Preloader Compilation..............................................................................................................................7-15
Configuring FPGA from Preloader.........................................................................................................7-15
RBF File Stored in QSPI Flash Memory..................................................................................... 7-16
RBF File Stored on SD/MMC Card.............................................................................................7-16
Preloader Image Tool................................................................................................................................7-16
Operation of the Preloader Image Tool......................................................................................7-17
Tool Usage...................................................................................................................................... 7-18
Output Image Layout.................................................................................................................... 7-19
mkimage Tool.............................................................................................................................................7-20
mkimage Tool Options................................................................................................................. 7-21
mkimage Tool Image Creation.................................................................................................... 7-21
Hardware Library................................................................................................ 8-1
Feature Description..................................................................................................................................... 8-2
SoC Abstraction Layer (SoCAL)....................................................................................................8-2
Hardware Manager (HW Manager)..............................................................................................8-2
Hardware Library Reference Documentation..........................................................................................8-3
HPS Flash Programmer User Guide...................................................................9-1
HPS Flash Programmer Command-Line Utility.....................................................................................9-1
How the HPS Flash Programmer Works..................................................................................................9-1
Using the Flash Programmer from the Command Line........................................................................ 9-2
HPS Flash Programmer...................................................................................................................9-2
HPS Flash Programmer Command Line Examples....................................................................9-4
Supported Memory Devices.......................................................................................................................9-6
Bare-Metal Compiler.........................................................................................10-1
SD Card Boot Utility......................................................................................... 11-1
Usage Scenarios..........................................................................................................................................11-1
Tool Options...............................................................................................................................................11-2
Linux Software Development Tools..................................................................12-1
Linux Compiler..........................................................................................................................................12-1
SD Card Boot Utility................................................................................................................................. 12-2
Usage Scenarios..............................................................................................................................12-2
Tool Options...................................................................................................................................12-2
Device Tree Generator..............................................................................................................................12-4
Yocto Plugin............................................................................................................................................... 12-5
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Support and Feedback.......................................................................................13-1
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Introduction to SoC Embedded Design Suite

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The Altera® system on a chip (SoC) Embedded Design Suite (EDS) provides the tools needed to develop embedded software for Altera's SoC devices.
The Altera SoC EDS is a comprehensive tool suite for embedded software development on Altera SoC devices. The Altera SoC EDS contains development tools, utility programs, run-time software, and application examples that enable firmware and application software development on the Altera SoC hardware platform.

Overview

The Altera SoC EDS enables you to perform all required software development tasks targeting the Altera SoCs, including:
• Board bring-up
• Device driver development
• Operating system (OS) porting
• Bare-metal application development and debugging
• OS- and Linux-based application development and debugging
• Debug systems running symmetric multiprocessing (SMP)
• Debug software targeting soft IP residing on the FPGA portion of the device
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2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
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Device Tree Binary

The major components of the SoC EDS include:
• ARM® Development Studio 5 (DS-5™) Altera Edition (AE) Toolkit
• Compiler tool chains:
• Bare-metal GNU Compiler Collection (GCC) tool chain from Mentor Graphics
®
• ARM Bare-metal compiler tool chain.
• Linux GCC compiler tool chain from Linaro
• Pre-built Linux package including:
• Linux kernel executable
• Linux kernel U-boot image
• Device tree blob
• Secure Digital (SD) card image
• Script to download Linux source code from the Git tree on the Rocketboards website (www.rocketboards.org). The script downloads the sources corresponding to the pre-built Linux package.
• SoC Hardware Library (HWLIB)
• Hardware-to-software interface utilities:
• Preloader generator
• Device tree generator
• Sample applications
• Golden Hardware Reference Design (GHRD) including:
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• FPGA hardware project
• FPGA hardware SOF file
• Precompiled preloader
• Embedded command shell allowing easy invocation of the included tools:
• SD Card Boot Utility
• Yocto Eclipse plugin
• Quartus® II Programmer and SignalTap II The Linux package included in the SoC EDS is not an official release and is intended to be used
Note:
only as an example. Use the official Linux release described in the Golden System Reference Design (GSRD) User Manual available on the Rocketboards website or a specific release from the Git trees
located on the Gitweb page of the Rocketboards website for development.
Note: The SoC EDS is tested only with the Linux release that comes with it. Newer Linux releases may
not be fully compatible with this release of SoC EDS.
Note: The Golden Hardware Reference Design (GHRD) included with the SoC EDS is not an official
release and is intended to be used only as an example. For development purposes, use the official GHRD release described in the GSRD User Manual available on the Rocketboards website.
Related Information
RocketBoards Website
Device Tree Binary
There are two device tree binary (DTB) files delivered as part of the SoC EDS:
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• The socfpga_cyclone5.dtb file is a generic DTB file which does not have any dependency on soft IP.
FPGA programming and bridge releasing are not required before Linux starts running using this DTB. This DTB file is intended for customers interested in bringing up a new board or just wanting to
simplify their boot flow until they get to the Linux prompt. If what is being developed or debugged does not involve the FPGA, it is better to remove the FPGA complexities.
• The soc_system.dtb file is based on the GHRD design, which is part of the GSRD. Since the GHRD
does contain soft IPs, this DTB notifies Linux to load the soft IP drivers. Therefore, the FPGA needs to be programmed and the bridges released before booting Linux.

Hardware and Software Development Roles

Depending on your role in hardware or software development, you need a different subset of the SoC EDS toolkit. The following table lists some typical engineering development roles and indicates which tools each role typically requires.
Table 1-1: Hardware and Software Development Roles
Hardware and Software Development Roles
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Tool Hardware
Engineer
ARM DS-5 Debugging
ARM DS-5 Tracing
ARM DS-5 Cross Triggering
Hardware Libraries
Preloader Generator
Flash Programmer
Bare-Metal Compiler
Bare-Metal
Developer
RTOS Developer Linux Kernel and
Driver Developer
Linux Application
Developer
Linux
Compiler
Yocto Plugin
Device Tree
Generator
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Hardware and Software Development Roles
This table lists typical tool usage, but your actual requirements depend on your specific project and organization.
Hardware Engineer
As a hardware engineer, you typically design the FPGA hardware in Qsys. You can use the debugger of the ARM DS-5 Altera Edition to connect to the ARM cores and test the hardware. A convenient feature of the DS-5 debugger is the soft IP register visibility, using Cortex Microcontroller Software Interface Standard (CMSIS) System View Description (.svd) files. With this feature, you can easily read and modify the soft IP registers from the ARM side.
As a hardware engineer, you may generate the Preloader for your hardware configuration. The Preloader is a piece of software that configures the HPS component according to the hardware design.
As a hardware engineer, you may also perform the board bring-up. You can use the ARM DS-5 debugger to verify that they can connect to the ARM and the board is working correctly.
These tasks require JTAG debugging, which is enabled only in the Subscription Edition. For more information, see the Licensing section.
Bare-Metal and RTOS Developer
As either a bare-metal or a RTOS developer, you need JTAG debugging and low-level visibility into the system.
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Use the bare-metal compiler to compile your code and the SoC Hardware Library to control the hardware in a convenient and consistent way.
Use the Flash Programmer to program the flash memory on the target board. These tasks require JTAG debugging, which is enabled only in the Subscription Edition. For more
information, see the Licensing section.
Linux Kernel and Driver Developer
As a Linux kernel or driver developer, you may use the same tools the RTOS developers use, because you need low-level access and visibility into the system. However, you must use the Linux compiler instead of the bare-metal compiler. You can use the Yocto plugin to manage the project and the device tree generator to generate device trees.
These tasks require JTAG debugging, which is enabled only in the Subscription Edition. For more information, see the Licensing section.
Linux Application Developer
As a Linux application developer, you write code that targets the Linux OS running on the board. Because the OS provides drivers for all the hardware, you do not need low-level visibility over JTAG. DS-5 offers a very detailed view of the OS, showing information such as which threads are running and which drivers are loaded.
You can use the Yocto plugin to manage the application build. These tasks do not require JTAG debugging. You can perform them both in the Web and Subscription
editions. For more information, see the Licensing section.
Related Information
Licensing on page 3-1
For more information about .svd files, refer to the Hardware - Software Development Flow section.
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Hardware – Software Development Flow

The Altera hardware-to-software handoff utilities allow hardware and software teams to work independ‐ ently and follow their respective familiar design flows.
Figure 1-1: Altera Hardware-to-Software Handoff
Hardware – Software Development Flow
1-5
The following handoff files are created when the hardware project is compiled:
Handoff folder – contains information about how the HPS component is configured, including things
like which peripherals are enabled, the pin MUXing and IOCSR settings, and memory parameters
.svd file – contains descriptions of the HPS registers and of the soft IP registers on FPGA side
.sopcinfo file – contains a description of the entire system
The handoff folder is used by the preloader generator to create the Preloader. For more information about the handoff folder, refer to the HPS Preloader User Guide.
The .svd file contains the description of the registers of the HPS peripheral registers and registers for soft IP components in the FPGA portion of the SoC. This file is used by the ARM DS-5 Debugger to allow these registers to be inspected and modified by the user.
SOPC Information (.sopcinfo) file, containing a description of the entire system, is used by the Device Tree Generator to create the Device Tree used by the Linux kernel. For more information, refer to the Device Tree Generator chapter.
The soft IP register descriptions are not generated for all soft IP cores.
Note:
Related Information
HPS Preloader User Guide on page 7-1
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You must install the Altera SoC Embedded Design Suite (EDS) and the ARM Development Studio 5 (DS-5) Altera Edition (AE) Toolkit to run the SoC EDS on an Altera SoC hardware platform.
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Installation Folders

The default installation folder for SoC EDS is:
<SoC EDS installation directory>
c:\altera\14.1\embedded on Windows
~/altera/14.1/embedded on Linux
The default installation folder for Quartus Programmer is:
<Quartus installation directory>
c:\altera\14.1\qprogrammer on Windows
~/altera/14.1/qprogrammer on Linux
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Note:
The installation directories are defined, as follows:
<Altera installation directory> to denote the location where Altera tools are installed.
<SoC EDS installation directory> to denote the location where SoC EDS is installed.

Installing the SoC EDS

Perform the following steps to install the SoC EDS Tool Suite in a Windows-based system:
1. Download the latest installation program from the SoC Embedded Design Suite page of the Altera
website.
2. Run the installer to open the Installing SoC Embedded Design Suite (EDS) dialog box, and click Next
to start the Setup Wizard.
3. Accept the license agreement, and click Next.
4. Accept the default installation directory or browse to another installation directory, and click Next.
Note: If you have previously installed the Quartus® II software, accept the default SoC EDS installation
directory to allow the Quartus II software and the SoC EDS Tool Suite to operate together.
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2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
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Installing the ARM DS-5 Altera Edition Toolkit

5. Select All the components to be installed, and click Next. The installer displays a summary of the
installation.
6. Click Next to start the installation process. The installer displays a separate dialog box with the
installation progress of the component installation.
7. When the installation is complete, turn on Launch DS-5 Installation to start the ARM DS-5 installa‐ tion, and click Finish.
Note: On some Linux-based machines, you can install the SoC EDS with a setup GUI similar to the
Windows-based setup GUI. Because of the variety of Linux distributions and package require‐ ments, not all Linux machines can use the setup GUI. If the GUI is not available, use an equivalent command-line process. Download the Linux installation program from the SoC Embedded
Design Suite page on the Altera website.
Installing the ARM DS-5 Altera Edition Toolkit
For the last step of the SoC EDS installation process, start the ARM DS-5 AE Toolkit installer.
Note: Make sure you have the proper setting to access the internet.
1. When the Welcome message is displayed, click Next.
2. Accept the license agreement and click Next.
3. Accept the default installation path, to ensure proper interoperability between SoC EDS and ARM DS-5 AE, and click Next.
4. Click Install to start the installation process. The progress bar is displayed.
5. When a driver installation window appears, click Next.
6. Accept the driver installation and click Install.
7. After successful installation, click Finish. ARM DS-5 AE installation is complete.
8. Click Finish.
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Licensing

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The SoC EDS is available with three different licensing options:
• Subscription edition
• Free web edition
• 30-day evaluation of subscription edition
The only tool impacted by the selected licensing option is the ARM DS-5 Altera Edition. All the other tools offer the same level of features in all licensing options; for example, the preloader generator and the bare-metal compiler offer the same features no matter which licensing option is used.
The main difference between the licensing options depends on which types of debugging scenarios are enabled:
Licensing Option Debugging Scenarios Enabled
Web edition • Linux application debugging over ethernet
Subscription edition 30-day evaluation of the subscription edition
• JTAG-based Bare-Metal Debugging
• JTAG-based Linux Kernel and Driver Debugging
• Linux Application Debugging over Ethernet

Getting the License

Depending on the licensing option, it is necessary to follow the steps detailed for each option to obtain the license.
Subscription Edition - If you have purchased the SoC EDS Subscription Edition, then you have already received an ARM license serial number. This is a 15-digit alphanumeric string with two dashes in between. You will need to use this number to activate your license in DS-5, as shown in the Activating the License section.
Free Web Edition - For the free SoC EDS Web Edition, you will be able to use DS-5 perpetually to debug Linux applications over an Ethernet connection. Get your ARM license activation code from the SoC Embedded Design Suite download page on the Altera website (http://dl.altera.com/soceds) and then activate your license in DS-5, as shown in the Activating the License section.
30-Day Evaluation of Subscription Edition - If you want to evaluate the SoC EDS Subscription Edition, you can get a 30-Day Evaluation activation code from the SoC Embedded Design Suite download page on
©
2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
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Activating the License

the Altera website (http://dl.altera.com/soceds) and then activate your license in DS-5, as shown in the Activating the License section.
Related Information
SoC EDS Download Page
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Activating the License
This section presents the steps required for activating the license in DS-5 Altera Edition by using the serial license number or activation code that were mentioned in the "Getting the License" section.
Note:
An active user account is required to activate the DS-5 Altera Edition license. If you do not have an active user account, it can be created on the ARM Self-Service page available on the ARM website (silver.arm.com).
The first time the Eclipse IDE from the ARM DS-5 is run, it notifies you that it requires a license. Click
1. the Open License Manager button.
Figure 3-1: No License Found
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2. If at any time it is required to change the license, select Help > ARM License Manager to open the
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Figure 3-2: Accessing ARM License Manager
Activating the License
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Licensing
3. The License Manager - View and edit licenses dialog box opens and shows that a license is not available. Click the Add License button.
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Activating the License
Figure 3-3: ARM License Manager
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4. In the Add License - Obtain a new licenses dialog box, select the type of license to enter. In this example, select the radio button, “Enter a serial number or activation code to obtain a license” to enter the choices listed, below. When done, click Enter.
a. ARM License Number for Subscription Edition. b. ARM License Activation Code for Web Edition and 30-Day Evaluation.
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Figure 3-4: Add License - Obtain a New License
Activating the License
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Licensing
5. Click Next.
6. In the Add License - Choose Host ID dialog box, select the Host ID (Network Adapter MAC address)
to tie the license to. If there are more than one option, select the one you desire to lock the license to, and click Next.
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Activating the License
Figure 3-5: Add License - Choose host ID
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7. In the Add License - Developer account details dialog box, enter an ARM developer (Silver) account. If you do not have an account, it can be created easily by clicking the provided link. After entering the account information, click Finish.
Figure 3-6: Add License - Developer Account Details
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The License Manager needs to be able to connect to the Internet in order to activate the license. If you do not have an Internet connection, you will need to write down your Ethernet MAC
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Activating the License
address and generate the license directly from the ARM Self-Service web page on the ARM website (silver.arm.com), then select the "Already have a license" option in the License Manger.
Note: Only the Subscription Edition, with an associated license number can be activated this way. The
Web Edition and Evaluation edition are based on activation codes, and these codes cannot be used on the ARM Self-Service web page on the ARM website (silver.arm.com). They need to be entered directly in the License Manager; which means an Internet connection is a requirement for licensing.
The ARM License Manager uses the Eclipse settings to connect to the Internet. The default Eclipse settings is to use the system-wide configuration for accessing the Internet. In case the License Manager cannot connect to the Internet, you can try to change the Proxy settings by going to Window > Preferences > General > Network Connections. Ensure that "HTTPS" proxy entry is configured and enabled.
8. After a few moments, the ARM DS-5 will activate the license and display it in the License Manager. Click Close.
Figure 3-7: ARM License Manager
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Licensing
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Getting Started Guides

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This chapter presents a series of getting started guides aimed at enabling you to quickly get accustomed to doing the basic SoC software development tasks.
The following items are covered:
• Preloader
• Bare-Metal debugging
• SoC Hardware library (HWLIB)
• Peripheral register visibility
• Linux application debugging
• Linux Kernel and driver debugging
• Tracing
• Cross Triggering
The following additional topics are covered to support the above scenarios:
• Board setup – needed for all the scenarios
• Running Linux – needed for the scenarios that use Linux
The guides presented in this chapter are intedned to be run on a Cyclone V SoC Development board.

Getting Started with Board Setup

This section presents the necessary Altera Cyclone V Development Kit board settings in order to run Linux and the Getting Started examples.

External Connections

• External 19V power supply connected to J22 – DC Input
• Mini USB cable connected from host PC to J37 – Altera USB Blaster II connector. This is used for connecting the host PC to the board for debugging purposes.
• Mini USB cable connected from host PC to J8 – UART USB connector. This is used for exporting the UART interface to the host PC.
• Ethernet cable from connector J3 to local network. This is used if Linux network connectivity is desired.
©
2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
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Dual in-line package (DIP) Switch Settings

Dual in-line package (DIP) Switch Settings
• SW1 = all switches OFF
• SW2 = all switches OFF
• SW3 = ON-OFF-OFF-OFF-ON-ON. This selects the proper FPGA configuration option (MSEL).
• SW4 = OFF-OFF-ON-ON. This selects both HPS and FPGA to be in the JTAG scan chain.

Jumper Settings

Number Name Setting
J5 9V Open
J6 JTAG_HPS_SEL Shorted
J8 JTAG_SEL Shorted
J9 UART Signals Open
J13 OSC1_CLK_SEL Shorted
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J15 JTAG_MIC_SEL Open
J26 CLKSEL0 2-3 Shorted
J27 CLKSEL1 2-3 Shorted
J28 BOOTSEL0 1-2 Shorted
J29 BOOTSEL1 2-3 Shorted
J30 BOOTSEL2 1-2 Shorted
J31 SPI_I2C Open

Getting Started with Running Linux

This section presents how to run the provided Linux image on the board, to be able to run the Getting Started sections related to Linux.
The provided Linux image is an example only; use the latest version from the Rocketboards website
Note:
for your development.
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Getting Started with Preloader

The steps are:
1. Setup the board as described in Board Setup section.
2. Extract the SD card image from the archive <SoC EDS installation directory>\embeddedsw\socfpga\
prebuilt_images\sd_card_linux_boot_image.tar.gz. The file is named sd_card_linux_boot_image.img.
The command tar -xzf<filename> can be used from Embedded Command Shell to achieve this.
3. Write the SD card image to a micro SD card using the free tool Win32DiskImager from the Sourceforge Projects website (sourceforge.net) on Windows or the dd utility on Linux.
4. Power up the board using the PWR switch.
5. Connect a serial terminal from the host PC to the serial port corresponding to the UART USB
connection; and use 115,200 baud, no parity, 1 stop bit, no flow control settings.
6. After successful boot, Linux will ask for the login name. Enter root and click Enter.
Figure 4-1: Linux Booted
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Related Information
Rocket Boards For more information about the latest Linux version, refer to the Rocketboards website.
Sourceforge Projects To obtain the free tool - Win32DiskImager, refer to the Projects section of the Sourceforge website.
Getting Started with Preloader
This section presents an example of how to generate and compile the Preloader for the Cyclone V SoC Golden Hardware Reference Design (GHRD) that is provided with SoC EDS.
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Getting Started with Preloader
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The Preloader is an essential tool for SoC software. It performs the low-level initialization, brings up SDRAM memory, loads the next boot stage from flash to SDRAM and executes it.
The Preloader is already delivered as part of the GHRD in the <SoC EDS installation directory>/examples/
hardware/cv_soc_devkit_ghrd/software/preloader folder.
In this example, you will re-create the Preloader in the folder <SoC EDS installation directory>/examples/
hardware/cv_soc_devkit_ghrd/software/spl_bsp.
The screen snapshots presented in this section were created using the Windows version of SoC EDS, but the example can be run in a very similar way on a Linux host PC.
The steps to create the Preloader are:
1. Start an Embedded Command Shell by executing <SoC EDS installation directory>\Embedded_Command_
Shell.bat.
2.
Run the command, bsp-editor. The BSP Editor dialog box appears. Note: The tool that generates a preloader support package is the BSP Editor, also used to generate
BSPs for other Altera products.
3. Select File > New BSP.The New BSP dialog opens.
4.
Click the “…” button to browse for the Preloader settings directory in the New BSP dialog box.
5. Browse <SoCEDS folder>\examples\hardware\cv_soc_devkit_ghrd\hps_isw_handoff\soc_system_hps_0 for the
hardware handoff folder. The rest of the Preloader settings are populated automatically.
Figure 4-2: Populated Options in the New BSP Window
6. Click OK to close the New BSP dialog box. This will populate the BSP Editor dialog box with the
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Figure 4-3: Default Options in the BSP Editor window
Getting Started with Preloader
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7. Click Generate in the BSP Editor dialog box to generate the Preloader files.
8. Click Exit in the BSP Editor dialog box to exit the application.
9. In the Embedded Command Shell, execute the following commands:
• cd <SoC EDS installation directory>\examples\hardware\cv_soc_devkit_ghrd\software\spl_bsp
make
10.The Preloader is ready to be used in the above folder. Some of the more relevant files that are created:
preloader-mkpimage.bin – Preloader with the proper header to be loaded by BootROM
uboot-socfpga \ spl \ u-boot- spl – Preloader ELF file, to be used for debugging purposes
uboot-socfpga \tools\mkimage.exe – Utility to add the header needed by the Preloader to
Related Information
Preloader For more information about the Preloader, refer to the Preloader section.
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recognize the next boot stage
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Getting Started with GCC Bare-Metal Project Management

Cyclone V Device Handbook: Booting and Configuration For more information about Booting and Configuration with regards to Preloader, refer to the Booting and Configuration appendix in volume 3 of the Cyclone V Device Handbook.
Arria V Device Handbook: Booting and Configuration For more information about Booting and Configuration with regards to Preloader, refer to the Booting and Configuration appendix in volume 3 of the Arria V Device Handbook.
Getting Started with GCC Bare-Metal Project Management
This section presents a complete bare-metal example demonstrating the GCC bare-metal project management features of the ARM DS-5 Altera Edition.

Start Eclipse

1. Start Eclipse The Workspace Launcher dialog box appears.
Figure 4-4: Select a Workspace
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2.
Select a new workspace to use. For example, you can enter c:\Workspace and click OK.

Create New Project

1. Go to File > New > Project...
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Create New Project
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2. Select C/C++ > C Project and click Next.
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Create New Project
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3.
Edit Project Name to be TestProject, select Project Type to be Bare-metal Executable > Empty Project, and select Toolchains to be Altera Baremetal GCC. Click Finish.
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Set the Linker Script

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Set the Linker Script
1. Go to Project > Properties
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Set the Linker Script
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2. Go to C/C++ Build > Settings > GCC Linker > Image and then click Linker Script.
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Set the Linker Script
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3. Browse to <SoC EDS installation directory>\host_tools\mentor\gnu\arm\baremetal\arm-altera-eabi\lib\
cycloneV-dk-oc-ram-hosted.ld, select cycloneV-dk-oc-ram-hosted.ld, and click on the Open
button. This will instruct the Linker to use a linker script that targets the 64 KB Internal RAM and also to use
semihosting operations.
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