ALPHA AV850M2-00 Datasheet

Alpha Industries, Inc. [781] 935-5150 • Fax [617] 824-4579 Email sales@alphaind.com www.alphaind.com 1
Specifications subject to change without notice. 9/00A
18–40 GHz GaAs MMIC Voltage V ariable Attenuator
Features
Dual Voltage Control
35 dB Attenuation Range
Triple Gate 0.25 µm MESFET Design
1 dB
All Attenuation States
100% On-Wafer RF and DC Testing
100% Visual Inspection to MIL-STD-883
MT 2010
Chip Outline
AV850M2-00
Description
Alpha’s AV850M2-00 MMIC voltage variable attenuator is a standard TEE configuration incorporating triple-gate
0.25 µm power MESFETs.The attenuator has a typical insertion loss of 3 dB over the 18–40 GHz band. The attenuation range is 35 dB while typical I/P and O/P return loss is better than 6 dB.The chip uses Alpha’s prov en 0.25 µm MESFET technology and is based upon MBE layers and electron beam lithography f or the highest uniformity and repeatability .The MMICs employ surf ace passivation to ensure a rugged, reliable part with through-substrate via holes and gold-based backside metallization to facilitate a conductive epo xy die attach process.This chip incorporates triple-gate FETs which results in less attenuation variation over temperature as well as better power handling performance at all attenuation states.All chips are screened for insertion loss, full attenuation and I/P and O/P match over the 18–40 GHz band for guaranteed performance.
Parameter Condition Symbol Min. Typ.
2
Max. Unit
Maximum Attenuation VC= -1 V, VC2= -0.25 V
F = 18–35 GHz ISO 20 30 dB
Minimum Attenuation VC= -1 V, VC2= -3.25 V
F = 18–35 GHz I
L
23dB Input/Output Return Loss F = 18–35 GHz RL -10 -6 dB Maximum Attenuation VC= 0 V, VC2= -0.8 V
F = 35–40 GHz ISO 20 35 dB
Minimum Attenuation VC= 0 V, VC2= -3.25 V
F = 35–40 GHz I
L
34dB Input/Output Return Loss F = 35–40 GHz RL -10 -5 dB Input Power at 1 dB Compression
(For All Attenuation Levels)
1
P
1 dB
10 dBm
Thermal Resistance Θ
JC
101 °C/W
Electrical Specifications at 25°C
0.000
0.000
0.314
0.750
0.097
1.500
0.982
0.911
1.050
Dimensions indicated in mm. All DC (V) pads are 0.1 x 0.1 mm and RF In, Out pads are 0.07 mm wide. Chip thickness = 0.1 mm.
Characteristic Value
Operating Temperature (TC) -55°C to +90°C Storage Temperature (TST) -65°C to +150°C Control Voltage (VC)-7 V
DC
Power In (PIN) 30 dBm Junction Temperature (TJ) 175°C
Absolute Maximum Ratings
1. Not measured on a 100% basis. 2.Typical represents the median parameter value across the specified frequency range for the median chip.
18–40 GHz GaAs MMIC Voltage Variable Attenuator AV850M2-00
2 Alpha Industries, Inc. [781] 935-5150 Fax [617] 824-4579 Email sales@alphaind.com • www.alphaind.com
Specifications subject to change without notice. 9/00A
Attenuation vs. Frequency (VC1 = 0 V)
Frequency (GHz)
-45
-35
-40
20 22 24 26 28 30 36 38 4032 34 46 4842 44 50
-30
-25
-20
-15
-10
-5
Attenuation (dB)
0
-0.2
0.0
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6 – -3.0
V
C2
:
Example Chip-to-Chip Variation for Any
Single-Frequency of Operation
(Low-Frequency Band)
Control V oltage VC2 (V)
Attenuation (dB)
-40
-35
-30
-25
-20
-15
-10
-5
0
-3.25 -0.25
Knee Voltage 1
Knee Voltage 2
Knee Voltage 3
VC1 = -1V
*
*
Example Chip 3
Example Chip 2
Example Chip 1
Attenuation vs. 1.0 dB Compression
Attenuation (dB)
10
8 6 4 2 0
-2
-20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0
12
14
16
18
20
22
24
26
Input Power at 1 dB
28
Attenuation vs. Control Voltage
Control V oltage VC2 (V)
-3.0 -2.6 -2.2 -1.8 -1.4 -0.6 -0.2-1.0 0
Attenuation (dB)
-45
-35
-40
-30
-25
-20
-15
-10
-5
0
20 GHz
30 GHz
40 GHz
50 GHz
VC1 = 0 V
Typical Performance Data
RF
V
C2
V
C1
RF
Bias Arrangement
V
C2
V
C1
RF OUTRF IN
Circuit Schematic
VC1controls the series devices, adjust for optimum VSWR. V
C2
controls the shunt devices, adjust to set attenuation.
Recommended Control Voltages:
For frequency 18–35 GHz: V
C1
= -1 V, VC2= -0.25 to -3.25 V.
For frequency 35–40 GHz: V
C1
= 0 V, VC2= -0.8 to -3.25 V.
*Asterisk in graph indicates guaranteed attenuation limits from the Electrical
Specification table (knee voltage can vary from -3.25 V to approximately -1.0 V).
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