Alliance Semiconductor AS7C1024A, AS7C31024A Service Manual

May 2002

5V/3.3V 128KX8 CMOS SRAM (Evolutionary Pinout)

Features

• AS7C1024A (5V version)

• AS7C31024A (3.3V version)

• Industrial and commercial temperatures

• Organization: 131,072 words x 8 bits

•High speed

- 10/12/15/20 ns address access time

- 5, 6, 7, 8 ns output enable access time

• Low power consumption: ACTIVE

- 853 mW (AS7C1024A) / max @ 10 ns

- 522 mW (AS7C31024A) / max @ 10 ns

• Low power consumption: STANDBY

- 55 mW (AS7C1024A) / max CMOS

- 36 mW (AS7C31024A) / max CMOS

®

• Latest 6T 0.25u CMOS technology

• Easy memory expansion with CE1

• TTL/LVTTL-compatible, three-state I/O

• 32-pin JEDEC standard packages

- 300 mil SOJ

- 400 mil SOJ

-8 × 20mm TSOP 1

- 8 x 13.4mm sTSOP 1

• ESD protection ≥ 2000 volts

• Latch-up current ≥ 200 mA

Pin arrangement

32-pin SOJ (300 mil)
32-pin SOJ (400 mil)

AS7C1024A

AS7C31024A

, CE2, OE inputs

Logic block diagram

V

CC

GND

Input buffer

A0
A1
A2
A3
A4
A5
A6
A7
A8

Row decoder

512×256×8

(1,048,576)

Column decoder

A9

A10

Array

A11

A12

1

NC

2

A16

3

A14

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

A0
I/O0
I/O1
I/O2

I/O7

Sense amp

I/O0

Control

circuit

A13

A14

A15

A16

WE
OE
CE1
CE2

GND

32-pin (8 x 20mm) TSOP I

32-pin (8 x 13.4mm) sTSOP1

A11 OE

1
2

A9

3

A8

4

A13

5

WE

6

CE2

7

A15

8

V

CC

9

NC

10

A16

11

A14

12

A12

13

A7

14

A6

15

A5

16

A4 A3

12
13
14
15
16

AS7C1024A

AS7C1024A

V

32

A15

31

CE2

30
29

WE

28

A13

27

A8

26

A9
A11

25
24

OE

23

A10

22

CE1

AS7C31024A

21

I/O7

20

I/O6

19

I/O5

18

I/O4

17

I/O3

AS7C31024A

CC

32

A10

31

CE1

30

I/O7

29
28

I/O6

27

I/O5

26

I/O4

25

I/O3

24

GND

23

I/O2

22

I/O1

21

I/O0

20

A0

19

A1

18

A2

17

Selection guide

-10

Maximum address access time 10 12 15 20 ns
Maximum output enable access time 5 6 7 8 ns

Maximum
operating current

Maximum CMOS
standby current

AS7C1024A 155 150 145 140 mA

AS7C31024A 145 140 135 130 mA

AS7C1024A 10 10 10 10 mA

AS7C31024A 5 5 5 5 mA

-12 -15 -20 Unit

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Alliance Semiconductor

P. 1 of 9

Copyright © Alliance Semiconductor. All rights reserved.

AS7C1024A

AS7C31024A

®

Functional description

The AS7C1024A and AS7C31024A are high performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as
131,072 words x 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5, 6, 7, 8 ns are ideal for high
performance applications. Active high and low chip enables (CE1, CE2) permit easy memory expansion with multiple-bank systems.

When CE1 is high or CE2 is low the devices enter standby mode. If inputs are still toggling, the device will consume ISB power. If the bus is
static, then full standby pow er is reached (I
conditions. All devices in this family will retain data when VCC is reduced as low as 2.0V.

A write cycle is accomplished by asserting write enable (WE) and both chip enables (CE1, CE2). Data on the input pins I/O0-I/O7 is wr itten
on the rising edge of WE
should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).

A read cycle is accomplished by asserting output enable (OE) and both chip enables (CE1, CE2), with write enable (WE) high. The chips drive
I/O pins with the data word referenced by the input address. When either chip enable is inactive, output enable is inactive, or write enable is
active, output drivers stay in high-impedance mode.

(write cycle 1) or the active-to-inactive edge of CE1 or CE2 (write cycle 2). To avoid bus contention, external devices

). For example, the AS7C31024A is guaranteed not to exceed 36mW under nominal full standby

SB1

Absolute maximum ratings

Parameter Symbol Min Max Unit

Voltage on V

relative to GND

CC

AS7C1024A V

AS7C31024A V
Voltage on any pin relative to GND Both V
Power dissipation Both P
Storage temperature (plastic) Both T
Ambient temperature with V

applied Both T

CC

DC current into outputs (low) Both I

Note: Stresses greater than those listed under Absolute Maximum Ratings may cause perma nent damage to the device. This is a stress rating only and functional oper­ation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.

t1
t1
t2
D

stg

bias

OUT

–0.50 +7.0 V

-0.50 +5.0 V

–0.50 VCC +0.50 V

–1.0W
–65 +150
–55 +125

C

°

C

°

–20mA

Truth table

CE1

HXXX High Z Standby (I
XLXX High Z Standby (I

L H H H High Z Output disable (I
LHHL D
LHLX D

Key: X = Don’t Care, L = Low, H = High

CE2

WE OE

Data Mode

OUT

IN

Read (ICC)

Write (

SB
SB

ICC

, I
, I

SB1
SB1

)

CC

)
)

)

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Recommended operating conditions

Parameter Device Symbol Min Nominal Max Unit

Supply voltag e

Input voltage

Ambient operating temperature

VILmin. = –3.0V for pulse width less than t

1

AS7C1024A V

AS7C31024A V

ASAS7C1024A V

AS7C31024A V

commercial T

industrial T

.

RC/2

CC
CC
IH
IH

1

V

IL

A
A

DC operating characteristics (over the operating range)

Parameter Sym Test conditions Device

Input lea k age
current

Output leakage
current

Operating
pow er suppl y
current

Standby power
supply current

Output voltage

|I

|VCC = Max, VIN = GND to V

LI

V

= Max, CE1 = VIH or

|

|I

LO

CC

CE2 = V

, V

= GND to V

IL

OUT

VCC = Max, CE1 = VIL,

CE2 = V

I

CC

IH

, f = f

Max

mA

VCC = Max, CE1 ≥ VIH and/or

≤

CE2

I

SB

VIL, VIN = VIH or VIL,

f = f

, I

Max

OUT

VCC = Max, CE1 ≥ VCC–0.2V

V

I

SB1

V

OL

V

OH

≤ GND + 0.2V or

IN

V

≥ VCC –0.2V, f = 0

IN

IOL = 8 mA, VCC = Min

IOH = –4 mA, VCC = Min 2.4 – 2.4 – 2.4 – 2.4 – V

, I

OUT

= 0mA

CC

Both –1–1–1–1µA

Both –1–1–1–1µA

CC

AS7C1024A – 155 – 150 – 145 – 140

= 0

AS7C31024A – 145 – 140 – 135 – 130

AS7C1024A – 30 – 25 – 20 – 20

AS7C31024A – 30 – 25 – 20 – 20

AS7C1024A – 10 – 10 – 10 – 10

AS7C31024A – 5 – 5 – 5 – 5

Both

AS7C1024A

AS7C31024A

®

4.5 5.0 5.5 V

3.0 3.3 3.6 V

2.2 – VCC + 0.5 V

2.0 – VCC + 0.5 V

–0.5 – 0.8 V

0–70°C

–40 – 85

-10 -12 -15 -20

Min Max Min Max Min Max Min Max

–0.4–0.4–0.4–0.4V

C

°

Unit

mA

mA

mA

Capacitance (f = 1 MHz, Ta = 25 °C, VCC = NOMINAL)

Parameter Symbol Signals Test conditions Max Unit

Input capacitance C

I/O capacitance C

9/26/02; 0.9.9

IN

I/O

Alliance Semiconductor

A, CE1, CE2, WE, OE VIN = 0V 5 pF

I/O VIN = V

2

= 0V 7 pF

OUT

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