Allegro UCN5832A, UCQ5832EP, UCQ5832A, UCN5832EP Datasheet

5832
BiMOS II 32-BIT SERIAL-INPUT, LATCHED DRIVERS
5832
Always order by complete part number:
Part Number Package UCN5832A 40-Pin DIP UCN5832EP 44-Lead PLCC
Intended originally to drive thermal printheads, the UCN5832A and UCN5832EP have been optimized for low output-saturation voltage, high-speed operation, and pin configurations most convenient for the tight space requirements of high-resolution printheads. These integrated circuits can also be used to drive multiplexed LED displays or incandescent lamps at up to 150 mA peak current. The combination of bipolar and MOS technologies gives BiMOS II arrays an interface flexibility beyond the reach of standard buffers and power driver circuits.
The devices each have 32 bipolar NPN open-collector saturated drivers, a CMOS data latch for each of the drivers, two 16-bit CMOS shift registers, and CMOS control circuitry. The high-speed CMOS shift registers and latches allow operation with most microprocessor based systems. Use of these drivers with TTL may require input pull-up resistors to ensure an input logic high. MOS serial data outputs permit cascading for interface applications requiring additional drive lines.
The UCN5832A is supplied in a 40-pin dual in-line plastic package with 0.600" (15.24 mm) row spacing. Under normal operating condi­tions, this device will allow all outputs to sustain 100 mA continuously without derating. The UCN5832EP is supplied in a 44-lead plastic leaded chip carrier for minimum area, surface-mount applications. Both devices are also available for operation from -40°C to +85°C. To order, change the prefix from ‘UCN’ to ‘UCQ’.
Similar 32-bit serial-input latched source drivers are available as the UCN5818AF/EPF. Other high-voltage, high-current 8-bit devices are available as the UCN5821A, UCN5841A/LW, and UCN5842A.
FEATURES
To 3.3 MHz Data Input Rate
Low-Power CMOS Logic and Latches
40 V Current Sink Outputs
Low Saturation Voltage
Automotive Capable
BiMOS II 32-BIT SERIAL-INPUT,
LATCHED DRIVERS
UCN5832A
V
DD
SERIAL DATA IN
GROUND
STROBE
OUT
OUT
OUT
OUT
OUT
OUT
1
2
3
4
5
6
OUT
7
OUT
8
OUT
9
OUT
10
OUT
11
OUT
12
OUT
13
OUT
14
OUT
18
OUT
19
OUT
20
OUT
21
OUT
22
OUT
23
OUT
24
OUT
25
OUT
26
OUT
27
OUT
28
OUT
29
OUT
30
OUT
31
OUT
32
OUTPUT ENABLE
CLOCK
SERIAL DATA OUT
INTERNAL CONNECTION
LOGIC SUPPLY
40
39
38
37
34
35
36
31
32
33
30
22
29
28
27
26
25
24
23
21
1
2
3
4
7
6
5
10
9
8
11
12
12
14
15
16
17
18
19
20
OUT
15
OUT
16
OUT
17
LATCHES
REGISTER
REGISTER
LATCHES
Dwg. No. A-12,377A
Data Sheet
26185.10B
ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
Output Voltage, V
OUT
......................40 V
Logic Supply Voltage, V
DD
................15 V
Input Voltage Range,
V
IN
...................-0.3 V to V
DD
+ 0.3 V
Continuous Output Current,
l
OUT
.................................. 150 mA
Package Power Dissipation,
P
D
................................ See Graph
Operating Temperature Range,
T
A
........................... -20°C to +85 °C
Storage Temperature Range,
T
S
..........................-55°C to +150°C
Caution: CMOS devices have input-static protection but are susceptible to damage when exposed to extremely high static electrical charges.
5832
BiMOS II 32-BIT SERIAL-INPUT, LATCHED DRIVERS
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
UCN5832EP
FUNCTIONAL BLOCK DIAGRAM
Dwg. No. A-14,360
1
4
5
6
18
19
20
21
22
23
24
25
262728
40
41
42
43
44
2
3
7
8
9
10
11 12
13
14
15
16
17
OUTNCSTROBE1GROUND
SERIAL
DATA IN
LOGIC
SUPPLY
CLOCK
SERIAL
DATA OUT
OUTPUT
ENABLENCOUT
32
38
39
37
36
35
34
33
32
31
30
29
OUT
31
OUT
21
NC
OUT
13
OUT
16
IC
OUT
17
OUT
20
NC
V
DD
32
SHIFT REGISTER
LATCHES
SHIFT REGISTER
LATCHES
OUT
12
OUT
2
32-BIT SHIFT REGISTER
LATCHES
CLOCK
SERIAL DATA IN
STROBE
OUTPUT ENABLE
V
DD
SERIAL DATA
OUT
MOS
BIPOLAR
OUT
OUT
OUT
OUT
OUT OUT
1
2
3
30
31
32
GROUND
50 75 100 125 150
2.5
0.5
0
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
AMBIENT TEMPERATURE IN °C
2.0
1.5
1.0
25
Dwg. GP-025A
3.0
SUFFIX 'EP', R = 46°C/W
θJA
SUFFIX 'A', R = 36°C/W
θJA
Copyright © 1984, 1998, Allegro MicroSystems, Inc.
5832
BiMOS II 32-BIT SERIAL-INPUT, LATCHED DRIVERS
ELECTRICAL CHARACTERISTICS at T
A
= +25°C, V
DD
= 5 V (unless otherwise noted).
Limits
Characteristic Symbol Test Conditions Min. Max. Units
Output Leakage Current I
CEX
V
OUT
= 40 V, TA = 70°C—10µA
Collector-Emitter V
CE(SAT)
l
OUT
= 50 mA 275 mV
Saturation Voltage
l
OUT
= 100 mA, “A” package 150 550 mV
l
OUT
= 100 mA, “EP” package 550 mV
Input Voltage V
IN(1)
3.5 5.3 V
V
IN(0)
-0.3 +0.8 V
Input Current l
IN(1)
VIN = 3.5 V 1.0 µA
l
IN(0)
VIN = 0.8 V -1.0 µA
Input lmpedance Z
IN
VIN = 3.5 V 3.5 M
Serial Data Output Resistance R
OUT
—20 k
Supply Current l
DD
One output ON, l
OUT
= 100 mA 5.0 mA
All outputs OFF 50 µA
Output Rise Time t
r
l
OUT
= 100 mA, 10% to 90% 1.0 µs
Output Fall Time t
f
l
OUT
= 100 mA, 90% to 10% 1.0 µs
TYPICAL OUTPUT DRIVERTYPICAL INPUT CIRCUIT
IN
V
DD
Dwg. No. A-12,379A
Dwg. No. A-12,380A
OUT
V
DD
675
NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin.
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