Allegro UCN5822LW, UCN5822A, UCN5821LW, UCN5821A, UCQ5821A Datasheet

CLOCK CLK

SERIAL

DATA IN

LOGIC

GROUND

LOGIC

SUPPLY

SERIAL

DATA OUT

STROBE

OUTPUT

ENABLE

POWER

GROUND

Note the DIP package and the SOIC package are
electrically identical and share common terminal
number assignments.

1

2

3

4

V

DD

5

6

ST

7

OE

8

SUB

LATCHES

SHIFT REGISTER

16 OUT

15

14

13

12

11

10

9

Dwg. PP-026A

ABSOLUTE MAXIMUM RATINGS

°C Free-Air Temperature

at 25

Output Voltage, V

UCN5821A & UCN5821LW..... 50 V

UCN5822A & UCN5822LW..... 80 V

Logic Supply Voltage, VDD............. 15 V

Input Voltage Range,

VIN.................. -0.3 V to VDD + 0.3 V

Continuous Output Current,

I

..................................... 500 mA

OUT

Package Power Dissipation, P

Package Code ‘A’ .................. 2.1 W

Package Code ‘LW’ ............... 1.5 W

Operating Temperature Range,

TA............................ -20°C to +85°C

Storage Temperature Range,

TS.......................... -55°C to +150°C

OUT

D

OUT

OUT

OUT

OUT

OUT

OUT

OUT

5821

AND

5822

BiMOS II 8-BIT SERIAL-INPUT,

LATCHED DRIVERS

A merged combination of bipolar and MOS technology gives
these devices an interface flexibility beyond the reach of standard
logic buffers and power driver arrays. The UCN5821A,

1

UCN5821LW, UCN5822A, and UCN5822LW each have an

2

eight-bit CMOS shift register and CMOS control circuitry, eight
CMOS data latches, and eight bipolar current-sinking Darlington

3

output drivers. The UCN5821A/LW and UCN5822A/LW are

4

identical except for rated output voltage.

5

6

7

8

BiMOS II devices have much higher data-input rates than the
original BiMOS circuits. With a 5 V logic supply, they will
typically operate at better than 5 MHz. With a 12 V supply,
significantly higher speeds are obtained. The CMOS inputs are
compatible with standard CMOS and NMOS logic levels. TTL
circuits may require the use of appropriate pull-up resistors. By
using the serial data output, the drivers can be cascaded for
interface applications requiring additional drive lines.

The UCN5821/22A are furnished in a standard 16-pin plastic
DIP; the UCN5821/22LW are in a 16-lead wide-body SOIC for
surface-mount applications. The UCN5821A is also available for
operation from -40°C to +85°C. To order, change the prefix from
‘UCN’ to ‘UCQ’.

FEATURES

■ To 3.3 MHz Data Input Rate

■ CMOS, NMOS, TTL Compatible

■ Internal Pull-Down Resistors

■ Low-Power CMOS Logic & Latches

■ High-Voltage Current-Sink Outputs

■ Automotive Capable

Data Sheet

26185.12E

Caution: CMOS devices have input static protection
but are susceptible to damage when exposed to
extremely high static electrical charges.

www.allegromicro.com

Always order by complete part number, e.g., UCN5821A .

5821

AND

5822

8-BIT SERIAL-INPUT,
LATCHED DRIVERS

TYPICAL INPUT CIRCUITS

IN

STROBE &

OUTPUT

ENABLE

CLOCK &

SERIAL

DATA IN

IN

V

DD

Dwg. EP-010-3

V

DD

FUNCTIONAL BLOCK DIAGRAM

MOS

SUB

LOGIC

4

SUPPLY

SERIAL

5

DATA OUT

6

STROBE

OUTPUT ENABLE

7

(ACTIVE LOW)

POWER

8

GROUND

V

CLOCK

SERIAL

DATA IN

LOGIC

GROUND

1

2

3

SERIAL-PARALLEL SHIFT REGISTER

LATCHES

16

15 14 11 10 9

OUT1OUT

OUT

2

13

OUT4OUT

3

12

OUT6OUT7OUT

5

DD

BIPOLAR

8

NOTE — There is an indeterminate resistance between logic ground and power
ground. For proper operation, these terminals must be externally connected
together.

Number of Outputs ON UCN5821A Max. Allowable Duty Cycle

(I

= 200 mA at Ambient Temperature of

OUT

VDD = 12 V) 25°C40°C50°C60°C70°C

Dwg. FP-013A

Dwg. EP-010-4A

TYPICAL OUTPUT DRIVER

OUT

7.2K

3K

SUB

Dwg. No. A-14,314

8 90% 79% 72% 65% 57%
7 100% 90% 82% 74% 65%
6 100% 100% 96% 86% 76%
5 100% 100% 100% 100% 91%
4 100% 100% 100% 100% 100%
3 100% 100% 100% 100% 100%
2 100% 100% 100% 100% 100%
1 100% 100% 100% 100% 100%

Number of Outputs ON UCN5821LW Max. Allowable Duty Cycle

(I

= 200 mA at Ambient Temperature of

OUT

VDD = 12 V) 25°C40°C50°C60°C70°C

8 67% 59% 54% 49% 43%
7 77% 68% 62% 56% 49%
6 90% 79% 72% 65% 57%
5 100% 95% 86% 78% 68%
4 100% 100% 100% 98% 86%
3 100% 100% 100% 100% 100%
2 100% 100% 100% 100% 100%
1 100% 100% 100% 100% 100%

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

Copyright © 1985, 2000, Allegro MicroSystems, Inc.

5821

AND

5822

8-BIT SERIAL-INPUT,

LATCHED DRIVERS

ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5 V, (unless otherwise specified).

Limits

Characteristic Symbol Test Conditions Min. Max. Units

Output Leakage I

Current

Collector-Emitter V

CE(SAT)IOUT

Saturation Voltage

Input Voltage V

V

Input Resistance r

Supply Current I

DD(ON)

CEX

IN(0)

IN(1)

IN

UCN5821A/LW, V

UCN5822A/LW, V

UCN5821A/LW, V

UCN5822A/LW, V

= 50 V — 50 µA

OUT

= 80 V — 50 µA

OUT

= 50 V, TA = +70°C — 100 µA

OUT

= 80 V, TA = +70°C — 100 µA

OUT

= 100 mA — 1.1 V

I

= 200 mA — 1.3 V

OUT

I

= 350 mA, VDD = 7.0 V — 1.6 V

OUT

— 0.8 V

VDD = 12 V 10.5 — V

VDD = 5.0 V 3.5 — V

VDD = 12 V 50 — kΩ

VDD = 5.0 V 50 — kΩ

One Driver ON, VDD = 12 V — 4.5 mA

www.allegromicro.com

I

DD(OFF)

One Driver ON, VDD = 10 V — 3.9 mA

One Driver ON, VDD = 5.0 V — 2.4 mA

VDD = 5.0 V, All Drivers OFF, All Inputs = 0 V — 1.6 mA

VDD = 12 V, All Drivers OFF, All Inputs = 0 V — 2.9 mA