PD....................................... See Graph
Junction Temperature, TJ............ +150°C
Operating Temperature Range,
TA................................. -20°C to +85°C
Storage Temperature Range,
TS............................... -30°C to +150°C
* Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any set of
conditions, do not exceed the specified current rating or
junction temperature.
† Internal filtering provides protection against transients
during the first 1 µs of the current-sense pulse.
O
-0.3 V to VDD+ 0.3 V
SLA7060M THRU
SLA7062M
UNIPOLAR STEPPER-MOTOR
TRANSLATOR/DRIVERS
Combining low-power CMOS logic with high-current, high-voltage
power FET outputs, the Series SLA7060M translator/drivers provide
complete control and drive for a two-phase unipolar stepper motor with
internal fixed off time and pulse-width modulation (PWM) control of
the output current in a power multi-chip module (PMCM™). There are
no phase-sequence tables, high-frequency control lines, or complex
interfaces to program.
The CMOS logic section provides the sequencing logic, direction,
control, synchronous/asynchronous PWM operation, and a “sleep”
function. The minimum CLOCK input is an ideal fit for applications
where a complex µP is unavailable or overburdened. TTL or LSTTL
may require the use of appropriate pull-up resistors to ensure a proper
input-logic high. For PWM current control, the maximum output
current is determined by the user’s selection of a reference voltage and
sensing resistor. The NMOS outputs are capable of sinking up to 1, 2,
or 3 A (depending on device) and withstanding 46 V in the off state.
Clamp diodes provide protection against inductive transients. Special
power-up sequencing is not required.
Half-, quarter-, eighth-, and sixteenth-step operation are externally
selectable for the SLA7060/61/62M. Half-step excitation alternates
between the one-phase and two-phase modes (AB-B-AB-A-AB-B-ABA), providing an eight-step sequence.
The Series SLA7060M is supplied in a 21-pin single in-line powertab package with leads formed for vertical mounting (suffix LF2102).
The tab is at ground potential and needs no insulation. For high-current
or high-frequency applications, external heat sinking may be required.
This device is rated for continuous operation between -20°C and
+85°C.
FEATURES
To 3 A Output Rating
Internal Sequencer for Microstepping Operation
PWM Constant-Current Motor Drive
Cost-Effective, Multi-Chip Solution
100 V, Avalanche-Rated NMOS
Low r
Advanced, Improved Body Diodes
Inputs Compatible with 3.3 V or 5 V Control Signals
Sleep Mode
Internal Clamp Diodes
Always order by complete part number, e.g., SLA7060MLF2102 .
NMOS Outputs
DS(on)
Data Sheet
28210.10B
Sanken Power Devices
from Allegro MicroSystems
SLA7060M THRU SLA7062M
UNIPOLAR STEPPER-MOTOR
TRANSLATOR/DRIVERS
Functional block diagram
Motor
Drivers
Recommended operating conditions
Load Supply Voltage, VBB......................... 10 to 44 V
Logic Supply Voltage, VDD................... 3.0 V to 5.5 V
Reference Input Voltage, V
Tab Temperature (no heat sink), TT................. <90°C
Driver Supply Volt. RangeV
Drain-Source BreakdownV
Output On Resistancer
Body Diode Forward Volt.V
Driver Supply CurrentI
BB
(BR)DS
DS(on)
F
BB
Control logic
Logic Supply Volt. RangeV
Logic Input VoltageV
Logic Input CurrentI
Max. Clock Frequencyf
PWM Off Timet
PWM Min. On Timet
Ref. Input Voltage RangeV
Ref. Input CurrentI
Monitor Output VoltageV
Monitor Output CurrentI
Sense VoltageV
Sense Input CurrentI
Propagation Delay Timet
Logic Supply CurrentI
DD
IH
V
IL
IH
I
IL
clk
off
on(min)
REF
REF
MoH
V
MoL
Mo
S
SENSE
PLH
t
PHL
DD
Typical values are given for circuit design information only.
*Operation at a clock frequency greater than the specified minimum value is possible but not warranted.
Operating10—44V
VBB = 44 V, ID = 1 mA100——V
SLA7060M, IO = 1.0 A—700850mΩ
SLA7061M, IO = 2.0 A—250400mΩ
SLA7062M, IO = 3.0 A—180240mΩ
SLA7060M, IF = 1.0 A—0.851.1V
SLA7061M, IF = 2.0 A—0.951.2V
SLA7062M, IF = 3.0 A—0.952.1V
—— 15 mA
V
> 2.0 V (sleep mode)——100µA
REF
Operating3.05.05.5V
0.75V
——0.25V
—— V
DD
DD
—±1.0—µA
CLOCK, RESET, CW/CCW, and SYNC.—±1.0—µA
M1 and M2-25-50-75µA
250*——kHz
70 to 100%I
38 to 64%I
9 to 30%I
max—12—µs
trip
max—9.0—µs
trip
max—7.0—µs
trip
—1.8—µs
Operating0—1.5V
Sleep mode2.0—V
DD
—±10—µA
VDD - 1.25——V
——1.25V
——±3.0mA
Trip point at 100% I
O
0.95V
REFVREF
1.05V
REF
—±10—µA
Clock rising edge to output on—2.0—µs
Clock rising edge to output off—1.5—µs
microstepping motor drivers with built in translator for
easy operation with minimal control lines. They are
designed to operate unipolar stepper motors in half-,
quarter-, eighth-, and sixteenth-step modes. The current in
each of the four outputs, all n-channel DMOS, is regulated
with fixed off time pulse-width modulated (PWM) control
circuitry. The current at each step is set by the value of an
external current-sense resistor (RS), a reference voltage
(V
), and the DAC’s output voltage controlled by the
REF
output of the translator.
At V
DACs to the home state (see figures for reset conditions).
When a step command signal occurs on the CLOCK input
the translator automatically sequences the DACs to the
next level (see table 2 for the current level sequence). The
microstep resolution is set by inputs M1 and M2 as shown
in table 1.
RESET input. The RESET input sets the translator to a
predefined home state (see table 2); this is not the same as
the sleep mode. The monitor output (MO) goes low and
all STEP inputs are ignored until the RESET input goes
low. A low-pass filter is integrated into the reset circuit;
therefore a 5 µs delay is required between the falling edge
of the RESET input and the rising edge of the CLOCK
input.
Monitor output (MO). A logic output indicator of the
initial/home state of the translator (45°). At power up the
translator is reset to the home state (phase A and phase B
output currents are both at the half-step position or
70.7%). This output is also high at the 135°, 225°, and
315° positions.
CLOCK (step) input. A low-to-high transition on the
clock input sequences the translator, which controls the
input to the DACs and advances the motor one increment.
The size of the increment is determined by the state of
inputs M1 and M2 (see table 1). The hold state is done by
stopping the CLOCK input regardless of the input level.
Microstep select (M1 and M2). These logic-level
inputs set the translator step mode per table 1. Changes to
these inputs do not take effect until the rising edge of the
clock input.
power up, or reset, the translator sets the
DD
Direction (CW/CCW) input. This logic-level input sets
the translator step direction. Changes to this input do not
take effect until the rising edge of the clock input.
Internal PWM current control. Each pair of outputs is
controlled by a fixed off-time (7 to 12 µs, depending on
step) PWM current-control circuit that limits the load
current to a desired value (I
enabled and current flows through the motor winding and
RS. When the voltage across the current-sense resistor
equals the DAC output voltage, the current-sense comparator resets the PWM latch, which turns off the driver for the
fixed off time during which the load inductance causes the
current to recirculate for the off time period. The driver is
then re-enabled and the cycle repeats.
Synchronous operation mode. This function prevents occasional motor noise during a “hold” state, which
normally results from asynchronous PWM operation of
both motor phases. A logic high at the SYNC input is
synchronous operation; a logic low is asynchronous
operation. The use of synchronous operation during
normal stepping is not recommended because it produces
less motor torque and can cause motor vibration due to
staircase current.
Sleep mode. Applying a voltage greater than 2 V to the
REF pin disables the outputs and puts the motor in a free
state (coast). This function is used to minimize power
consumption when not in use. Although it disables much
of the internal circuitry including the output MOSFETs
and regulator, the sequencer/translator circuit is active and
therefore a microcontroller can set the step starting point
for the next operation during the sleep mode. When
coming out of sleep mode, wait 100 µs before issuing a
step command to allow the internal circuitry to stabilize.
The printed wirting board should use a heavy ground
plane.
For optimum electrical and thermal performance, the
driver should be soldered directly into the board.
The driver supply terminal, VBB, should be decoupled
with an electrolytic capacitor (>47 µF is recommended)
placed as close to the device as possible.
To avoid problems due to capacitive coupling of the
high dv/dt switching transients, route the high-level, output
traces away from the sensitive, low-level logic traces.
Always drive the logic inputs with a low source impedance
to increase noise immunity.
Grounding. A star ground system located close to the
driver is recommended. The logic supply return and the
driver supply return should be connected together at only a
single point — the star ground.
Logic supply voltage, V
should be held to less than 0.5 V to avoid malfunctioning
operation. Both VBB and VDD may be turned on or off
separately.
RESET, or SYNC) must be connected to either ground or
the logic supply voltage.
Current sensing. To minimize inaccuracies caused by
ground-trace IR drops in sensing the output current level,
the current-sense resistors, R
ground return to the star ground of the device. This path
should be as short as possible. For low-value sense
resistors, the IR drops in the printed wiring board sense
resistor’s traces can be significant and should be taken into
account. The use of sockets should be avoided as they can
introduce variation in RS due to their contact resistance.
PWM current control. The maximum value of current
limiting (I
at the REF input with a transconductance function approximated by:
The required V
RS should be increased for a proportionate increase in
V
.
REF
) is set by the selection of RS and the voltage
TRIP
I
TRIP
should not be less than 0.1 V. If it is,
REF
, should have an independent
S
= V
REF/RS
RS = 0.1 Ω to 2 Ω
R1 = 10 kΩ
R2 = 5.1 kΩ
R3 = 10 kΩ
CA = 100 µF, 50 V
CB = 10 µF, 10 V
C1 = 0.1 µF
www.allegromicro.com
Typical application
11
SLA7060M THRU SLA7062M
Io= 0.5A
Io= 0.7A
Io= 1.0A
UNIPOLAR STEPPER-MOTOR
TRANSLATOR/DRIVERS
Applications Information (cont’d)
Reference voltage. In the Typical Application shown,
resistors R
The trimming of R
and REF input current. The sum of R1+R2 should be less
than 50 kΩ to minimize the effect of I
above 2 V by activating Q1 causes the sleep mode.
Minimum output current. The Series SLA7060M uses
fixed off-time PWM current control. Due to internal logic
and switching delays, the actual load current peak will be
slightly higher than the calculated I
for low-inductance loads). These delays, plus the minimum recommended V
current-control circuitry can regulate. An application with
this device should maintain continuous PWM control in
order to obtain optimum torque out of the motor. The
boundary of the load current (I
and discontinuous operation is:
where V
To produce zero current in a motor, the REF input
should be pulled above 2 V, turning off all drivers.
Synchronous operation mode. If an external signal
is not available to control the synchronous operation
mode, a simple circuit can keep the SYNC input low while
the CLOCK input is active; the SYNC input will go high
(synchronous operation) when the CLOCK input stays low
(“hold”). The RC time constant determines the sync
transition timing.
NOTE –The use of this function except at 0, 70.7, or
100%I
recommended.
Temperature effects on FET outputs. Analyzing
safe, reliable operation includes a concern for the relationship of NMOS on resistance to junction temperature.
Device package power calculations must include the
increase in on resistance (producing higher on voltages)
and R2 set the reference voltage as:
1
V
= (VDD x R2)/(R1 + R2)
REF
allows for the resistor tolerances
2
. Raising V
REF
value (especially
TRIP
, limit the minimum value the
REF
) between continuous
O(min)
t
/[Rm x Lm]
I
= [(VM + VSD)/Rm] x [(1/e
O(min)
= load supply voltage
M
off
VF = body diode forward voltage
Rm = motor winding resistance
t
caused by increased operating junction temperatures. The
figure provides a normalized on-resistance curve, and all
thermal calculations should consider increases from the
given +25°C limits, which may be caused by internal
heating during normal operation.
These power MOSFET outputs feature an excellent
combination of fast switching, ruggedized device design,
low on resistance, and cost effectiveness.
Avalanche energy capability. There is a surge voltage
expected when the output MOSFET turns off, and this
voltage may exceed the MOSFET breakdown voltage
(V
and as long as the energy (E
MOSFET by the surge voltage, is less than the maximum
allowable value, it is considered to be within its safe
operating area. Note that the maximum allowable avalanche energy is reduced as a function of temperature.
by the MOSFET is approximated as
). However, the MOSFETs are avalanche type
(BR)DS
In application, the avalanche energy (E
E
= V
(AV)
DS(AV)
), which is imposed on the
(AV)
x 0.5 x ID x t
) dissipated
(AV)
SLA7060M THRU SLA7062M
UNIPOLAR STEPPER-MOTOR
TRANSLATOR/DRIVERS
Output circuit for avalanche energy
calculations
SLA7061M
SLA7060M
Lead temperature TL [°C) at GND pin (#11) close to the package
www.allegromicro.com
SLA7062M
Allowable avalanche energy
Waveforms during avalanche breakdown
13
SLA7060M THRU SLA7062M
UNIPOLAR STEPPER-MOTOR
TRANSLATOR/DRIVERS
Terminal list
Terminal
PinNameTerminal Description
1, 2OUTADriver outputs for phase A
3, 4OUTA\Driver outputs for phase A\
Motor
Drivers
5SENSEAPhase A current sense
6VDDLogic power supply, V
Step mode logic control input
14MOMonitor logic output
15SYNCSynchronous PWM control input
16VBBDriver power supply, V
BB
17SENSEBPhase B current sense
18, 19OUTB\Driver outputs for phase B\
20, 21OUTBDriver outputs for phase B
The products described herein are manufactured in Japan by
Sanken Electric Co., Ltd. for sale by Allegro MicroSystems, Inc.
Sanken and Allegro reserve the right to make, from time to time,
such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or
manufacturability of its products. Therefore, the user is cautioned to
verify that the information in this publication is current before placing
any order.
When using the products described herein, the applicability and
suitability of such products for the intended purpose shall be reviewed
at the users responsibility.
Although Sanken undertakes to enhance the quality and reliability of
its products, the occurrence of failure and defect of semiconductor
products at a certain rate is inevitable.
Users of Sanken products are requested to take, at their own risk,
preventative measures including safety design of the equipment or
systems against any possible injury, death, fires or damages to society
due to device failure or malfunction.
Sanken products listed in this publication are designed and intended
for use as components in general-purpose electronic equipment or
apparatus (home appliances, office equipment, telecommunication
equipment, measuring equipment, etc.). Their use in any application
requiring radiation hardness assurance (e.g., aerospace equipment) is
not supported.
When considering the use of Sanken products in applications where
higher reliability is required (transportation equipment and its control
systems or equipment, fire- or burglar-alarm systems, various safety
devices, etc.), contact a sales representative to discuss and obtain
written confirmation of your specifications.
The use of Sanken products without the written consent of Sanken in
applications where extremely high reliability is required (aerospace
equipment, nuclear power-control stations, life-support systems, etc.) is
strictly prohibited.
The information included herein is believed to be accurate and
reliable. Application and operation examples described in this
publication are given for reference only and Sanken and Allegro
assume no responsibility for any infringement of industrial property
rights, intellectual property rights, or any other rights of Sanken or
Allegro or any third party that may result from its use.