ALLEGRO A8500 User Manual

A8500

Flexible WLED/RGB Backlight Driver for Medium Size LCDs

Features and Benefits

▪ Active current sharing between LED strings for ±1.5%

typical current matching and ±1.2% typical accuracy

▪ Drive up to 12 series × 8 parallel = 96 LEDs

(Vf = 3.2 V, If = 20 mA)

▪ Flexible dimming, using alternative methods:

▫ LED duty cycle control (PWM pin)
▫ DC current using serial programming (EN pin)
▫ DC current using external PWM signal (APWM pin)
▫ An external resistor

▪ Boost converter with integrated 50 V, 2 A DMOS
▪ LED sinks rated for 25 mA
▪ 200 kHz to 2 MHz switching frequency
▪ Open LED disconnect
▪ Boost current limit, thermal shutdown, and soft start
▪ No audible ceramic capacitor noise during PWM dimming
▪ Adjustable overvoltage protection (OVP)
▪ No pull-up resistors required for LED modules that use

ESD capacitors

Package: 26 pin QFN/MLP (suffix EC)

Approximate Scale 1:1

Description

The A8500 is a multi-output WLED driver for medium display
backlighting. The A8500 integrates a boost converter and eight
current-sinks to provide a flexible WLED/RGB backlight
driver. The boost converter can provide output voltage up to
47 V. The flexible channel selection control and high voltage
capability allow a wide range of LED backlight applications.
The A8500 can support any application requiring 4 to 96
WLEDs. The boost converter is a constant frequency current­mode converter.
Each LED channel can sink 25 mA, and channels can be
paralleled for higher currents. Flexible dimming allows output
channels to either run at an adjustable DC value or with
externally controlled PWM duty cycles.
The A8500 is available in a 26 pin, 4 mm × 4 mm QFN/MLP
package that is only 0.75 mm nominal in height. Applications
include:

▪ Thin notebook displays
▪ LCD TV
▪ RGB backlight
▪ GPS systems
▪ Portable DVD players

EN pin dimming:
serial pulse train input

V

EN

I

OUT

PWM pin dimming:
digital PWM input

V

PWM

I

OUT

APWM pin dimming:
analog PWM input

V

APWM

I

OUT

Figure 1. LCD monitor backlight, driving 96 LEDs. LED Vf = 3.2 V, 20 mA per LED string. Overvoltage
protection set to 45 V nominal (40.5 V minimum). Alternative dimming control pulse trains illustrated
for EN, PWM, and APWM control. See also: Recommended Components table, page 14.

8500-DS, Rev. 2

T ypical Application

V

IN

5 V ±10%

C

0.1 μF/ 10 V

EN

PWM

APWM

SKIP

COMP

C

C

RFSET

FSET

ISET

RISET

LED1

LED3 LED5 LED7 LGND

V

BAT

5 to 25 V

IN

VIN SW SW OVP

L1

10 μH

C

BAT

1 μF/ 25 V

A8500

D1

ROVP

AGND

PGND

SEL3

SEL2

SEL1

LED2

LED8 LED6 LED4

COUT

2.2 μF
50 V

V

IN

Flexible WLED/RGB Backlight Driver

A8500

for Medium Size LCDs

Selection Guide

Part Number Package Packing*

A8500EECTR-T 4 mm × 4 mm QFN/MLP 1500 pieces / 7-in. reel

*Contact Allegro for additional packing options

Device package is lead (Pb) free, with 100% matte tin leadframe plating.

Absolute Maximum Ratings

Characteristic Symbol Notes Rating Units

SW and OVP Pins –0.3 to 50 V

LED1 through LED8 Pins –0.3 to 23 V

VIN Pin V

IN

Remaining Pins –0.3 to V

Operating Ambient Temperature T

Maximum Junction Temperature T

(max) 150 ºC

J

Storage Temperature T

A

stg

Range E –40 to 85 ºC

–0.3 to 6 V

+ 0.3 V

IN

–55 to 150 ºC

Package Thermal Characteristics*

Characteristic

Package Thermal Resistance
*Additional information is available on the Allegro website

Symbol

R

JA

Note Rating Units

Measured on 3 in. × 3 in., 2-layer PCB 48.5 °C/W

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

2

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

Functional Block Diagram

V

IN

5 V ±10%

C

IN

R

R

FSET

ISET

COMP

C

C

AGND

APWM

SKIP

FSET

EN

SEL1

SEL2

SEL3

PWM

ISET

Reference

100 kΩ

100 kΩ

100 kΩ

Amp

VIN

and

Soft Start

On/Off

Serial Interface

PWM Generator

I

OUT_SET

100 kΩ

+

–

Feedback

Loop

L1

10 μH

SW

SW

D1

V

OUT

COUT

C

BAT

V

BAT

5 to 25 V

+

–

QSR

ROVP

+

∑

OSC

Current Sinks

–

PGND

OVP

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED8

LGND PGND

LGND

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

3

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

ELECTRICAL CHARACTERISTICS, valid at T

= –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless otherwise noted

A

Characteristics Symbol Test Conditions Min. Typ. Max. Units

Input Voltage Range V

Undervoltage Lockout Threshold V

UVLO Hysteresis Window V

Supply Current I

APWM Frequency Range f

IN

UVLO

UVLOhys

SUP

APWM

VIN falling – – 4 V

Switching at no load, TA = 25°C – 5 – mA

Shutdown EN = PWM = APWM = V

IL

Error Amplifier

Error Amplifier Open Loop Gain A

Error Amplifier Unity Gain Bandwidth UGB

Error Amplifier Transconductance Gm

Error Amplifier Output Sink Current I

Error Amplifier Output Source Current I

VEA

EA

EA

EAsink

EAsource

I

= ±10 A – 850 – A/V

COMP

V

= 1 V – 280 – A

LED1-8

V

= 0 V – –280 – A

LED1-8

Boost Controller

R

= 13 k, SKIP = VIL 1.8 2 2.2 MHz

FSET

Switching Frequency f

Minimum Switch Off-Time t

SW

OFFmin

R

= 26.1 k, SKIP = VIL –1–MHz

FSET

R

= 32.4 k, SKIP = V

FSET

IH

Logic Input Levels (APWM , EN, MODE, PWM, SELx, and SKIP pins unless otherwise specified)

Input Voltage Level Low V

Input Voltage Level High V

Input Leakage Current (APWM, EN,
PWM, and SKIP pins)

Input Leakage Current (SELx pins) I

IL

IH

I

Ileak

SELleak

V

= 5 V, TA = 25°C – – 100 A

I(pin)

Over Voltage Protection (OVP)

Output Overvoltage Rising Limit V

OVP Sense Current I

OVP Release Current I

OVP Leakage Current I

OVP

OVPH

OVPL

OVPleak

V

= 21 V – 0.1 – A

VOP

Boost Switch

Switch On Resistance R

Switch Leakage Current I

Switch Current Limit I

ds(on)

SWleak

SWlim

I

= 1.5 A – 225 – m

SW

V

= 5 V, TA = 25°C – – 1 A

SW

V

= 21 V – 1 – A

SW

4.2 – 5.5 V

– 0.2 – V

– 0.1 1 A

20 – 2000 kHz

–60– dB

–3–MHz

– 200 – kHz

–70– ns

– – 0.4 V

1.5 – – V

––1 A

28 – 32 V

– 54.9 – A

– 47.8 – A

1.8 2 – A

Continued on the next page…

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

4

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

ELECTRICAL CHARACTERISTICS (continued), valid at T

otherwise noted

Characteristics Symbol Test Conditions Min. Typ. Max. Units

LED Current Sinks

LEDx Regulation Voltage V

I

to I

SET

Current Gain A

LEDx

Voltage on ISET Pin V

I

Allowable Current Range I

SET

LEDx Accuracy Err

LEDx Matching 
LEDx Switch Leakage Current I

LEDx Switch Leakage Current I

Serial Pulse Timing (see figure 4 for further explanation)

EN Pulse Low Time t

EN Pulse High Time t

Initial EN or APWM Pulse High Time (rela­tive to switching period)

Level Change Delay (relative to switching
period)

Shutdown Delay (relative to switching
period on EN or APWM)

Soft Start

Soft Start Boost Current Limit I

Soft Start LEDx Current Limit I

Thermal Shutdown Threshold T

LEDx

I

ISET

ISET

SET

LEDx

LEDx

LSleak5

LSleak21

LO

HI

t

HI(init)

t

HID

t

SHDN

SWSS

LEDSS

40°C hysteresis – 165 – °C

SHDN

= 100 A – 210 – –

SET

R

= 12 k; 100% current ratio,

ISET

measured as average of LED1 to LED8;
LED1 to LED8 = 0.5 V

I

= 100 A , 100% current ratio;

SET

LED1 to LED8 = 0.5 V

V

= 5 V, EN = PWM = APWM = 0, TA = 25°C – – 1 A

LEDx

V

= 21 V, EN = PWM = APWM=0 – 1 – A

LEDx

First EN or APWM pulse after
shutdown

Falling edge of EN or APWM
pulse

Initial soft start current for boost switch - 1 - A

Current through enabled LEDx pins during soft

start, R

= –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless

A

– 500 – mV

– 1.23 – V

40 – 120 A

– ±1.2 – %

– ±1.5 – %

0.5 – 100 s

0.5 – 100 s

SKIP = Low – 256 –

SKIP = High – 64 –

SKIP = Low – 256 –

SKIP = High – 64 –

SKIP = Low – 256 –

SKIP = High – 64 –

ISET

=12 k

- 1.25 - mA

Switching

Pulses

Switching

Pulses

Switching

Pulses

Switching

Pulses

Switching

Pulses

Switching

Pulses

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

5

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

Performance Characteristics

Efficiency with EN dimming is similar to that with APWM dimming. APWM light load
efficiency can be improved by reducing boost switching frequency with SKIP set high.

PWM Efficiency

V

= 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz

IN

95

90

85

V

(V)

Eff (%)

80

75

70

0 20406080100

BAT

5

8.5

17.6

Duty Cycle (%)

APWM Efficiency

V

= 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz

IN

100

90

80

V

70

Eff (%)

60

50

40

30

0 20406080100

(V)

BAT

5

8.5

17.6

Duty Cycle (%)

PWM Efficiency

V

= 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz

IN

95

90

85

Eff (%)

80

75

70

0 20406080100

V

BAT

(V)

5

8.5

17.6

Duty Cycle (%)

APWM Efficiency

V

= 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz

IN

100

90

80

V

70

Eff (%)

60

50

40

30

0 20406080100

(V)

BAT

5

8.5

17.6

Duty Cycle (%)

Efficiency versus Input Voltage with EN Dimming

V

= V

IN

95

90

85

80

Eff (%)

75

70

65

4.5 4.7 4.9 5.1 5.3 5.5

, 8 ch. with 8 LEDs per ch., fSW = 1 MHz

BAT

VIN (%)

I

LED

(mA)

1
10
20

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

6

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

Performance Characteristics

EN Pin Turn On

V

= V

IN

C1

C2

C3

C4

= 5 V; 8 ch., 8 LEDs per ch.

BAT

Symbol Parameter Units/Division

t t

C1 EN 5 V
C2 I

C3 V
C4 I

t time 500 s

OUT

OUT

IN

100 mA

10 V

1 A

EN

I

OUT

V

OUT

I

IN

C1

C2

C3

C4

PWM Turn On at 50% Duty Cycle

V

= V

IN

C1

C2

= 5 V; 8 ch., 8 LEDs per ch.

BAT

PWM

I

OUT

V

OUT

C1

C2

V

IN

PWM Turn On at 5% Duty Cycle

V

IN

EN Pin Turn Off

= V

= 5 V; 8 ch., 8 LEDs per ch.

BAT

Symbol Parameter Units/Division

C1 EN 5 V
C2 I

C3 V
C4 I

t time 100 s

= V

= 5 V; 8 ch., 8 LEDs per ch.

BAT

OUT

OUT

IN

100 mA

10 V

1 A

I

V

PWM

I

OUT

V

OUT

EN

OUT

OUT

I

IN

C3

C4

Symbol Parameter Units/Division

t t

C1 PWM 5 V
C2 I

C3 V
C4 I

t time 5 ms

OUT

OUT

IN

100 mA

10 V

1 A

I

IN

C3

C4

Symbol Parameter Units/Division

C1 PWM 5 V
C2 I

C3 V
C4 I

t time 10 ms

OUT

OUT

IN

100 mA

10 V

1 A

I

IN

APWM Turn On at 50% Duty Cycle

F

=100 kHz

APWM

C1

C2

C3

C4

Symbol Parameter Units/Division

t

C1 APWM 5 V
C2 I

C3 V
C4 I

t time 200 s

OUT

OUT

IN

100 mA

10 V

1 A

APWM

I

OUT

V

OUT

I

IN

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

7

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

Functional Description

The A8500 is a multioutput WLED driver for medium display
backlighting. The A8500 works with 4.2 to 5.5 V input supply,
and it has an integrated boost converter to boost a 5 V battery
voltage up to 47 V, to drive up to 12 WLEDs in 6 series (Vf =

3.2 V, If = 20 mA), or 8 WLEDs in 8 series at 20 mA per LED
string. For higher LED power or more LEDs, an inductor can be
connected to a separate power supply, V

, from 5 to 25 V, with

BAT

the A8500 IC powered from a 5 V source. The LED sinks can
sink up to a 25 mA current.

The boost converter is a constant frequency current-mode con­verter. The integrated boost DMOS switch is rated for 50 V at
2 A. This switch has pulse-by-pulse current limiting, with the cur­rent limit independent of duty cycle. The switch also has output
overvoltage protection (OVP), with the OVP level adjustable,
typically from 30 to 47 V, as described in the Device Internal
Protection section.

The A8500 has individual open LED detection. If any LED
opens, the corresponding LED pin is removed from regulation
logic. This allows the remaining LED strings to function nor­mally, without excessive power dissipation.

The switching frequency, fSW, can be set from 600 kHz to 2 MHz
by a single resistor, RFSET, connected across the FSET and
AGND pins, and with the SKIP pin set to logic low (see figure 2).

The switching frequency is set as:

FSW = 26.03 / R

where FSW is in MHz and R

is in kΩ When the SKIP pin is

FSET

FSET

,

connected to logic low, switching frequency is as set by RFSET.

When the SKIP pin is connected to logic high, the switching
frequency is divided by 4. The SKIP pin can be used to reduce
switching frequency in order to reduce switching losses and
improve efficiency at light loads.

The IC offers a wide-bandwidth transconductance amplifier with
external COMP pin. External compensation offers optimum per­formance for the desired application.

The A8500 has eight well-matched current sinks to provide regu­lated current through LEDs for uniform display brightness. The
quantity of LEDx pins used is determined by the SELx pins. Refer
to table 1 for further description.

The boost converter is controlled such that the minimum voltage
on any LEDx pin is 500 mV. In a typical application, the LEDx
pin connected to the LED string with the maximum voltage drop
controls the boost loop, so the remaining pins will also have the
higher voltage drop. All LED sinks are rated for 21 V, to allow
PWM dimming control.

LED Current Setting

The maximum LED current can be set at up to 25 mA per chan­nel, by using the ISET pin. To set the reference current, I

SET

,
connect a resistor, RISET, between this pin and ground, valued
according to the following formula:

I

where I

is in mA and R

SET

= 1.23 / R

SET

ISET

is in kΩ.

ISET

,

2.5

2.0

1.5

(MHz)

SW

1.0

f

0.5

0

010 20304050 60 70

(kΩ)

R

FSET

Figure 2. Switching frequency setting by value of RFSET.

Table 1. LEDx Channel Enable Table

SEL1 SEL2 SEL3 LEDx Outputs

0 0 0 Only LED1 on

1 0 0 LED1 through LED2 on

0 1 0 LED1 through LED3 on

1 1 0 LED1 through LED4 on

0 0 1 LED1 through LED5 on

1 0 1 LED1 through LED6 on

0 1 1 LED1 through LED7 on

1 1 1 LED1 through LED8 on

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

8

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

This current is multiplied internally with a gain of 210, and then
mirrored on all enabled LEDx pins. This sets the maximum cur­rent through the LEDs, referred to as “100% current.” The effects
of the value of R

are shown in figure 3.

ISET

The LED current can be reduced from 100% by any of three
alternative methods. These modes are:

serial dimming through the EN pin,

•

on/off control (PWM) with an external PWM signal on the

•
PWM pin, and

analog dimming with an external PWM signal on the APWM pin.

•

Note: Only one dimming technique can be used at a time.

Serial Dimming Through the EN Pin. When the EN pin is pulled

high with PWM, and the APWM pin is low, the A8500 starts
up in serial programming mode. In this mode, series of pulses
applied to the EN pin are used to adjust the output current level,
I

, to a proportion of the ISET current, in equal increments, as

LEDx

listed in table 2.

As shown in the timing diagram in figure 4, serial dimming is
disabled during startup, for the t

Table 2. Serial Dimming Levels

Pulse Count I

0 100% 8 100%×8/16

1 100%×15/16 9 100%×7/16

2 100%×14/16 10 100%×6/16

3 100%×13/16 11 100%×5/16

4 100%×12/16 12 100%×4/16

5 100%×11/16 13 100%×3/16

6 100%×10/16 14 100%×2/16

7 100%× 9/16 15 100%×1/16

*The counter resets on the sixteenth pulse.

Pulse Count I

LEDx

period. After that, the

HI(init)

16* 100%

LEDx

A8500 begins evaluating pulse patterns applied on the EN pin.
Until a valid series is evaluated, the count remains 0 and the
default I

level remains at “100% current.” A count in the

LEDx

range 1 to 15 is evaluated proportionately; for example, when
a series of 12 pulses is evaluated, I

4/16) of 100% current

. At a 16th pulse, the counter resets to 0 and

is set to 25% (100% ×

LEDx

continues to count if additional pulses are applied.

25

20

15

(mA)

10

OUT

I

5

0

010 20304050 60 70

R

(kΩ)

R

ISET

ISET

(kΩ)

V

(V)

IN

4.5

5.0

5.5

(A)

212

211

210

209

208

207

Gain

206

205

204

203

202

010 20304050 60 70

(B)

Figure 3. Effect of value of RISET on (A) “100% current” level, and

(B) LEDx gain.

t

Pulses

EN

I

LEDX

0

HI(init)

1234

t

LO

100% as set by R

100% ×1/16 level

Shutdown

Figure 4. Timing diagram for serial dimming.

ISET

123

81.2%

t

SHDN

Dimming
Counter
Reset

9

t

HID

Dimming
Counter
Reset

t

HI

75%

t

HID

Dimming
Counter
Reset

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

To indicate the end of a programming sequence, set the EN pin
high for a period, t

, which is either (a) greater than 256 oscil-

HID

lator periods when the SKIP pin is high, or (b) greater than 64
oscillator periods when SKIP is low. When the A8500 evaluates
the end of a programming sequence, it changes the current level
to match the existing count (per table 2). The counter is then reset
to 0 and begins counting pulses again at the next valid pulse.

If the EN pin, along with the PWM and APWM pins, is pulled
low for period greater than t

, the A8500 shuts down. When

SHDN

the IC enters shutdown, LED1 through LED8 and the boost
switch turn off after the t

period. During t

SHDN

SHDN

, the con-

verter continues to work in normal fashion.

When enabled through the EN pin, internal references ramp up
during the t

period. The boost converter starts with soft

HI(init)

start to limit input inrush current. During soft start, the boost
stage is peak current limited to 1 A. All enabled LEDx sinks are
set to 1/16 of the set 100% current level, as V

and the volt-

OUT

age on the LEDx pins increases. When all LEDx pins reach the
regulation level of 0.5 V, the IC comes out of soft start, resuming
normal operation with 2 A current limit on boost and 100% cur­rent through LEDx pins. A typical step response in steady state is
shown in figure 5.

On/off Control (PWM) with an External PWM Signal on the
PWM Pin.

When the PWM pin is pulled high with the EN and
APWM pins low, the A8500 turns on and all enabled LEDx pins
sink 100% current. When the PWM pin is pulled low, the IC

EN

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 151

I

OUT

Figure 5. Serial dimming response. The numbers indicate the
quantity of EN pulses at each step.

shuts down with the LEDx pins disabled. External PWM applied
to the PWM pin should be in the range of 100 to 400 Hz for
optimal accuracy.

V

C1

C2

C3

t

Symbol Parameter Units/Division

C1 V
C2 I
C3 V

t time 1.00 ms

Figure 7. PWM pin dimming f

180

160

140

120

100

(mA)

80

OUT

I

60

40

20

0

0 20406080

f

PWM

OUT

OUT

PWM

PWM

(Hz)

100
500

Duty Cycle (%)

= 200 Hz, Duty Cycle =10%.

5.00 V

100 mA

1.00 V

Figure 8. PWM pin dimming linearity.

OUT

I

OUT

V

PWM

100

PWM

I

LEDx

6 μs

100% Current level

Figure 6. Timing diagram for dimming using the PWM pin.

Shutdown (0 μA)

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

10

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

At startup, the output capacitor is discharged and the IC enters
soft start. The boost current is limited to 1 A, and all active LEDx
pins sink 1/16 of the set 100% current until all of the enabled
LEDx pins reach 0.5 V. After the IC comes out of soft start, the
boost current and the LEDx pin currents are set to 100% current.
The output capacitor charges to the voltage level required to sup­ply full LEDx current within a few cycles. The IC is shut down
immediately when PWM goes low.

Analog Dimming with an External PWM Signal on the APWM
Pin.

When the APWM pin is pulled high, with the EN and PWM
pins low, the A8500 turns on in this mode. The first pulse after
shutdown should be greater than t
signal applied to the APWM pin multiplies I

. The logic level PWM

HI(init)

by the duty cycle

SET

to set the reference current level for the LED pins. The typical
range for the APWM signal frequency is 20 kHz to 2 MHz. The
output current ripple at 20 kHz, 50% duty cycle, is less than 5%
of the set value. The LED current accuaracy at 2 MHz, 50% duty

180

160

140

120

100

(mA)

80

OUT

I

60

40

20

0

0 20406080

Figure 9. APWM pin dimming linearity.

f

APWM

(kHz)

20
100
500

100

Duty Cycle (%)

cycle, is less than 3%. In this mode, the A8500 goes through a
soft start routine similar to serial dimming.

Device Internal Protection

Overcurrent Protection (OCP). The A8500 has a pulse-by-pulse

current limit of 2 A on the boost switch. This current limit is
independent of duty cycle.

Thermal Shutdown Protection (TSD). The IC shuts down when

junction temperature exceeds 165°C and restarts when the junc­tion temperature falls by 40°C.

Overvoltage Protection (OVP). The A8500 has overvoltage

protection to protect the IC against output overvoltage. The over­voltage level can be set, from 30 to 45 V typical, with an external
resistor, ROVP, as shown in figure 10. When the current though
the OVP pin exceeds 54.9 μA, the OVP comparator goes high.
When the OVP pin current falls below 47.8 μA, OVP is reset.

22 kΩ

4.4 kΩ

D1

OVP

ROVP

V

OUT

DZ

A

COUT

V

IN

SW SW

OVP
Disable

28.8 V

–

+

1.23 V

Figure 10. Overvoltage protection circuit. Three alternative
configurations at (A) are available, as follows:

External Component OVP Rating

ROVP only up to 45 V

DZ only up to 47 V

both ROVP and DZ redundancy

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

11

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

Calculate the value for R

R

OVP

where V

is the desired typical OVP level in V, and R

OVP

= (V

as follows:

OVP

– 30) / 54.9 μA ,

OVP

OVP

is
in Ω. For tighter OVP limits, a low–leakage-current Zener diode,
DZ, can be used, instead of ROVP, to set OVP at up to 47 V. For
redundancy, DZ can be connected across ROVP to provide addi­tional protection, if ROVP should open. Select a 17 V low-leak­age Zener diode for DZ.

Open LED Protection. The A8500 has protection against open

LEDs. If any enabled LED string opens, voltage on the corre­sponding LEDx pin goes to zero. The boost loop operates in open
loop till the OVP level is reached. The A8500 identifies the open

I

LED string

opens

OUT

Overvoltage
detected,
OVP begins

LED string when overvoltage on the OVP pin is detected. This
string is then removed from the boost controlling loop. The boost
circuit is then controlled in the normal manner, and the output
voltage is regulated, to provide the output required to drive the
remaining strings. If the open LED string is reconnected, it will
sink current up to the programmed current level.

Note: Open strings are removed from boost regulation, but not
disabled. This keeps the string in operation if LEDs open for only
a short length of time, or reach OVP level on a transient event.

The disconnected string can be restored to normal mode by re­enabling the IC. It can also restored to normal operation if the
fault signal is removed from the corresponding LEDx pin, but an
OVP event occurs on any other LEDx pin.

Normal operation
resumes with open
LED string removed
from control loop

I

OUT

V

OUT

C1

I

IN

C2

C3

Symbol Parameter Units/Division

C1 I
C2 V
C3 I

t time 200 s

Figure 11. Open LED fault protection.

V

OUT

I

IN

t

OUT

OUT

IN

50 mA

10 V

500 mA

Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

12

A8500

Application Information

A typical application circuit for dimming an LCD monitor
backlight with 96 LEDs is shown in figure 1. Figure 12 shows
two dimming methods: digital PWM control (PWM signal on the
PWM pin) and analog PWM control, with the analog signal, VA ,

applied to the ISET pin through a resistor, RA.

The current flowing through RA can be calculated as:

IA = VA/ RA .

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

ISET

RISETP

RISET

Q1

This current changes the reference current, I

I

SET

= V

SET

/ R

– (VA – V

SET

LED current can be changed by changing VA. I

SET

SET

) / RA .

, as follows:

can be

SET

changed in the range from 40 μA to 120 μA.

Application Circuit for 1000:1 Dimming Level

A wider dimming range can be achieved by changing the refer­ence current, I
current levels turn on Q1. R

, while using PWM dimming. For higher output,

SET

ISET

and R

set the 100% current

ISETP

level. This current level can be set to 25 mA, and then it can be
dimmed by applying 100% to 0.32% duty cycle on the PWM pin.
The reference current can be reduced by turning off Q1. LED
current can be dimmed to 8 mA by reducing reference current
through ISET pin. This provides 1000:1 combined dimming level
range. Figure 14 shows the accuracy, Err

, results using this

LEDX

circuit.

V

IN

5 V ±10%

EN

PWM

APWM

SKIP

COMP

C

C

RFSET

RA

V

A

RISET

FSET

ISET

LED1

LED3 LED5 LED7 LGND

VIN SW SW OVP

A8500

Figure 13. Configuration for 1000:1 dimming.

100

95

90

85

Accuracy (%)

80

75

0.1 1.0 10.0 100.0
Dimming Level (%)

Figure 14. Typical accuracy, normalized to the 100% current level,
versus dimming level, with F

COUTROVP

AGND

PGND

V

SEL3

SEL2

SEL1

LED2

LED8 LED6 LED4

IN

PWM

= 100 Hz.

Figure 12. Typical application circuit for PWM dimming, using digital PWM (on the
PWM pin, with APWM high).

Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

13

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

V

5 to 25 V

V

IN

5 V ±10%

C

IN

EN

PWM

APWM

SKIP

C

C

RFSET

RISET

COMP

FSET

ISET

LED8

LED7 LED6 LED5 LGND

Figure 15. Typical application circuit for PWM dimming, using digital PWM (on the
PWM pin, with APWM high). Showing configuration of 16 WLEDs at 100 mA, in two
strings of 8 LEDs each.

BAT

C

BAT

VIN SW SW OVP

A8500

LED4 LED3 LED2

AGND

PGND

SEL3

SEL2

SEL1

LED1

COUTROVP

V

IN

C

C

0.1 μF

RFSET

RISET

V

IN

5 V ±10%

EN

PWM

APWM

SKIP

COMP

FSET

AGND
ISET

LED8

LED7 LED6 LED5 LGND

L1

10 μH

VIN SW SW OVP

D1

A8500

LED4 LED3 LED2

PGND

SEL3

SEL2

SEL1

LED1

All ESD capacitors across LED arrays are 0.1 μF

COUTROVP

1 μF

V

IN

Figure 16. Typical application circuit for LED modules with ESD capacitors.

Recommended Components Table (for application shown in figure 1)

Component

Capacitor C
Capacitor C
Capacitor CIN, C

Diode D1 60 V / 1.5 A IR 10MQ060NTRPBF International Rectifier

IC A8500 – A8500 Allegro MicroSystems

Inductor L1 10 H SLF6028T-100M1R3-PF TDK
Resistor RISET 12 k
Resistor RFSET 24 k
Resistor ROVP 270 k

Reference

Designator Value Part Number Vendor

BAT

OUT

C

1 F / 50 V C3216X7R1H105K TDK
1 F / 50 V C3216X7R1H105K TDK

0.1 F / 6.3 V

Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

14

Flexible WLED/RGB Backlight Driver

A8500

Pin-out Diagram

AGND

VIN

SW

SW

26

25

24

23

PGND

1

SKIP

2

COMP

3

FSET

4

ISET

5

APWM

6

LED1

7

Terminal List Table

Number Name Description

1 PGND Power ground pin.

2 SKIP

3 COMP Compensation pin; connect external compensation network for boost converter.
4 FSET Sets boost switching frequency. Connect RFSET from FSET to GND to set frequency. Range for RFSET is 13 to 40 k.
5 ISET Sets 100% current through LED string. Connect RISET from ISET to GND. Range for RISET is 10 to 30 k.

6 APWM

7 LED1
8 LED3

9 LED5
10 LED7
11 LGND Power ground pin for LED current sink.
12 LED8
13 LED6
14 LED4
15 LED2
16 SEL1

18 SEL3

19 EN

20 PWM

21 PGND Power ground pin.

22 OVP

23 SW
24 SW
25 VIN Input supply for the IC. Decouple with a 0.1 F ceramic capacitor.
26 AGND Circuit ground pin.

– EP Exposed pad. Electrically connectred to PGND and LGND; connect to PCB copper plane for heat transfer.

Reduces boost switching frequency in case of light load to improve frequency. Normally, this pin should be low; when
high, f

is divided by 4.

SW

On/off and analog LED current control with external PWM. Apply logic level PWM (1.2 V < V
dimming mode. When unused, connect to AGND.

LEDx capable of 25 mA.

LEDx capable of 25 mA.

SEL1, SEL2, and SEL3 decide active LED strings.17 SEL2

On/off and serial dimming control. EN high enables IC and EN low disables IC. This pin can also be used to program
LEDx current. When unused, connect to AGND.

On/off and on/off LED current control with external PWM. Apply logic level PWM for PWM controlled dimming mode.
When unused, connect to AGND.

Connect to this pin to output capacitor +Ve node through a resistor to enable OVP (overvoltage protection). Default OVP
level with 0  resistor is 30 V, and it can be programmed up to 47 V.

DMOS drain node.

EP

8

9

1011121314

LED3

LED5

LED7

(Top View)

LGND

LED8

LED6

OVP

22

LED4

for Medium Size LCDs

PGND

21

PWM

20

EN

19

SEL3

18

SEL2

17

SEL1

16

LED2

15

< 5 V) for PWM controlled

IH

Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

15

A8500

Flexible WLED/RGB Backlight Driver

for Medium Size LCDs

Package EC, 4 × 4 mm 26-Pin QFN/MLP

0.20

4.00

26

1

A

2

4.00 4.00

0.95

1
2

26

C

0.40

1.10

1.23

27X

(Top View)

D

C0.08

0.20

0.40

0.40

B

2
1

26

2.45

(Bottom View)

SEATING
PLANE

0.75

1.23

1.10

C

All dimensions nomianl, not for tooling use
(reference JEDEC MO-220WGGE)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown

A

Terminal #1 mark area

B

Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)

C

Reference land pattern layout (reference IPC7351
QFN40P400X400X80-29M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)

D

Coplanarity includes exposed thermal pad and terminals

(Pads on PCB)

2.45

4.00

Copyright ©2006, 2007, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.

Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per­mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.

Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.

The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.

For the latest version of this document, visit our website:

www.allegromicro.com

Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com

16