ALLEGRO A8450 User Manual

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Package LB 24-pin SOIC
VBB
1
CP2
2
CP1
VCP
VREG11
GND
GND
ENB
CPOR
CLADJ
VADJBD
FB
Charge
3
4
5
6
7
8
9
10
1.2Vto
3.3 V
11
Lin Reg
12
Control
Approximate Scale 1:1
Converter
Pump
Buck
Soft
Start
Dig/Anlg
Lin Reg
5 V Reg
Control
5V
Track
3.3 V
Lin Reg
Control
A8450
Automotive Multioutput Voltage Regulator
The A8450 is a multioutput power supply intended for automotive applications. The A8450 operates from a wide input supply range and is designed to satisfy the requirements of high ambient temperature environments.
Four regulated voltage outputs provide multiple options. The 3.3 V regulator and the 1.2 to 3.3 V adjustable regulator can be used to power
24
23
22
21
20
19
18
17
16
15
14
13
LX
ENBAT
V33
V33BD
CL33
GND
GND
VREG
V5D
NFAULT
NPOR
V5A
microcontroller or DSP cores, or for I/O, sensing, and A-to-D conver­sion. Two 5 V outputs, one digital and the other analog, feature output tracking within 0.5% of each other over the operating temperature range. In addition, the analog regulator is protected against short-to­battery conditions. All four regulators feature foldback current limit protection.
The device can be enabled or disabled using two input pins. The high voltage input, on the ENBAT pin, allows enable/disable using an engine ignition or battery switch signal. The logic-level input, on the ENB pin, allows enable/disable by microcontroller or DSP signals.
When disabled, the A8450 draws less than 10 µA of current. A POR (power-on-reset) block monitors the supply voltages and provides a reset signal, with an adjustable delay, for microcontroller or DSP resets. A separate fault pin signals TSD (thermal shutdown), 5 V analog short­to-supply, and 5 V analog or digital undervoltage.
The A8450 is supplied in a 24-pin SOIC package (part number suffix LB) with fused power ground pins for enhanced thermal perfor­mance. This provides an R
of 35°C/W on a 4-layer board (see chart
θJA
on p. 4).
AB SO LUTE MAX I MUM RAT INGS
Load Supply Voltage, V
Analog Output, Pin V5A........................–1 V to 45 V
Logic Input Signal
Pin ENBAT .................................–0.3 V to 45 V
Pin ENB .....................................–0.3 V to 6.5 V
Pin LX.................................................... –2 V to V
Operating Temperature Range Ambient Temperature, T Junction Temperature, T
Storage Temperature, TS.................... –55°C to 150°C
A8450KLB-DS, Rev. 1
..................................45 V
BB
............ –40°C to 135°C
A
.....................150°C
J(MAX)
FEATURES
6 V to 45 V input range dc-to-dc buck converter with 5.7 V outputOvercurrent protection with foldback, and undervoltage lockout (UVLO) Dual 5 V outputs
– Digital 5 V ±2%, 200 mA – Analog 5 V, 200 mA – Short-to-supply protection on analog regulator – Analog to digital regulator output tracking < 0.5%, throughout
operating temperature range
3.3 V linear regulator, with foldback current limit Adjustable 1.2 V to 3.3 V linear regulator, adjustable foldback current limit
BB
Ignition switch enable; Sleep mode 100% duty cycle operation for low input voltages
Power OK output –40°C to 135°C ambient operating temperature range
Use the following complete part number when ordering:
Part Number Package Description
A8450KLB 24-pin, SOIC Webbed Leadframe
Automotive Multioutput Voltage Regulator
Functional Block Diagram
VIN
D2
A8450
L1
High
Voltage
Switch
VREG11
ENBAT
C10
ENB
NPOR
CPOR
C9
Charge Pump
High V
Protection
Adjustable
Delay
POR Block
C8
CP2CP1 VCP
CPOK
C7
Soft Start
V
UVLOREG
V
UVLOADJ
V
UVLO33
VBB
VBB
Reference
CIN
Buck Converter with Switching Regulator
Internal
VREG
Current Limiting
VREG
V
REF
LX
3.3 V Linear
Regulator Control
1.2 V to 3.3 V Adjustable Linear Regulator Control
5 V Digital Linear
Regulator
5V Analog Linear Regulator and V5D to V5A Tracking Control
D1
COUT
VREG
CL33
V33BD
V33
CLADJ
VADJBD
FB
V5D
R3
Q1
C3
R1
R2
C1
R4
Q2
VADJ
C4
V5A
NFAULT
GND
Fault
TSD Warning
V5A Short to Supply UVLO V5D, V5A
Short-to-Supply
Protection
C2
ID Characteristics Representative Device
C1, C2, C3, C4 1 µF, 25 V ceramic X7R COUT 100 µF, 35 V low-ESR electrolytic UHC1V101M, Nichicon CIN 47 µF, 63 V electrolytic
C7, C8
0.1 µF, 50 V ceramic X7R (for 14 V applications), or
0.1 µF, 100 V ceramic X7R (for 42 V applications) C10 0.22 µF, 10 V X7R D1, D2 1 A, 40 V Schottky (for 14 V applications) EKO4, Sanken L1 100 µH, 1.2 A D03316HT, Coilcraft Q1, Q2 pass transistors npn transistor, h
A8450KLB-DS, Rev. 1
> 50 MPSW06
FE
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
A8450
Automotive Multioutput Voltage Regulator
ELECTRICAL CHARACTERISTICS at T
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Supply Quiescent Current I
Regulated Output Voltage V
Buck Switch On-Resistance R
Buck Switch Current Limit I
dc-to-dc Fixed Off-Time t
Soft Start Time t
Logic Inputs
ENBAT Logic Input Voltage V
ENBAT Input Current I
ENB Logic Input Voltage V
ENB Input Current I
Linear Regulator Outputs
*
V5D Output Voltage V V5A Output Voltage V V33 Output Voltage V
V5A to V5D Tracking V
V5D Current Limit I
V5A Current Limit I
Base Drive Output Current I Feedback Voltage V Feedback Input Bias Current I
Continued on next page
BB
REG
DSON
DSLIM
OFF
SS
ENBAT
ENBAT
ENB
ENB
OUTV5D
OUTV5A
OUTV33
TRACK
OUTV5DLIM
OUTV5ALIM
BD
FB
FB
= –40ºC to 135°C, V
A
Enabled mode: V I
= 0 mA: V
OUT
BB
Enabled mode: V I
= 0 mA; VBB = 6 V
OUT
Disabled mode: V I
= 550 mA = I
LOAD
+ I
LOADVADJ
; VBB > 6.5 V
BB
ENBAT
= 14 V
ENBAT
ENBAT
LOADV5D
or V
or V
= 6 to 45 V, V
= HIGH,
ENB
= HIGH,
ENB
and V
= LOW 10 µA
ENB
+ I
LOADV5A
= 5 V, unless otherwise noted
ENB
6 10 mA
–1015mA
+ I
LOADV33
5.50 5.80 V
Dropout: 6 V VBB < 6.5 V 5.00 5.80 V TJ = 25°C 415 500 m TJ = 135°C 650 750 m
1.0 1.2 1.8 A
VBB = 14 V 4.75 µs
VBB = 14 V 5 10 15 ms
HIGH input level 2.7 45 V LOW input level –0.3 0.8 V HIGH input level, V HIGH input level, V LOW input level, V
= 45 V 300 µA
ENBAT
= 14 V 70 µA
ENBAT
= 0.8 V –1 10 µA
ENBAT
HIGH input level 2.7 6.5 V LOW input level –0.3 0.8 V HIGH input level, V LOW input level, V
1 mA I 1 mA I
LOADV5D
LOADV5A
2.7 V 50 µA
ENB
0.8 V –1 10 µA
ENB
200 mA 4.9 5.0 5.1 V
200 mA 4.9 5.0 5.1 V
3.234 3.300 3.366 V
50 mA I V
> 6.5 V
BB
LOADV5A
, I
LOADV5D
200mA;
–25 25 mV
200 300 mA
200 300 mA
1 V V
OUTVADJ
, V
4 V 5.0 10.0 16.0 mA
OUTV33
1.16 1.20 1.24 V
–400 –100 100 nA
A8450KLB-DS, Rev. 1
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
A8450
Automotive Multioutput Voltage Regulator
ELECTRICAL CHARACTERISTICS (continued) at T
otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Protection
NFAULT, NPOR Output Voltage V
NFAULT, NPOR Leakage Current I POR Delay t
V33 Undervoltage Threshold V
V33 Hysteresis V
V5A, V5D Undervoltage Threshold V
V5A, V5D Hysteresis V
VADJ Undervoltage Threshold V
VADJ Hysteresis V VADJ, V33 Overcurrent Threshold V VREG Undervoltage Threshold V Thermal Warning Threshold T Thermal Shutdown Threshold T Thermal Shutdown Hysteresis T
*
Linear regulator output specifications are only valid when V
ERRON
ERROFF
POR
UVLOV33
HYSV33
UVLOV5
HYSV5
UVLOVADJ
HYSVADJ
OC
UVLOVREG
JTW
JTSD
HYSTSD
Fault asserted; I
NFAULT
V
NFAULT
C9 = 0.47 µF 65 100 135 ms V33 rising 2.80 2.95 3.10 V V
falling 2.75 2.90 3.05 V
33
–80–mV V
REG
V
REG
VFB rising 1.02 1.07 1.12 V V
FB
At FB pin 70 mV
TJ rising 160 °C TJ rising 175 °C Recovery period = T
is in regulation (VBB 6.5).
REG
= –40ºC to 135°C, V
A
, I
= 1 mA
NPOR
, V
= 5 V 1 µA
NPOR
= 6 to 45 V, V
BB
= 5 V, unless
ENB
400 mV
rising 4.36 4.50 4.75 V falling 4.24 4.38 4.63 V
125 mV
falling 0.97 1.02 1.07 V
175 200 225 mV
4.94 5.15 5.36 V
JTSD
– T
JTW
–15–°C
A8450KLB-DS, Rev. 1
Power Dissipation Versus Ambient Temperature
4.5
4.0
3.5
(W)
D
3.0
2.5
2.0
1.5
4-Layer PCB* (R
=35ºC/W)
θJA
Power Dissipation, P
1.0
0.5
0.0
20 40 60 80 100 120 140 160
Ambient Temperature (°C)
*In still air; mounted on PCB based on JEDEC high-conductance standard PCB (JESD51-7; High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages); data on other PCB types is provided on the Allegro Web site.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
V
REG
V
OUTV33
V
OUTVADJ
V
OUTVADJ
V
ENBAT
V
ENBAT
V
ENB
V
ENB
V
NPOR
V
NPOR
V
NPOR
V
BB
V
REG
V
OUTV33
V
OUTV5A/V5D
VREG Monitor
V
CP
V
REG
V
OUTV33
V
OUTVADJ
V
UVLOV33
t
POR
t
POR
t
POR
t
POR
V
HYSV33
V
UVLOV33
VBB>6V
V
REG
= 1.8 V
V
UVLOVREG
V
UVLOVADJ
V
HYSVADJ
AB
POR event initiates
+7 V
Slope of V
OUTV33
and V
OUTVADJ
from A to B determined by I
LOAD
and output capacitor (C3, C4).
ENBAT signals power-on
Charge pump ramping
Charge pump OK flag set
V
UVLOV33
exceeded; VADJ enabled
V
UVLO(33)
ENB signals power-off
V33 can sustain regulation with normal load by bulk capacitor (COUT) on V
REG
.
Slope of V
REG
(which controls V
OUTV5A/V5D
,V
OUTV33
, and V
OUTVADJ
) from A to B determined by I
LOAD
and COUT.
A
B
t
POR
t
SS
Figure 1a. NPOR fault due to undervoltage lockout on the V33 or FB pins
A8450
Automotive Multioutput Voltage Regulator
Timing Diagrams
Figure 1b. Power-off using V
Figure 1c. Power-on using ENBAT, followed by power-off using ENB
A8450KLB-DS, Rev. 1
BB
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5
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