6-Channel High Efficiency Charge Pump White LED Driver
Features and Benefits
▪ Proprietary adaptive control scheme (1×, 1.5×, 2×)
▪ 0.5% typical WLED current matching
▪ Drives up to 6 white LEDs
▫ Main display backlight (up to 6 WLEDs)
▫ Main display and sub display backlight
▫ Main display and low-current flash/torch
▪ 30 mA per WLED
▪ 2× serial dimming interfaces
▪ 320 mA charge pump capability
▪ Low EMI design and soft start function
▪ Short circuit, overvoltage, thermal shutdown protection
▪ 0.75 mm nominal height (very thin profile),
3 × 3 mm footprint packages
Package: 16 pin QFN/MLP (suffix ES)
Description
The A8434 high efficiency charge pump ICs offer a simple,
low-cost WLED (white LED) driver solution for driving up to
six WLEDs in various application configurations, either all six
backlighting a single display, or for multiple displays, such as
four WLEDs as the main display backlight, with the other two
WLEDs used for backlighting a sub display or a low-current
flash/torch. Using a proprietary control scheme (1×, 1.5×, and
2×
), the A8434 can deliver well-matched WLED current while
maintaining the highest efficiency and low EMI.
The WLED current is regulated over the entire range of Li+
battery voltage to provide uniform intensity. WLED brightness
and on/off can be controlled for the main display and sub
display/torch through 2 single-wire serial interface pins.
The A8434 is available in an QFN/MLP-16 space-conserving
(3 × 3 mm footprint) ES package.
Applications include:
▪ White LED backlights for cellular phones, PDAs
▪ Digital cameras, camcorders
▪ Portable audio devices and MP3s
▪ Other portable device white LED backlighting
Approximate scale 1:1
T ypical Applications
V
BATT
2.7 to 5.5 V
CIN
1 µF
RSET
On/Off and
Dimming
Control
C1
1 µF
C2
1 µF
VIN
C1+
C1–
C2+
C2–
ISET
ENM
ENS
A8434
GND
VOUT
LED1
LED2
LED3
LED4
LED5
LED6
Figure 1.6 × 30 mA WLED displayFigure 3. High efficiency current sink
COUT
1 µF
D1
D2
D3
D4
D5
D6
V
2.7 to 5.5 V
CIN
1 µF
RSET
On/Off and
Dimming
Control
BATT
C1
1 µF
C2
1 µF
VIN
C1+
C1–
C2+
C2–
ISET
ENM
ENS
VOUT
LED1
LED2
A8434
LED3
LED4
LED5
LED6
GND
D1-D4 Main Display; D5-D6 Sub Display
COUT
1 µF
D1
D2
D3
D4
D5
D6
CIN
1 μF
RSET
On/Off and
V
IN
Dimming
Control
VIN
C1+
C1–
C2+
C2–
ISET
ENM
ENS
A8434
GND
VOUT
LED1
LED2
LED3
LED4
LED5
LED6
V
IN>Vf
D1
D2
D3
D4
D5
D6
(max)+0.2 V, Vf = LED forward drop
Figure 2. 4 × 30 mA main with 2 × 30 mA sub display
8434-DS, Rev. 1
A8434
6-Channel High Efficiency Charge Pump
White LED Driver
Functional Block Diagram
CIN
1 μF
RSET
VIN
ENM
ENS
ISET
Control, Clock,
and Reference
Current Mirror
+
−
C1+
C1
1 μF
−
C1
Fractional Charge Pump
(1×, 1.5×, and 2×)
−
+
−
+
C2+
+
−
Minimum Select
−
+
C2
1 μF
C2−
VOUT
COUT
1 μF
LED1
LED2
LED3
LED4
LED5
LED6
−
+
−
+
−
+
GND
Ab so lute Max i mum Rat ings
Input or Output Voltage
VIN, VOUT, C1+, C1– , C2+, C2– to GND ..................... –0.3 to 6 V
All other pins ..................................................... –0.3 to V
+ 0.3 V
IN
VOUT Short Circuit to GND ....................................................Continuous
Operating Ambient Temperature, T
Junction Temperature, T
Storage Temperature, T
J(max)
................................................... –55°C to 150°C
S
..................................... –40°C to 85°C
C1–13Negative terminal of capacitor C1. Connect capacitor C1 between C1+ and C1–.
C1+16Positive terminal of capacitor C1.
C2–15Negative terminal of capacitor C2
C2+1Positive terminal of capacitor C2. Connect capacitor C2 between C2+ and C2–.
ENS4Enable and dimming control input for sub display WLED group.
ENM5Enable and dimming control input for main display WLED group.
EP–Exposed metal pad on bottom side. Connect this to ground plane for better thermal performance.
GND12Ground.
ISET3
LED1, LED2,
LED3, and LED4
8, 9, 10,
and 11
LED5 and LED66 and 7
VIN14Power supply voltage input.
VOUT2
Connect RSET resistor to ground to set desired constant current through main and sub WLEDs.
I
LED(max)
= 220 x 0.6 V / R
SET
Current sink for main display WLEDs. If not used, connect to VOUT, but do not leave open. If left
open, the IC works in 2 × mode.
Current sink for sub display WLEDs. If not used, connect to VOUT, but do not leave open. If left open,
the IC works in 2 × mode.
Charge pump output voltage for display backlight and flash/torch LED anodes.
Connect a 1 F capacitor, COUT, between VOUT and GND (see figure 2).
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Use the following formula to set the display backlight LED full
current (100%) using RSET on LED1 through LED6. The maxi-
mum current through one LED should not exceed 30 mA:
R
= 0.6 V × 220 / I
where R
is in Ω and I
SET
SET
LEDx
in amperes.
LEDx
Transitions Between 1× and 1.5× or 2× Modes
The A8434 adaptively selects operating mode. When VIN is suf-
ficiently high to maintain V
in 1 × mode unless, as V
IN
the 150 mV threshold. When V
> 150 mV, the A8434 operates
LEDx
drops, the LEDx nodes fall below
falls below 150 mV, the IC
LEDx
enters 1.5× mode.
When the A8434 switches from 1× to 2× mode, it first switches
to 1.5× mode for a typical duration of 1 ms before entering
2× mode.
When operating in 1.5× mode, if V
< VIN, then the IC
OUT
switches back to 1× mode every 130 ms, and then reenters 1.5×
mode again if necessary.
Transitions Between 1.5× and 2× Modes
The transition from 1.5× to 2× mode depends upon dropout
conditions.
When operating in 2× mode, the IC switches back to 1.5× mode
every 130 ms, and then reenters 2× mode again if necessary.
Furthermore, when in 2× mode, whenever a channel disabling
is sensed (that is, whenever ENM is held low for > 0.5 ms with
ENF high, or vice versa), the IC automatically reverts to 1.5×
mode, and then reenters 2× mode again if necessary.
Dimming
Main Display LED1 through LED4 Dimming. The main
display WLEDs (LED1 through LED4) brightness and on/off can
be controlled using digital input at the ENM pin. The ENM pin
accepts one-wire serial pulse input to enable the A8434 and to set
up to 11 dimming levels, from 100% down to 5%.
When ENM is initially pulled up from shutdown, after a softstart, the current for the WLEDs is programmed to 100% of the
setting current, which is determined by the current through the
ISET pin. Each subsequent pulse reduces the backlight LEDs cur-
th
rent by 10%, and the 10
pulse reduces the current by 5%. The
next pulse restores 100% (full) brightness. Figure 5 shows the
timing diagram for ENM control.
95.0
90.0
85.0
80.0
75.0
Eff (%)
70.0
65.0
60.0
55.0
50.0
3.33.43.53.63.73.83.94.04.14.2
Falling
IN
V
VIN (V)
Figure 4. Mode change transition
t
ENM or
ENS
I
ILED
x
SHDN
HI(Init)
0
t
SS
100%
1234567891011
t
LO
90%
80%
70%
60%
50%
Figure 5. Single-Wire Serial Dimming Control; at pins ENM and ENS.
Rising
IN
V
40%
t
HI
30%
20%
10%
5%
100%
90%
t
SHDN
SHDN or
Dimming
Reset
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115 Northeast Cutoff, Box 15036
Sub Display LED5 and LED6 Operation. The sub display
backlight LEDs (LED5 and LED6) brightness and on/off can
be controlled using digital input at the ENS pin. The ENS pin
accepts one-wire serial pulse input to enable the A8434 and to set
up to 11 dimming levels, from 100% down to 5%.
When ENS is initially pulled up from shutdown, after a soft-start,
the current for the backlight LEDs is programmed to 100% of
the setting current, which is determined by the current through
the ISET pin. Each subsequent pulse reduces the LED current
by 10%, and the 10th pulse reduces the current by 5%. The next
pulse restores 100% (full) brightness. Figure 5 shows the timing
diagram for ENS control.
Simultaneous Dimming of All 6 LEDs
For larger displays 6 LEDs can be grouped together. The LEDs
LED1 through LED6 can be dimmed simultaneously by connecting ENM and ENS together and applying serial pulses for
dimming, as shown in figure 1.
Absolute Level Operation Some applications require dimming
to a specific level, regardless of the present level of dimming.
For example, if the IC should dim to 30%, this can be done with
7 steps, as shown in figure 5, irrespective of the dimming level
in effect. This can be achieved by pulling corresponding ENx
pin low for time greater than t
and then applying pulses as
SHDN
shown in figure 5 (7 for 30% dimming). If the pulses are applied
within 2-3 ms, the display flicker is not visible. The procedure is
shown in figure 6.
Shutdown
When the ENM or ENS pin is pulled low for 0.5 ms or longer, the
corresponding display channels are shut off and dimming is reset
to 100% upon the next ENM or ENS going high edge. When both
ENM and ENS are pulled low for 0.5 ms or longer, the A8434
enters the shutdown mode.
Short Circuit Protection
The A8434 is protected against short circuits on the output. When
V
is externally pulled below 1.2 V, the IC enters short circuit
OUT
mode. The A8434 resumes normal operation when the short
circuit is removed.
t > t
SHDN
I
counter resets
SET
t
SymbolParameterUnits/Division
C1V
C2V
C3I
ttime0.5 ms
ENM
OUT
OUT
2.00 V
2.00 V
50 mA
C1
C2
C3
ENx pulled low
100%
Figure 6. Absolute Dimming Level Setting. With ENM pulled low longer the t
pulsing the corresponding ENx pin sets an absolute target level.
Rapid pulse pattern
V
ENM
V
OUT
I
30%
,
SHDN
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115 Northeast Cutoff, Box 15036
The A8434 is protected up to 4.9 V supply voltage, against
accidental overvoltage caused by an open LED. When any LED
opens, V
will increase till 6 V. Remaining LEDs will continue
OUT
to function normally. Normal operation will be resumed when the
fault is removed.
LED Disconnection
Every LEDx pin has a disable subcircuit, as shown in figure 7.
The A8434 compares the voltage on each LED pin, and if
the voltage on the pin is greater than either V
– 0.4 V or
OUT
VIN – 0.4 V, then the corresponding LED pin is disabled.
If any WLED is not used, connect the corresponding pin to
VOUT. Never leave open any unused WLED pin. LED pins will
sink 20 μA typical when connected to VOUT and the corresponding LED group (main or sub) is enabled.
A8434
V
BATT
CIN
VIN
1×, 1.5×, 2×
Charge Pump
Note: In shutdown mode (ENM = ENS = 0 V for > 0.5 ms), the
total leakage current is < 1μA.
Thermal Shutdown
The IC is internally protected against overtemperature. The
overtemperature limit is set to 165°C nominal. The IC shuts down
when the junction temperature exceeds 165°C and automatically
turns on again when the IC cools.
Component Selection
Ceramic capacitors with X5R or X7R dielectric are recom-
mended for the input capacitor, CIN, the output capacitor, COUT,
and the charge pump capacitors, C1 and C2.
VOUT
COUT
LED Disable Block
One of six blocks
–
V
– 0.4
IN
+
–
V
– 0.4
OUT
+
Current
Sink
LED1
D1
D2
D3
D4
D5
D6
Figure 7. LED disable subcircuit. Subcircuit for one LEDx pin shown. A similar block is
connected to each LEDx pin.
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115 Northeast Cutoff, Box 15036
All dimensions reference only, not for tooling use
(reference JEDEC MO-220WEED-4)
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Terminal #1 mark area
Exposed thermal pad (reference only, terminal #1
B
identifier appearance at supplier discretion)
C
Reference land pattern layout (reference IPC7351
QFN50P300X300X80-17W4M); adjust as necessary to
meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal
vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
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