Allegro A6B595KLW, A6B595KA Datasheet

6B595

Data Sheet

26185.122

ADVANCE INFORMATION

(Subject to change without notice)

January 24, 2000

CONNECTION

LOGIC

SUPPLY

SERIAL

DATA IN

OUT

CLEAR

OUTPUT

ENABLE

GROUND

CLR

LATCHES

NCNC

LATCHES

Note that the A6B595KA (DIP) and the A6B595KLW (SOIC) are electrically identical and share a common terminal number assignment.

ABSOLUTE MAXIMUM RATINGS

at T

= 25°C

Output Voltage, VO............................... 50 V

Output Drain Current,

Continuous, IO.......................... 150 mA*

Peak, IOM................................... 500 mA†

Single-Pulse Avalanche Energy,

EAS................................................. 30 mJ

Logic Supply Voltage, VDD.................. 7.0 V

Input Voltage Range,

VI................................... -0.3 V to +7.0 V

Package Power Dissipation,

PD........................................... See Graph

Operating Temperature Range,

TA................................. -40°C to +125°C

Storage Temperature Range,

TS................................. -55°C to +150°C

* Each output, all outputs on. † Pulse duration ≤ 100 µs, duty cycle ≤ 2%.

Caution: These CMOS devices have input static protection (Class 3) but are still susceptible to damage if exposed to extremely high static electrical charges.

NO CONNECTION

GROUND SERIAL

DATA OUT OUT

OUT

CLOCKCLK

STROBE

GROUND

Dwg. PP-029-12

8-BIT SERIAL-INPUT,

DMOS POWER DRIVER

The A6B595KA and A6B595KLW combine an 8-bit CMOS shift register and accompanying data latches, control circuitry, and DMOS power driver outputs. Power driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads.

The serial-data input, CMOS shift register and latches allow direct interfacing with microprocessor-based systems. Serial-data input rates are over 5 MHz. Use with TTL may require appropriate pull-up resistors to ensure an input logic high.

A CMOS serial-data output enables cascade connections in applications requiring additional drive lines. Similar devices with reduced r

are available as the A6595KA and A6595KLW.

DS(on)

The A6B595 DMOS open-drain outputs are capable of sinking up to 500 mA. All of the output drivers are disabled (the DMOS sink drivers turned off) by the OUTPUT ENABLE input high.

The A6B595KA is furnished in a 20-pin dual in-line plastic package. The A6B595KLW is furnished in a wide-body, small-outline plastic package (SOIC) with gull-wing leads. Copper lead frames, reduced supply current requirements, and low on-state resistance allow both devices to sink 150 mA from all outputs continuously, to ambient temperatures over 85°C.

FEATURES

■ 50 V Minimum Output Clamp Voltage

■ 150 mA Output Current (all outputs simultaneously)

■ 5 Ω Typical

■ Low Power Consumption

■ Replacements for TPIC6B595N and TPIC6B595DW

Always order by complete part number:

Part Number Package R

A6B595KA 20-pin DIP 55°C/W 25°C/W

A6B595KLW 20-lead SOIC 70°C/W 17°C/W

DS(on)

θJA

θJC

6B595

8-BIT SERIAL-INPUT, DMOS POWER DRIVER

2.5

2.0

SUFFIX 'A', R = 55

1.5

1.0

SUFFIX 'LW

', R = 70

°C/W

0.5

ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS

50 75 100 125 150

AMBIENT TEMPERATURE IN °C

Dwg. GS-004A

FUNCTIONAL BLOCK DIAGRAM

LOGIC SYMBOL

SRG8

. FP-043

CLEAR

(ACTIVE LOW)

CLOCK

SERIAL

DATA IN

STROBE

OUTPUT

ENABLE

(ACTIVE LOW)

GROUND

SERIAL-PARALLEL SHIFT REGISTER

D-TYPE LATCHES

OUT

Grounds (terminals 10, 11, and 19) must be connected together externally.

LOGIC SUPPLY

SERIAL DATA OUT

GROUND

Dwg. FP-013-4

Dwg. EP-010-16

6B595

8-BIT SERIAL-INPUT,

DMOS POWER DRIVER

OUT

Dwg. EP-063

LOGIC INPUTS

DMOS POWER DRIVER OUTPUT

RECOMMENDED OPERATING CONDITIONS

over operating temperature range

Logic Supply Voltage Range, VDD............... 4.5 V to 5.5 V

High-Level Input Voltage, V Low-level input voltage, V

............................ ≥ 0.85V

................................. ≤0.15V

SERIAL DATA OUT

TRUTH TABLE

Shift Register Contents Serial Latch Contents Output Contents Data Clock Data Output Input Input I0I1I

HHR

LLR

0R1

0R1R2

XXX … XX X — R0R1R2…R6R

P0P1P2…P6P

... I6I7Output Strobe I0I1I2... I6I7Enable I0I1I2…I6I

…R5R

…R6R

P0P1P2…P6P

LP0P1P2…P6P

XXX … XX H HHH… HH

OUT

Dwg. EP-063-1

L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State

www.allegromicro.com

6B595

8-BIT SERIAL-INPUT, DMOS POWER DRIVER

ELECTRICAL CHARACTERISTICS at T

= +25°C, V

= 5 V, tir = t

≤ 10 ns (unless otherwise

specified).

Limits

Characteristic Symbol Test Conditions Min. Typ. Max. Units

Output Breakdown V

(BR)DSXIO

Voltage

Off-State Output I Current

Static Drain-Source r

DS(on)

On-State Resistance

Nominal Output I Current

Logic Input Current I

SERIAL-DATA V Output Voltage

DSX

= 1 mA 50 — — V

VO = 40 V, V

VO = 40 V, VDD = 5.5 V, T

IO = 100 mA, V

IO = 100 mA, VDD = 4.5 V, T

IO = 350 mA, V

= 0.5 V, T

DS(on)

VI = V

VI = 0, V

= -20 µA, V

= 5.5 V — 0.1 5.0 µA

= 125°C — 0.15 8.0 µA

= 4.5 V — 4.2 5.7 Ω

= 125°C— 6.8 9.5 Ω

= 4.5 V (see note) — 5.5 8.0 Ω

= 85°C—90—mA

= 5.5 V — — 1.0 µA

= 5.5 V — — -1.0 µA

= 4.5 V 4.4 4.49 — V

IOH = -4 mA, VDD = 4.5 V 4.0 4.2 — V

= 20 µA, V

= 4.5 V — 0.005 0.1 V

IOL = 4 mA, VDD = 4.5 V — 0.3 0.5 V

Prop. Delay Time t

Output Rise Time t

Output Fall Time t

Supply Current I

DD(OFF)

DD(ON)

DD(fclk)

PLH

PHL

IO = 100 mA, CL = 30 pF — 150 — ns

IO = 100 mA, CL = 30 pF — 90 — ns

IO = 100 mA, CL = 30 pF — 200 — ns

= 5.5 V, Outputs OFF — 20 100 µA

= 5.5 V, Outputs ON — 150 300 µA

= 5 MHz, CL = 30 pF, Outputs OFF — 0.4 5.0 mA

clk

Typical Data is at VDD = 5 V and is for design information only. NOTE — Pulse test, duration ≤100 µs, duty cycle ≤2%.

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